Lines Matching refs:DEBUG
47 #define DEBUG(...)\ macro
644 DEBUG("SCDC wr %02x %02x, ddcwaitsts = %d\r\n", in _tx_scdc_write()
712 DEBUG("SCDC wr %02x %02x, ddcwaitsts = %d\r\n", offset, data, ddcwaitsts); in _tx_hdcp_write()
749 DEBUG("HDCP read - %02X : ", offset); in _tx_hdcp_read()
752 DEBUG("%02X ", data_buf[i]); in _tx_hdcp_read()
755 DEBUG("\r\n"); in _tx_hdcp_read()
816 DEBUG("Begin READ CED:\r\n"); in _tx_show_sink_ced()
850 DEBUG("ced_valid = %02X, ch%d V=%d err=%04X\r\n", in _tx_show_sink_ced()
854 DEBUG("\r\n"); in _tx_show_sink_ced()
972 DEBUG("HDCP 2 done\r\n"); in _sw_show_hdcp_status()
976 DEBUG("HDCP 1 done\r\n"); in _sw_show_hdcp_status()
1017 DEBUG("_tx_setup_afe %u\r\n", vclk); in _tx_setup_afe()
1076 DEBUG("TX Output H2ClkRatio=%d ...\r\n", H2ClkRatio); in _tx_setup_afe()
1153 DEBUG("CAOF_Int=%02x, Status=%02x\r\n\r\n", in it66353_rx_caof_init()
1181 DEBUG("symlock = %02x\r\n", symlock); in _rx_show_ced_info()
1185 DEBUG("ch_%d CED=0x%04x\r\n", ch, it66353_gdev.vars.RxCEDErr[ch]); in _rx_show_ced_info()
1187 DEBUG("ch_%d CED=invalid\r\n", ch); in _rx_show_ced_info()
1660 DEBUG("check_for_sdi recheck ...\r\n"); in _sw_sdi_check()
1663 DEBUG("check_for_sdi disabled ...%02x\r\n", in _sw_sdi_check()
1675 DEBUG(" >> skip HDCP acc %d\r\n", enable); in _sw_hdcp_access_enable()
1679 DEBUG(" >> HDCP acc %d\r\n", enable); in _sw_hdcp_access_enable()
1723 DEBUG("TX Reset\r\n"); in _tx_reset()
1751 DEBUG("RX Reset\r\n"); in it66353_rx_reset()
1879 DEBUG("Switch Reset\r\n"); in _sw_reset()
1916 DEBUG("RCLK=%d kHz\r\n\r\n", rclk); in it66353_cal_rclk()
2009 DEBUG(" >> it66353_txoe return %d \r\n", enable); in it66353_txoe()
2013 DEBUG("TXOE=%d align=%d\r\n", enable, it66353_gdev.opts.active_rx_opt->TxOEAlignment); in it66353_txoe()
2039 DEBUG("A_TXOE=%d align=%d\r\n", enable, it66353_gdev.opts.active_rx_opt->TxOEAlignment); in it66353_auto_txoe()
2056 DEBUG("TX 5V output=%d\r\n", output_value); in it66353_set_tx_5v()
2119 DEBUG("RXP%d WatchDog detect TMDSCLK = %lu kHz (div=%d, 6C=%02x)\r\n", in it66353_get_rx_vclk()
2138 DEBUG("RXP%d clock > 340M\r\n", port); in it66353_get_rx_vclk()
2141 DEBUG("RXP%d clock > 148M\r\n", port); in it66353_get_rx_vclk()
2144 DEBUG("RXP%d clock > 100M\r\n", port); in it66353_get_rx_vclk()
2147 DEBUG("RXP%d clock < 100M\r\n", port); in it66353_get_rx_vclk()
2170 DEBUG("--RXP-%d 5V Chg => 5V = %d\r\n", port, (rddata & 0x01)); in it66353_detect_port()
2187 DEBUG("--RXP-%d RX Clock Valid Chg => RxCLK_Valid = %d\r\n", in it66353_detect_port()
2192 DEBUG("--RXP-%d RX Clock Stable Chg => RxCLK_Stb = %d\r\n\r\n", in it66353_detect_port()
2197 DEBUG("--RXP-%d RX Clock Frequency Change ...\r\n", port); in it66353_detect_port()
2204 DEBUG("--RXP-%d RX Clock Ratio Chg => Clk_Ratio = %d \r\n", in it66353_detect_port()
2209 DEBUG("--RXP%d RX Scrambling Enable Chg => Scr_En = %d \r\n", in it66353_detect_port()
2217 DEBUG("--RXP%d RX Scrambling Status Chg => ScrbSts = %d \r\n", in it66353_detect_port()
2222 DEBUG("--RXP%d RX HDMI2 Detected Interrupt => HDMI2DetSts = %d \r\n", in it66353_detect_port()
2233 DEBUG("--RXP%d EDID Bus Hang\r\n", port); in it66353_detect_port()
2266 DEBUG("..RX5V change\r\n"); in it66353_rx_irq()
2282 DEBUG("..RX HDMIMode chg => HDMIMode = %d\r\n", in it66353_rx_irq()
2287 DEBUG("..RX DeSkew Err\r\n"); in it66353_rx_irq()
2296 DEBUG("..RXP H2V FIFO Skew Fail\r\n"); in it66353_rx_irq()
2301 DEBUG("..RX CHx SymLock Chg => RxSymLock = %d\r\n", symlock); in it66353_rx_irq()
2308 DEBUG("..RX CH0 SymFIFORst\r\n"); in it66353_rx_irq()
2312 DEBUG("..RX CH1 SymFIFORst\r\n"); in it66353_rx_irq()
2316 DEBUG("..RX CH2 SymFIFORst\r\n"); in it66353_rx_irq()
2320 DEBUG("..RX CH0 SymLockRst\r\n"); in it66353_rx_irq()
2324 DEBUG("..RX CH1 SymLockRst\r\n"); in it66353_rx_irq()
2328 DEBUG("..RX CH2 SymLockRst\r\n"); in it66353_rx_irq()
2332 DEBUG("..RX FSM Fail\r\n"); in it66353_rx_irq()
2356 DEBUG("..RX CH0 Lag Err\r\n"); in it66353_rx_irq()
2360 DEBUG("..RX CH1 Lag Err\r\n"); in it66353_rx_irq()
2364 DEBUG("..RX CH2 Lag Err\r\n"); in it66353_rx_irq()
2372 DEBUG("..RX FW Timer Interrupt ...\r\n"); in it66353_rx_irq()
2397 DEBUG("..RX-P%d PWR5V Chg => PWR5V = %d\r\n", port, (rddata & 0x01)); in it66353_sw_irq()
2406 DEBUG("..RXP%d RX Clock Valid Chg => RxCLK_Valid = %d\r\n", in it66353_sw_irq()
2423 DEBUG("..RXP%d RX Clock Stable Chg => RxCLK_Stb = %d\r\n\r\n", in it66353_sw_irq()
2444 DEBUG("..RXP%d RX Clock Frequency Chg ...\r\n", port); in it66353_sw_irq()
2450 DEBUG("..RXP%d RX Clock Ratio Chg => Clk_Ratio = %d \r\n", in it66353_sw_irq()
2469 DEBUG("..RXP%d RX Scrambling Enable Chg => Scr_En = %d \r\n", in it66353_sw_irq()
2476 DEBUG("..RXP%d RX Scrambling Status Chg => ScrbSts = %d \r\n", in it66353_sw_irq()
2486 DEBUG("..RXP%d RX HDMI2 Detected Interrupt => HDMI2DetSts = %d \r\n", in it66353_sw_irq()
2491 DEBUG("..RXP%d EDID Bus Hang\r\n", port); in it66353_sw_irq()
2514 DEBUG(" => HDCP 0x74 NOACK\r\n"); in it66353_tx_irq()
2522 DEBUG(" => HPD High\r\n"); in it66353_tx_irq()
2524 DEBUG(" => HPD Low\r\n"); in it66353_tx_irq()
2534 DEBUG(" TX RxSen chg\r\n"); in it66353_tx_irq()
2577 DEBUG(" TX DDC FIFO Error\r\n"); in it66353_tx_irq()
2628 DEBUG("state_fsm %s -> %s (%d)\r\n", in __it66353_fsm_chg()
2636 DEBUG("state_fsm %d -> %d\r\n", it66353_gdev.vars.state_sys_fsm, new_state); in __it66353_fsm_chg()
2641 DEBUG("skip fsm chg 1\r\n"); in __it66353_fsm_chg()
2650 DEBUG("skip fsm chg 2\r\n"); in __it66353_fsm_chg()
2666 DEBUG("Active port change from P%d to P%d\r\n", in __it66353_fsm_chg()