Lines Matching +full:conversion +full:- +full:start +full:- +full:gpios
1 // SPDX-License-Identifier: GPL-2.0
8 * V0.0X01.0X01 add conversion gain control
9 * V0.0X01.0X02 add debug interface for conversion gain control
24 #include <linux/rk-camera-module.h>
25 #include <media/media-entity.h>
26 #include <media/v4l2-async.h>
27 #include <media/v4l2-ctrls.h>
28 #include <media/v4l2-subdev.h>
29 #include <media/v4l2-fwnode.h>
30 #include <media/v4l2-mediabus.h>
32 #include <linux/rk-preisp.h>
44 #define OF_CAMERA_HDR_MODE "rockchip,camera-hdr-mode"
722 return -EINVAL; in imx492_write_reg()
730 val_i = 4 - len; in imx492_write_reg()
736 return -EIO; in imx492_write_reg()
750 dev_info(&client->dev, "delay(%d) ms !\n", delay_ms); in imx492_write_array()
771 return -EINVAL; in imx492_read_reg()
775 msgs[0].addr = client->addr; in imx492_read_reg()
781 msgs[1].addr = client->addr; in imx492_read_reg()
784 msgs[1].buf = &data_be_p[4 - len]; in imx492_read_reg()
786 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); in imx492_read_reg()
788 return -EIO; in imx492_read_reg()
798 return abs(mode->width - framefmt->width) + in imx492_get_reso_dist()
799 abs(mode->height - framefmt->height); in imx492_get_reso_dist()
805 struct v4l2_mbus_framefmt *framefmt = &fmt->format; in imx492_find_best_fit()
808 int cur_best_fit_dist = -1; in imx492_find_best_fit()
811 for (i = 0; i < imx492->cfg_num; i++) { in imx492_find_best_fit()
812 dist = imx492_get_reso_dist(&imx492->support_modes[i], framefmt); in imx492_find_best_fit()
813 if ((cur_best_fit_dist == -1 || dist <= cur_best_fit_dist) && in imx492_find_best_fit()
814 imx492->support_modes[i].bus_fmt == framefmt->code) { in imx492_find_best_fit()
820 return &imx492->support_modes[cur_best_fit]; in imx492_find_best_fit()
832 mutex_lock(&imx492->mutex); in imx492_set_fmt()
835 fmt->format.code = mode->bus_fmt; in imx492_set_fmt()
836 fmt->format.width = mode->width; in imx492_set_fmt()
837 fmt->format.height = mode->height; in imx492_set_fmt()
838 fmt->format.field = V4L2_FIELD_NONE; in imx492_set_fmt()
839 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { in imx492_set_fmt()
841 *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format; in imx492_set_fmt()
843 mutex_unlock(&imx492->mutex); in imx492_set_fmt()
844 return -ENOTTY; in imx492_set_fmt()
847 imx492->cur_mode = mode; in imx492_set_fmt()
848 h_blank = mode->hts_def - mode->width; in imx492_set_fmt()
849 __v4l2_ctrl_modify_range(imx492->hblank, h_blank, in imx492_set_fmt()
851 vblank_def = mode->vts_def - mode->height; in imx492_set_fmt()
852 __v4l2_ctrl_modify_range(imx492->vblank, vblank_def, in imx492_set_fmt()
853 IMX492_VTS_MAX - mode->height, 1, in imx492_set_fmt()
855 imx492->cur_vts = imx492->cur_mode->vts_def; in imx492_set_fmt()
856 pixel_rate = (u32)link_freq_menu_items[mode->mipi_freq_idx] / in imx492_set_fmt()
857 mode->bpp * 2 * 4; in imx492_set_fmt()
858 __v4l2_ctrl_s_ctrl_int64(imx492->pixel_rate, pixel_rate); in imx492_set_fmt()
859 __v4l2_ctrl_s_ctrl(imx492->link_freq, mode->mipi_freq_idx); in imx492_set_fmt()
862 mutex_unlock(&imx492->mutex); in imx492_set_fmt()
872 const struct imx492_mode *mode = imx492->cur_mode; in imx492_get_fmt()
874 mutex_lock(&imx492->mutex); in imx492_get_fmt()
875 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { in imx492_get_fmt()
877 fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad); in imx492_get_fmt()
879 mutex_unlock(&imx492->mutex); in imx492_get_fmt()
880 return -ENOTTY; in imx492_get_fmt()
883 fmt->format.width = mode->width; in imx492_get_fmt()
884 fmt->format.height = mode->height; in imx492_get_fmt()
885 fmt->format.code = mode->bus_fmt; in imx492_get_fmt()
886 fmt->format.field = V4L2_FIELD_NONE; in imx492_get_fmt()
887 if (fmt->pad < PAD_MAX && mode->hdr_mode != NO_HDR) in imx492_get_fmt()
888 fmt->reserved[0] = mode->vc[fmt->pad]; in imx492_get_fmt()
890 fmt->reserved[0] = mode->vc[PAD0]; in imx492_get_fmt()
892 mutex_unlock(&imx492->mutex); in imx492_get_fmt()
903 if (code->index != 0) in imx492_enum_mbus_code()
904 return -EINVAL; in imx492_enum_mbus_code()
905 code->code = imx492->cur_mode->bus_fmt; in imx492_enum_mbus_code()
916 if (fse->index >= imx492->cfg_num) in imx492_enum_frame_sizes()
917 return -EINVAL; in imx492_enum_frame_sizes()
919 if (fse->code != imx492->support_modes[fse->index].bus_fmt) in imx492_enum_frame_sizes()
920 return -EINVAL; in imx492_enum_frame_sizes()
922 fse->min_width = imx492->support_modes[fse->index].width; in imx492_enum_frame_sizes()
923 fse->max_width = imx492->support_modes[fse->index].width; in imx492_enum_frame_sizes()
924 fse->max_height = imx492->support_modes[fse->index].height; in imx492_enum_frame_sizes()
925 fse->min_height = imx492->support_modes[fse->index].height; in imx492_enum_frame_sizes()
934 const struct imx492_mode *mode = imx492->cur_mode; in imx492_g_frame_interval()
936 fi->interval = mode->max_fps; in imx492_g_frame_interval()
945 const struct imx492_mode *mode = imx492->cur_mode; in imx492_g_mbus_config()
947 u32 lane_num = imx492->bus_cfg.bus.mipi_csi2.num_data_lanes; in imx492_g_mbus_config()
949 if (mode->hdr_mode == NO_HDR) { in imx492_g_mbus_config()
950 val = 1 << (lane_num - 1) | in imx492_g_mbus_config()
954 if (mode->hdr_mode == HDR_X2) in imx492_g_mbus_config()
955 val = 1 << (lane_num - 1) | in imx492_g_mbus_config()
959 if (mode->hdr_mode == HDR_X3) in imx492_g_mbus_config()
960 val = 1 << (lane_num - 1) | in imx492_g_mbus_config()
966 config->type = V4L2_MBUS_CSI2_DPHY; in imx492_g_mbus_config()
967 config->flags = val; in imx492_g_mbus_config()
976 strscpy(inf->base.sensor, IMX492_NAME, sizeof(inf->base.sensor)); in imx492_get_module_inf()
977 strscpy(inf->base.module, imx492->module_name, sizeof(inf->base.module)); in imx492_get_module_inf()
978 strscpy(inf->base.lens, imx492->len_name, sizeof(inf->base.lens)); in imx492_get_module_inf()
985 if (ch_info->index < PAD0 || ch_info->index >= PAD_MAX) in imx492_get_channel_info()
986 return -EINVAL; in imx492_get_channel_info()
987 ch_info->vc = imx492->cur_mode->vc[ch_info->index]; in imx492_get_channel_info()
988 ch_info->width = imx492->cur_mode->width; in imx492_get_channel_info()
989 ch_info->height = imx492->cur_mode->height; in imx492_get_channel_info()
990 ch_info->bus_fmt = imx492->cur_mode->bus_fmt; in imx492_get_channel_info()
1012 hdr->esp.mode = HDR_NORMAL_VC; in imx492_ioctl()
1013 hdr->hdr_mode = imx492->cur_mode->hdr_mode; in imx492_ioctl()
1017 w = imx492->cur_mode->width; in imx492_ioctl()
1018 h = imx492->cur_mode->height; in imx492_ioctl()
1019 for (i = 0; i < imx492->cfg_num; i++) { in imx492_ioctl()
1020 if (w == imx492->support_modes[i].width && in imx492_ioctl()
1021 h == imx492->support_modes[i].height && in imx492_ioctl()
1022 imx492->support_modes[i].hdr_mode == hdr->hdr_mode) { in imx492_ioctl()
1023 imx492->cur_mode = &imx492->support_modes[i]; in imx492_ioctl()
1027 if (i == imx492->cfg_num) { in imx492_ioctl()
1028 dev_err(&imx492->client->dev, in imx492_ioctl()
1030 hdr->hdr_mode, w, h); in imx492_ioctl()
1031 ret = -EINVAL; in imx492_ioctl()
1033 w = imx492->cur_mode->hts_def - imx492->cur_mode->width; in imx492_ioctl()
1034 h = imx492->cur_mode->vts_def - imx492->cur_mode->height; in imx492_ioctl()
1035 __v4l2_ctrl_modify_range(imx492->hblank, w, w, 1, w); in imx492_ioctl()
1036 __v4l2_ctrl_modify_range(imx492->vblank, h, in imx492_ioctl()
1037 IMX492_VTS_MAX - imx492->cur_mode->height, in imx492_ioctl()
1039 imx492->cur_vts = imx492->cur_mode->vts_def; in imx492_ioctl()
1040 pixel_rate = (u32)link_freq_menu_items[imx492->cur_mode->mipi_freq_idx] in imx492_ioctl()
1041 / imx492->cur_mode->bpp * 2 * in imx492_ioctl()
1042 imx492->bus_cfg.bus.mipi_csi2.num_data_lanes; in imx492_ioctl()
1043 __v4l2_ctrl_s_ctrl_int64(imx492->pixel_rate, in imx492_ioctl()
1045 __v4l2_ctrl_s_ctrl(imx492->link_freq, in imx492_ioctl()
1046 imx492->cur_mode->mipi_freq_idx); in imx492_ioctl()
1053 ret |= imx492_write_reg(imx492->client, IMX492_REG_CTRL_STANDBY, in imx492_ioctl()
1056 ret |= imx492_write_reg(imx492->client, IMX492_REG_CTRL_STANDBY, in imx492_ioctl()
1066 *sync_mode = imx492->sync_mode; in imx492_ioctl()
1070 imx492->sync_mode = *sync_mode; in imx492_ioctl()
1073 ret = -ENOIOCTLCMD; in imx492_ioctl()
1099 ret = -ENOMEM; in imx492_compat_ioctl32()
1107 ret = -EFAULT; in imx492_compat_ioctl32()
1114 ret = -ENOMEM; in imx492_compat_ioctl32()
1122 ret = -EFAULT; in imx492_compat_ioctl32()
1128 ret = -ENOMEM; in imx492_compat_ioctl32()
1136 ret = -EFAULT; in imx492_compat_ioctl32()
1143 ret = -ENOMEM; in imx492_compat_ioctl32()
1151 ret = -EFAULT; in imx492_compat_ioctl32()
1157 ret = -ENOMEM; in imx492_compat_ioctl32()
1165 ret = -EFAULT; in imx492_compat_ioctl32()
1173 ret = -EFAULT; in imx492_compat_ioctl32()
1180 ret = -EFAULT; in imx492_compat_ioctl32()
1186 ret = -ENOMEM; in imx492_compat_ioctl32()
1194 ret = -EFAULT; in imx492_compat_ioctl32()
1203 ret = -EFAULT; in imx492_compat_ioctl32()
1211 ret = -EFAULT; in imx492_compat_ioctl32()
1214 ret = -ENOIOCTLCMD; in imx492_compat_ioctl32()
1227 ret = imx492_write_array(imx492->client, imx492->cur_mode->reg_list); in __imx492_start_stream()
1231 ret = __v4l2_ctrl_handler_setup(&imx492->ctrl_handler); in __imx492_start_stream()
1234 if (imx492->has_init_exp && imx492->cur_mode->hdr_mode != NO_HDR) { in __imx492_start_stream()
1235 ret = imx492_ioctl(&imx492->subdev, PREISP_CMD_SET_HDRAE_EXP, in __imx492_start_stream()
1236 &imx492->init_hdrae_exp); in __imx492_start_stream()
1238 dev_err(&imx492->client->dev, in __imx492_start_stream()
1243 ret |= imx492_write_reg(imx492->client, IMX492_REG_CTRL_STANDBY, in __imx492_start_stream()
1246 ret |= imx492_write_reg(imx492->client, IMX492_REG_CTRL_XMSTA, in __imx492_start_stream()
1248 ret |= imx492_write_reg(imx492->client, IMX492_REG_CTRL_SYNCDRV, in __imx492_start_stream()
1258 imx492->has_init_exp = false; in __imx492_stop_stream()
1259 ret = imx492_write_reg(imx492->client, IMX492_REG_CTRL_STANDBY, in __imx492_stop_stream()
1267 struct i2c_client *client = imx492->client; in imx492_s_stream()
1270 mutex_lock(&imx492->mutex); in imx492_s_stream()
1272 if (on == imx492->streaming) in imx492_s_stream()
1276 ret = pm_runtime_get_sync(&client->dev); in imx492_s_stream()
1278 pm_runtime_put_noidle(&client->dev); in imx492_s_stream()
1284 v4l2_err(sd, "start stream failed while write regs\n"); in imx492_s_stream()
1285 pm_runtime_put(&client->dev); in imx492_s_stream()
1290 pm_runtime_put(&client->dev); in imx492_s_stream()
1293 imx492->streaming = on; in imx492_s_stream()
1296 mutex_unlock(&imx492->mutex); in imx492_s_stream()
1304 struct i2c_client *client = imx492->client; in imx492_s_power()
1307 mutex_lock(&imx492->mutex); in imx492_s_power()
1309 /* If the power state is not modified - no work to do. */ in imx492_s_power()
1310 if (imx492->power_on == !!on) in imx492_s_power()
1314 ret = pm_runtime_get_sync(&client->dev); in imx492_s_power()
1316 pm_runtime_put_noidle(&client->dev); in imx492_s_power()
1319 imx492->power_on = true; in imx492_s_power()
1321 pm_runtime_put(&client->dev); in imx492_s_power()
1322 imx492->power_on = false; in imx492_s_power()
1326 mutex_unlock(&imx492->mutex); in imx492_s_power()
1336 struct device *dev = &imx492->client->dev; in __imx492_power_on()
1338 if (!IS_ERR_OR_NULL(imx492->pins_default)) { in __imx492_power_on()
1339 ret = pinctrl_select_state(imx492->pinctrl, in __imx492_power_on()
1340 imx492->pins_default); in __imx492_power_on()
1345 ret = clk_set_rate(imx492->xvclk, imx492->cur_mode->mclk); in __imx492_power_on()
1348 if (clk_get_rate(imx492->xvclk) != imx492->cur_mode->mclk) in __imx492_power_on()
1349 dev_warn(dev, "xvclk mismatched, %lu\n", clk_get_rate(imx492->xvclk)); in __imx492_power_on()
1351 imx492->cur_mclk = imx492->cur_mode->mclk; in __imx492_power_on()
1352 ret = clk_prepare_enable(imx492->xvclk); in __imx492_power_on()
1358 ret = regulator_bulk_enable(IMX492_NUM_SUPPLIES, imx492->supplies); in __imx492_power_on()
1363 if (!IS_ERR(imx492->pwdn_gpio)) in __imx492_power_on()
1364 gpiod_set_value_cansleep(imx492->pwdn_gpio, 0); in __imx492_power_on()
1365 if (!IS_ERR(imx492->reset_gpio)) in __imx492_power_on()
1366 gpiod_set_value_cansleep(imx492->reset_gpio, 0); in __imx492_power_on()
1372 clk_disable_unprepare(imx492->xvclk); in __imx492_power_on()
1380 struct device *dev = &imx492->client->dev; in __imx492_power_off()
1382 if (!IS_ERR(imx492->pwdn_gpio)) in __imx492_power_off()
1383 gpiod_set_value_cansleep(imx492->pwdn_gpio, 1); in __imx492_power_off()
1384 clk_disable_unprepare(imx492->xvclk); in __imx492_power_off()
1385 if (!IS_ERR(imx492->reset_gpio)) in __imx492_power_off()
1386 gpiod_set_value_cansleep(imx492->reset_gpio, 1); in __imx492_power_off()
1387 if (!IS_ERR_OR_NULL(imx492->pins_sleep)) { in __imx492_power_off()
1388 ret = pinctrl_select_state(imx492->pinctrl, imx492->pins_sleep); in __imx492_power_off()
1392 regulator_bulk_disable(IMX492_NUM_SUPPLIES, imx492->supplies); in __imx492_power_off()
1421 v4l2_subdev_get_try_format(sd, fh->pad, 0); in imx492_open()
1422 const struct imx492_mode *def_mode = &imx492->support_modes[0]; in imx492_open()
1424 mutex_lock(&imx492->mutex); in imx492_open()
1426 try_fmt->width = def_mode->width; in imx492_open()
1427 try_fmt->height = def_mode->height; in imx492_open()
1428 try_fmt->code = def_mode->bus_fmt; in imx492_open()
1429 try_fmt->field = V4L2_FIELD_NONE; in imx492_open()
1431 mutex_unlock(&imx492->mutex); in imx492_open()
1444 if (fie->index >= imx492->cfg_num) in imx492_enum_frame_interval()
1445 return -EINVAL; in imx492_enum_frame_interval()
1447 fie->code = imx492->support_modes[fie->index].bus_fmt; in imx492_enum_frame_interval()
1448 fie->width = imx492->support_modes[fie->index].width; in imx492_enum_frame_interval()
1449 fie->height = imx492->support_modes[fie->index].height; in imx492_enum_frame_interval()
1450 fie->interval = imx492->support_modes[fie->index].max_fps; in imx492_enum_frame_interval()
1451 fie->reserved[0] = imx492->support_modes[fie->index].hdr_mode; in imx492_enum_frame_interval()
1455 #define CROP_START(SRC, DST) (((SRC) - (DST)) / 2 / 4 * 4)
1477 if (sel->target == V4L2_SEL_TGT_CROP_BOUNDS) { in imx492_get_selection()
1478 sel->r.left = 168;// CROP_START(imx492->cur_mode->width, DST_WIDTH_8192); in imx492_get_selection()
1479 sel->r.width = DST_WIDTH_8192; in imx492_get_selection()
1480 sel->r.top = CROP_START(imx492->cur_mode->height, DST_HEIGHT_4320); in imx492_get_selection()
1481 sel->r.height = DST_HEIGHT_4320; in imx492_get_selection()
1482 dev_info(&imx492->client->dev, "sel->r.left %d sel->r.top %d\n", in imx492_get_selection()
1483 sel->r.left, sel->r.top); in imx492_get_selection()
1486 return -EINVAL; in imx492_get_selection()
1531 struct imx492 *imx492 = container_of(ctrl->handler, in imx492_set_ctrl()
1533 struct i2c_client *client = imx492->client; in imx492_set_ctrl()
1534 const struct imx492_mode *mode = imx492->cur_mode; in imx492_set_ctrl()
1543 switch (ctrl->id) { in imx492_set_ctrl()
1546 if (mode->hdr_mode == NO_HDR) { in imx492_set_ctrl()
1547 max = imx492->cur_mode->height + ctrl->val - 3; in imx492_set_ctrl()
1548 __v4l2_ctrl_modify_range(imx492->exposure, in imx492_set_ctrl()
1549 imx492->exposure->minimum, max, in imx492_set_ctrl()
1550 imx492->exposure->step, in imx492_set_ctrl()
1551 imx492->exposure->default_value); in imx492_set_ctrl()
1556 if (!pm_runtime_get_if_in_use(&client->dev)) in imx492_set_ctrl()
1559 switch (ctrl->id) { in imx492_set_ctrl()
1561 if (mode->hdr_mode == NO_HDR) { in imx492_set_ctrl()
1562 SHR = mode->vts_def - ctrl->val; in imx492_set_ctrl()
1563 ret |= imx492_write_reg(imx492->client, IMX492_EXPO_REG_L, in imx492_set_ctrl()
1566 ret |= imx492_write_reg(imx492->client, IMX492_EXPO_REG_H, in imx492_set_ctrl()
1569 dev_info(&client->dev, "ctr_val 0x%x set exposure 0x%x\n", in imx492_set_ctrl()
1570 ctrl->val, SHR); in imx492_set_ctrl()
1574 if (mode->hdr_mode == NO_HDR) { in imx492_set_ctrl()
1575 if (ctrl->val <= 1957) { in imx492_set_ctrl()
1576 reg_val = ctrl->val; in imx492_set_ctrl()
1577 ret |= imx492_write_reg(imx492->client, IMX492_AGAIN_REG_H, in imx492_set_ctrl()
1580 ret |= imx492_write_reg(imx492->client, IMX492_AGAIN_REG_L, in imx492_set_ctrl()
1583 ret |= imx492_write_reg(imx492->client, IMX492_DGAIN_REG, in imx492_set_ctrl()
1585 } else if (ctrl->val <= 3914) { in imx492_set_ctrl()
1586 reg_val = ctrl->val - 1957; in imx492_set_ctrl()
1587 ret |= imx492_write_reg(imx492->client, IMX492_AGAIN_REG_H, in imx492_set_ctrl()
1590 ret |= imx492_write_reg(imx492->client, IMX492_AGAIN_REG_L, in imx492_set_ctrl()
1593 ret |= imx492_write_reg(imx492->client, IMX492_DGAIN_REG, in imx492_set_ctrl()
1595 } else if (ctrl->val <= 5871) { in imx492_set_ctrl()
1596 reg_val = ctrl->val - 3914; in imx492_set_ctrl()
1597 ret |= imx492_write_reg(imx492->client, IMX492_AGAIN_REG_H, in imx492_set_ctrl()
1600 ret |= imx492_write_reg(imx492->client, IMX492_AGAIN_REG_L, in imx492_set_ctrl()
1603 ret |= imx492_write_reg(imx492->client, IMX492_DGAIN_REG, in imx492_set_ctrl()
1605 } else if (ctrl->val <= 7828) { in imx492_set_ctrl()
1606 reg_val = ctrl->val - 5871; in imx492_set_ctrl()
1607 ret |= imx492_write_reg(imx492->client, IMX492_AGAIN_REG_H, in imx492_set_ctrl()
1610 ret |= imx492_write_reg(imx492->client, IMX492_AGAIN_REG_L, in imx492_set_ctrl()
1613 ret |= imx492_write_reg(imx492->client, IMX492_DGAIN_REG, in imx492_set_ctrl()
1616 dev_err(&client->dev, "set analog gain 0x%x\n", in imx492_set_ctrl()
1617 ctrl->val); in imx492_set_ctrl()
1621 vts = ctrl->val + imx492->cur_mode->height; in imx492_set_ctrl()
1623 imx492->cur_vts = vts; in imx492_set_ctrl()
1624 ret |= imx492_write_reg(imx492->client, IMX492_VTS_REG_L, in imx492_set_ctrl()
1627 ret |= imx492_write_reg(imx492->client, IMX492_VTS_REG_M, in imx492_set_ctrl()
1630 ret |= imx492_write_reg(imx492->client, IMX492_VTS_REG_H, in imx492_set_ctrl()
1634 dev_info(&client->dev, "set vts 0x%x\n", in imx492_set_ctrl()
1642 dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n", in imx492_set_ctrl()
1643 __func__, ctrl->id, ctrl->val); in imx492_set_ctrl()
1647 pm_runtime_put(&client->dev); in imx492_set_ctrl()
1665 handler = &imx492->ctrl_handler; in imx492_initialize_controls()
1666 mode = imx492->cur_mode; in imx492_initialize_controls()
1670 handler->lock = &imx492->mutex; in imx492_initialize_controls()
1672 imx492->link_freq = v4l2_ctrl_new_int_menu(handler, in imx492_initialize_controls()
1675 __v4l2_ctrl_s_ctrl(imx492->link_freq, imx492->cur_mode->mipi_freq_idx); in imx492_initialize_controls()
1676 pixel_rate = (u32)link_freq_menu_items[mode->mipi_freq_idx] / mode->bpp in imx492_initialize_controls()
1677 * 2 * imx492->bus_cfg.bus.mipi_csi2.num_data_lanes; in imx492_initialize_controls()
1678 imx492->pixel_rate = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE, in imx492_initialize_controls()
1682 h_blank = mode->hts_def - mode->width; in imx492_initialize_controls()
1683 imx492->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK, in imx492_initialize_controls()
1685 if (imx492->hblank) in imx492_initialize_controls()
1686 imx492->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; in imx492_initialize_controls()
1688 vblank_def = mode->vts_def - mode->height; in imx492_initialize_controls()
1689 imx492->vblank = v4l2_ctrl_new_std(handler, &imx492_ctrl_ops, in imx492_initialize_controls()
1691 IMX492_VTS_MAX - mode->height, in imx492_initialize_controls()
1693 imx492->cur_vts = mode->vts_def; in imx492_initialize_controls()
1695 exposure_max = mode->vts_def - 4; in imx492_initialize_controls()
1696 imx492->exposure = v4l2_ctrl_new_std(handler, &imx492_ctrl_ops, in imx492_initialize_controls()
1699 mode->exp_def); in imx492_initialize_controls()
1701 imx492->anal_a_gain = v4l2_ctrl_new_std(handler, &imx492_ctrl_ops, in imx492_initialize_controls()
1708 if (handler->error) { in imx492_initialize_controls()
1709 ret = handler->error; in imx492_initialize_controls()
1710 dev_err(&imx492->client->dev, "Failed to init controls(%d)\n", ret); in imx492_initialize_controls()
1714 imx492->subdev.ctrl_handler = handler; in imx492_initialize_controls()
1715 imx492->has_init_exp = false; in imx492_initialize_controls()
1716 imx492->isHCG = false; in imx492_initialize_controls()
1729 struct device *dev = &imx492->client->dev; in imx492_check_sensor_id()
1737 return -ENODEV; in imx492_check_sensor_id()
1750 imx492->supplies[i].supply = imx492_supply_names[i]; in imx492_configure_regulators()
1752 return devm_regulator_bulk_get(&imx492->client->dev, in imx492_configure_regulators()
1754 imx492->supplies); in imx492_configure_regulators()
1760 struct device *dev = &client->dev; in imx492_probe()
1761 struct device_node *node = dev->of_node; in imx492_probe()
1779 return -ENOMEM; in imx492_probe()
1782 &imx492->module_index); in imx492_probe()
1784 &imx492->module_facing); in imx492_probe()
1786 &imx492->module_name); in imx492_probe()
1788 &imx492->len_name); in imx492_probe()
1791 return -EINVAL; in imx492_probe()
1797 imx492->sync_mode = NO_SYNC_MODE; in imx492_probe()
1801 imx492->sync_mode = EXTERNAL_MASTER_MODE; in imx492_probe()
1803 imx492->sync_mode = INTERNAL_MASTER_MODE; in imx492_probe()
1805 imx492->sync_mode = SLAVE_MODE; in imx492_probe()
1813 imx492->client = client; in imx492_probe()
1814 endpoint = of_graph_get_next_endpoint(dev->of_node, NULL); in imx492_probe()
1817 return -EINVAL; in imx492_probe()
1820 &imx492->bus_cfg); in imx492_probe()
1825 imx492->support_modes = supported_modes; in imx492_probe()
1826 imx492->cfg_num = ARRAY_SIZE(supported_modes); in imx492_probe()
1828 for (i = 0; i < imx492->cfg_num; i++) { in imx492_probe()
1829 if (hdr_mode == imx492->support_modes[i].hdr_mode) { in imx492_probe()
1830 imx492->cur_mode = &imx492->support_modes[i]; in imx492_probe()
1834 imx492->xvclk = devm_clk_get(dev, "xvclk"); in imx492_probe()
1835 if (IS_ERR(imx492->xvclk)) { in imx492_probe()
1837 return -EINVAL; in imx492_probe()
1840 imx492->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); in imx492_probe()
1841 if (IS_ERR(imx492->reset_gpio)) in imx492_probe()
1842 dev_warn(dev, "Failed to get reset-gpios\n"); in imx492_probe()
1844 imx492->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW); in imx492_probe()
1845 if (IS_ERR(imx492->pwdn_gpio)) in imx492_probe()
1846 dev_warn(dev, "Failed to get pwdn-gpios\n"); in imx492_probe()
1848 imx492->pinctrl = devm_pinctrl_get(dev); in imx492_probe()
1849 if (!IS_ERR(imx492->pinctrl)) { in imx492_probe()
1850 imx492->pins_default = in imx492_probe()
1851 pinctrl_lookup_state(imx492->pinctrl, in imx492_probe()
1853 if (IS_ERR(imx492->pins_default)) in imx492_probe()
1856 imx492->pins_sleep = in imx492_probe()
1857 pinctrl_lookup_state(imx492->pinctrl, in imx492_probe()
1859 if (IS_ERR(imx492->pins_sleep)) in imx492_probe()
1871 mutex_init(&imx492->mutex); in imx492_probe()
1873 sd = &imx492->subdev; in imx492_probe()
1888 sd->internal_ops = &imx492_internal_ops; in imx492_probe()
1889 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS; in imx492_probe()
1892 imx492->pad.flags = MEDIA_PAD_FL_SOURCE; in imx492_probe()
1893 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR; in imx492_probe()
1894 ret = media_entity_pads_init(&sd->entity, 1, &imx492->pad); in imx492_probe()
1900 if (strcmp(imx492->module_facing, "back") == 0) in imx492_probe()
1905 snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s", in imx492_probe()
1906 imx492->module_index, facing, in imx492_probe()
1907 IMX492_NAME, dev_name(sd->dev)); in imx492_probe()
1922 media_entity_cleanup(&sd->entity); in imx492_probe()
1927 v4l2_ctrl_handler_free(&imx492->ctrl_handler); in imx492_probe()
1929 mutex_destroy(&imx492->mutex); in imx492_probe()
1941 media_entity_cleanup(&sd->entity); in imx492_remove()
1943 v4l2_ctrl_handler_free(&imx492->ctrl_handler); in imx492_remove()
1944 mutex_destroy(&imx492->mutex); in imx492_remove()
1946 pm_runtime_disable(&client->dev); in imx492_remove()
1947 if (!pm_runtime_status_suspended(&client->dev)) in imx492_remove()
1949 pm_runtime_set_suspended(&client->dev); in imx492_remove()