Lines Matching +full:0 +full:x209c

7  * V0.0X01.0X00 init version
38 #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x00)
49 #define CHIP_ID 0x0556
50 #define HI556_REG_CHIP_ID 0x0f16
52 #define HI556_REG_CTRL_MODE 0x0A00
53 #define HI556_MODE_SW_STANDBY 0x00
54 #define HI556_MODE_STREAMING 0x01
56 #define HI556_REG_EXPOSURE_H 0x0073
57 #define HI556_REG_EXPOSURE_M 0x0074
58 #define HI556_REG_EXPOSURE_L 0x0075
60 #define HI556_FETCH_HIGH_BYTE_EXP(VAL) (((VAL) >> 16) & 0xF) /* 4 Bits */
61 #define HI556_FETCH_MIDDLE_BYTE_EXP(VAL) (((VAL) >> 8) & 0xFF) /* 8 Bits */
62 #define HI556_FETCH_LOW_BYTE_EXP(VAL) ((VAL) & 0xFF) /* 8 Bits */
66 #define HI556_VTS_MAX 0x7fff
68 #define HI556_REG_GAIN 0x0077
69 #define HI556_GAIN_MASK 0xff
71 #define ANALOG_GAIN_MIN 0x00
72 #define ANALOG_GAIN_MAX 0xF0
74 #define ANALOG_GAIN_DEFAULT 0x10
76 #define HI556_REG_GROUP 0x0046
78 #define HI556_REG_TEST_PATTERN 0x0A05
79 #define HI556_TEST_PATTERN_ENABLE 0x01
80 #define HI556_TEST_PATTERN_DISABLE 0x0
81 #define HI556_REG_TEST_PATTERN_SELECT 0x0201
83 #define HI556_REG_VTS 0x0006
84 #define HI556_FLIP_MIRROR_REG 0x000e
85 #define HI556_FETCH_MIRROR(VAL, ENABLE) (ENABLE ? VAL | 0x01 : VAL & 0xfe)
86 #define HI556_FETCH_FLIP(VAL, ENABLE) (ENABLE ? VAL | 0x02 : VAL & 0xfd)
87 #define REG_NULL 0xFFFF
88 #define DELAY_MS 0xEEEE /* Array delay token */
179 * linelength 2816(0xb00)
180 * framelength 1988(0x7c0)
187 {0x0a00, 0x0000},
188 {0x0e00, 0x0102},
189 {0x0e02, 0x0102},
190 {0x0e0c, 0x0100},
191 {0x2000, 0x7400},
192 {0x2002, 0x001c},
193 {0x2004, 0x0242},
194 {0x2006, 0x0942},
195 {0x2008, 0x7007},
196 {0x200a, 0x0fd9},
197 {0x200c, 0x0259},
198 {0x200e, 0x7008},
199 {0x2010, 0x160e},
200 {0x2012, 0x0047},
201 {0x2014, 0x2118},
202 {0x2016, 0x0041},
203 {0x2018, 0x00d8},
204 {0x201a, 0x0145},
205 {0x201c, 0x0006},
206 {0x201e, 0x0181},
207 {0x2020, 0x13cc},
208 {0x2022, 0x2057},
209 {0x2024, 0x7001},
210 {0x2026, 0x0fca},
211 {0x2028, 0x00cb},
212 {0x202a, 0x009f},
213 {0x202c, 0x7002},
214 {0x202e, 0x13cc},
215 {0x2030, 0x019b},
216 {0x2032, 0x014d},
217 {0x2034, 0x2987},
218 {0x2036, 0x2766},
219 {0x2038, 0x0020},
220 {0x203a, 0x2060},
221 {0x203c, 0x0e5d},
222 {0x203e, 0x181d},
223 {0x2040, 0x2066},
224 {0x2042, 0x20c4},
225 {0x2044, 0x5000},
226 {0x2046, 0x0005},
227 {0x2048, 0x0000},
228 {0x204a, 0x01db},
229 {0x204c, 0x025a},
230 {0x204e, 0x00c0},
231 {0x2050, 0x0005},
232 {0x2052, 0x0006},
233 {0x2054, 0x0ad9},
234 {0x2056, 0x0259},
235 {0x2058, 0x0618},
236 {0x205a, 0x0258},
237 {0x205c, 0x2266},
238 {0x205e, 0x20c8},
239 {0x2060, 0x2060},
240 {0x2062, 0x707b},
241 {0x2064, 0x0fdd},
242 {0x2066, 0x81b8},
243 {0x2068, 0x5040},
244 {0x206a, 0x0020},
245 {0x206c, 0x5060},
246 {0x206e, 0x3143},
247 {0x2070, 0x5081},
248 {0x2072, 0x025c},
249 {0x2074, 0x7800},
250 {0x2076, 0x7400},
251 {0x2078, 0x001c},
252 {0x207a, 0x0242},
253 {0x207c, 0x0942},
254 {0x207e, 0x0bd9},
255 {0x2080, 0x0259},
256 {0x2082, 0x7008},
257 {0x2084, 0x160e},
258 {0x2086, 0x0047},
259 {0x2088, 0x2118},
260 {0x208a, 0x0041},
261 {0x208c, 0x00d8},
262 {0x208e, 0x0145},
263 {0x2090, 0x0006},
264 {0x2092, 0x0181},
265 {0x2094, 0x13cc},
266 {0x2096, 0x2057},
267 {0x2098, 0x7001},
268 {0x209a, 0x0fca},
269 {0x209c, 0x00cb},
270 {0x209e, 0x009f},
271 {0x20a0, 0x7002},
272 {0x20a2, 0x13cc},
273 {0x20a4, 0x019b},
274 {0x20a6, 0x014d},
275 {0x20a8, 0x2987},
276 {0x20aa, 0x2766},
277 {0x20ac, 0x0020},
278 {0x20ae, 0x2060},
279 {0x20b0, 0x0e5d},
280 {0x20b2, 0x181d},
281 {0x20b4, 0x2066},
282 {0x20b6, 0x20c4},
283 {0x20b8, 0x50a0},
284 {0x20ba, 0x0005},
285 {0x20bc, 0x0000},
286 {0x20be, 0x01db},
287 {0x20c0, 0x025a},
288 {0x20c2, 0x00c0},
289 {0x20c4, 0x0005},
290 {0x20c6, 0x0006},
291 {0x20c8, 0x0ad9},
292 {0x20ca, 0x0259},
293 {0x20cc, 0x0618},
294 {0x20ce, 0x0258},
295 {0x20d0, 0x2266},
296 {0x20d2, 0x20c8},
297 {0x20d4, 0x2060},
298 {0x20d6, 0x707b},
299 {0x20d8, 0x0fdd},
300 {0x20da, 0x86b8},
301 {0x20dc, 0x50e0},
302 {0x20de, 0x0020},
303 {0x20e0, 0x5100},
304 {0x20e2, 0x3143},
305 {0x20e4, 0x5121},
306 {0x20e6, 0x7800},
307 {0x20e8, 0x3140},
308 {0x20ea, 0x01c4},
309 {0x20ec, 0x01c1},
310 {0x20ee, 0x01c0},
311 {0x20f0, 0x01c4},
312 {0x20f2, 0x2700},
313 {0x20f4, 0x3d40},
314 {0x20f6, 0x7800},
315 {0x20f8, 0xffff},
316 {0x27fe, 0xe000},
317 {0x3000, 0x60f8},
318 {0x3002, 0x187f},
319 {0x3004, 0x7060},
320 {0x3006, 0x0114},
321 {0x3008, 0x60b0},
322 {0x300a, 0x1473},
323 {0x300c, 0x0013},
324 {0x300e, 0x140f},
325 {0x3010, 0x0040},
326 {0x3012, 0x100f},
327 {0x3014, 0x60f8},
328 {0x3016, 0x187f},
329 {0x3018, 0x7060},
330 {0x301a, 0x0114},
331 {0x301c, 0x60b0},
332 {0x301e, 0x1473},
333 {0x3020, 0x0013},
334 {0x3022, 0x140f},
335 {0x3024, 0x0040},
336 {0x3026, 0x000f},
337 {0x0b00, 0x0000},
338 {0x0b02, 0x0045},
339 {0x0b04, 0xb405},
340 {0x0b06, 0xc403},
341 {0x0b08, 0x0081},
342 {0x0b0a, 0x8252},
343 {0x0b0c, 0xf814},
344 {0x0b0e, 0xc618},
345 {0x0b10, 0xa828},
346 {0x0b12, 0x004c},
347 {0x0b14, 0x4068},
348 {0x0b16, 0x0000},
349 {0x0f30, 0x6e25},
350 {0x0f32, 0x7067},
351 {0x0954, 0x0009},
352 {0x0956, 0x1100},
353 {0x0958, 0xcc80},
354 {0x095a, 0x0000},
355 {0x0c00, 0x1110},
356 {0x0c02, 0x0011},
357 {0x0c04, 0x0000},
358 {0x0c06, 0x0200},
359 {0x0c10, 0x0040},
360 {0x0c12, 0x0040},
361 {0x0c14, 0x0040},
362 {0x0c16, 0x0040},
363 {0x0a10, 0x4000},
364 {0x3068, 0xf800},
365 {0x306a, 0xf876},
366 {0x006c, 0x0000},
367 {0x005e, 0x0200},
368 {0x000e, 0x0100},
369 {0x0e0a, 0x0001},
370 {0x004a, 0x0100},
371 {0x004c, 0x0000},
372 {0x004e, 0x0100},
373 {0x000c, 0x0022},
374 {0x0008, 0x0b00},
375 {0x005a, 0x0202},
376 {0x0012, 0x000e},
377 {0x0018, 0x0a31},
378 {0x0022, 0x0008},
379 {0x0028, 0x0017},
380 {0x0024, 0x0028},
381 {0x002a, 0x002d},
382 {0x0026, 0x0030},
383 {0x002c, 0x07c7},
384 {0x002e, 0x1111},
385 {0x0030, 0x1111},
386 {0x0032, 0x1111},
387 {0x0006, 0x0823},
388 {0x0a22, 0x0000},
389 {0x0a12, 0x0a20},
390 {0x0a14, 0x0798},
391 {0x003e, 0x0000},
392 {0x0074, 0x0821},
393 {0x0070, 0x0411},
394 {0x0002, 0x0000},
395 {0x0a02, 0x0100},
396 {0x0a24, 0x0100},
397 {0x0076, 0x0000},
398 {0x0060, 0x0000},
399 {0x0062, 0x0530},
400 {0x0064, 0x0500},
401 {0x0066, 0x0530},
402 {0x0068, 0x0500},
403 {0x0122, 0x0300},
404 {0x015a, 0xff08},
405 {0x0804, 0x0200},
406 {0x005c, 0x0102},
407 {0x0a1a, 0x0800},
408 {0x003c, 0x0101}, //fix framerate
409 {REG_NULL, 0x00},
423 {0x0a00, 0x0000},
424 {0x0b0a, 0x8252},
425 {0x0f30, 0x6e25},
426 {0x0f32, 0x7067},
427 {0x004a, 0x0100},
428 {0x004c, 0x0000},
429 {0x004e, 0x0000},
430 {0x000c, 0x0022},
431 {0x0008, 0x0b00},
432 {0x005a, 0x0202},
433 {0x0012, 0x000e},
434 {0x0018, 0x0a31},
435 {0x0022, 0x0008},
436 {0x0028, 0x0017},
437 {0x0024, 0x0028},
438 {0x002a, 0x002d},
439 {0x0026, 0x0030},
440 {0x002c, 0x07c7},
441 {0x002e, 0x1111},
442 {0x0030, 0x1111},
443 {0x0032, 0x1111},
444 {0x0006, 0x0823},
445 {0x0a22, 0x0000},
446 {0x0a12, 0x0a20},
447 {0x0a14, 0x0798},
448 {0x003e, 0x0000},
449 {0x0804, 0x0200},
450 {0x0a04, 0x014a},
451 {0x090c, 0x0fdc},
452 {0x090e, 0x002d},
453 {0x0902, 0x4319},
454 {0x0914, 0xc10a},
455 {0x0916, 0x071f},
456 {0x0918, 0x0408},
457 {0x091a, 0x0c0d},
458 {0x091c, 0x0f09},
459 {0x091e, 0x0a00},
460 //{0x0a00, 0x0100},
461 {REG_NULL, 0x00},
472 .exp_def = 0x0810,
473 .hts_def = 0x0B00,
474 .vts_def = 0x0823,
508 dev_dbg(&client->dev, "write reg(0x%x val:0x%x)!\n", reg, val); in hi556_write_reg()
513 buf[0] = reg >> 8; in hi556_write_reg()
514 buf[1] = reg & 0xff; in hi556_write_reg()
526 "write reg(0x%x val:0x%x)failed !\n", reg, val); in hi556_write_reg()
529 return 0; in hi556_write_reg()
535 int i, delay_ms, ret = 0; in hi556_write_array()
537 for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++) { in hi556_write_array()
559 __be32 data_be = 0; in hi556_read_reg()
568 msgs[0].addr = client->addr; in hi556_read_reg()
569 msgs[0].flags = 0; in hi556_read_reg()
570 msgs[0].len = 2; in hi556_read_reg()
571 msgs[0].buf = (u8 *)&reg_addr_be; in hi556_read_reg()
585 return 0; in hi556_read_reg()
594 int ret = 0; in hi556_reg_verify()
597 for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++) { in hi556_reg_verify()
601 dev_info(&client->dev, "%s: 0x%04x is 0x%x instead of 0x%x\n", in hi556_reg_verify()
622 int cur_best_fit = 0; in hi556_find_best_fit()
626 for (i = 0; i < hi556->cfg_num; i++) { in hi556_find_best_fit()
672 return 0; in hi556_set_fmt()
698 return 0; in hi556_get_fmt()
705 if (code->index != 0) in hi556_enum_mbus_code()
709 return 0; in hi556_enum_mbus_code()
729 return 0; in hi556_enum_frame_sizes()
739 HI556_REG_VALUE_08BIT, 0x01 << (pattern - 1)); in hi556_enable_test_pattern()
744 return 0; in hi556_enable_test_pattern()
755 return 0; in hi556_g_frame_interval()
769 return 0; in hi556_g_mbus_config()
775 memset(inf, 0, sizeof(*inf)); in hi556_get_module_inf()
794 long ret = 0; in hi556_ioctl()
795 u32 stream = 0; in hi556_ioctl()
831 u32 stream = 0; in hi556_compat_ioctl32()
925 int ret = 0; in hi556_s_stream()
941 if (ret < 0) { in hi556_s_stream()
970 int ret = 0; in hi556_s_power()
981 if (ret < 0) { in hi556_s_power()
1025 if (ret < 0) in __hi556_power_on()
1029 if (ret < 0) in __hi556_power_on()
1035 if (ret < 0) { in __hi556_power_on()
1041 if (ret < 0) { in __hi556_power_on()
1056 return 0; in __hi556_power_on()
1070 gpiod_set_value_cansleep(hi556->pwdn_gpio, 0); in __hi556_power_off()
1073 gpiod_set_value_cansleep(hi556->reset_gpio, 0); in __hi556_power_off()
1077 if (ret < 0) in __hi556_power_off()
1081 gpiod_set_value_cansleep(hi556->power_gpio, 0); in __hi556_power_off()
1103 return 0; in hi556_runtime_suspend()
1111 v4l2_subdev_get_try_format(sd, fh->pad, 0); in hi556_open()
1112 const struct hi556_mode *def_mode = &supported_modes[0]; in hi556_open()
1124 return 0; in hi556_open()
1143 fie->reserved[0] = supported_modes[fie->index].hdr_mode; in hi556_enum_frame_interval()
1145 return 0; in hi556_enum_frame_interval()
1189 int ret = 0; in hi556_set_exposure_reg()
1190 u32 cal_shutter = 0; in hi556_set_exposure_reg()
1196 HI556_REG_VALUE_08BIT, 0x01); in hi556_set_exposure_reg()
1210 HI556_REG_VALUE_08BIT, 0x00); in hi556_set_exposure_reg()
1217 int ret = 0; in hi556_set_gain_reg()
1220 HI556_REG_VALUE_08BIT, 0x01); in hi556_set_gain_reg()
1224 HI556_REG_VALUE_08BIT, 0x00); in hi556_set_gain_reg()
1235 u32 val = 0; in hi556_set_ctrl()
1236 int ret = 0; in hi556_set_ctrl()
1251 return 0; in hi556_set_ctrl()
1255 dev_dbg(&client->dev, "set exposure value 0x%x\n", ctrl->val); in hi556_set_ctrl()
1260 dev_dbg(&client->dev, "set analog gain value 0x%x\n", ctrl->val); in hi556_set_ctrl()
1264 dev_dbg(&client->dev, "set vb value 0x%x\n", ctrl->val); in hi556_set_ctrl()
1287 dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n", in hi556_set_ctrl()
1318 0, 0, link_freq_menu_items); in hi556_initialize_controls()
1323 0, hi556->pixel_rate, 1, hi556->pixel_rate); in hi556_initialize_controls()
1351 0, 0, hi556_test_pattern_menu); in hi556_initialize_controls()
1354 V4L2_CID_HFLIP, 0, 1, 1, 0); in hi556_initialize_controls()
1356 V4L2_CID_VFLIP, 0, 1, 1, 0); in hi556_initialize_controls()
1367 return 0; in hi556_initialize_controls()
1379 u32 id = 0; in hi556_check_sensor_id()
1391 return 0; in hi556_check_sensor_id()
1398 for (i = 0; i < HI556_NUM_SUPPLIES; i++) in hi556_configure_regulators()
1419 rval = fwnode_property_read_u32_array(fwnode, "data-lanes", NULL, 0); in hi556_parse_of()
1420 if (rval <= 0) { in hi556_parse_of()
1427 hi556->cur_mode = &supported_modes_2lane[0]; in hi556_parse_of()
1440 return 0; in hi556_parse_of()
1455 (DRIVER_VERSION & 0xff00) >> 8, in hi556_probe()
1456 DRIVER_VERSION & 0x00ff); in hi556_probe()
1466 hi556->module_index = 0; in hi556_probe()
1505 if (ret != 0) in hi556_probe()
1536 if (ret < 0) { in hi556_probe()
1553 if (ret < 0) in hi556_probe()
1557 memset(facing, 0, sizeof(facing)); in hi556_probe()
1558 if (strcmp(hi556->module_facing, "back") == 0) in hi556_probe()
1559 facing[0] = 'b'; in hi556_probe()
1561 facing[0] = 'f'; in hi556_probe()
1577 return 0; in hi556_probe()
1610 return 0; in hi556_remove()
1622 { "hynix,hi556", 0 },