Lines Matching refs:RSTV0910_P2_VTH12

978 	write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 0, state->vth[0]);  in set_vth_default()
979 	write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 1, state->vth[1]);  in set_vth_default()
980 	write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 2, state->vth[2]);  in set_vth_default()
981 	write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 3, state->vth[3]);  in set_vth_default()
982 	write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 4, state->vth[4]);  in set_vth_default()
983 	write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 5, state->vth[5]);  in set_vth_default()
1010 	write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 0, state->vth[0]);  in set_vth()
1011 	write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 1, state->vth[1]);  in set_vth()
1012 	write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 2, state->vth[2]);  in set_vth()
1013 	write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 3, state->vth[3]);  in set_vth()
1014 	write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 4, state->vth[4]);  in set_vth()
1015 	write_reg(state, RSTV0910_P2_VTH12 + state->regoff + 5, state->vth[5]);  in set_vth()