210 static int write_register(struct mxl *state, u32 reg, u32 val)  in write_register()  function
324 	stat = write_register(state, reg, data);  in update_by_mnemonic()
822 		write_register(state, HYDRA_CRYSTAL_SETTING, 0);  in cfg_dev_xtal()
824 		write_register(state, HYDRA_CRYSTAL_SETTING, 1);  in cfg_dev_xtal()
826 	write_register(state, HYDRA_CRYSTAL_CAP, cap);  in cfg_dev_xtal()
902 	status = write_register(state, FW_DL_SIGN_ADDR, 0);  in do_firmware_download()
923 				write_register(state, 0x90720000, 0);  in do_firmware_download()
984 	status = write_register(state, HYDRA_RESET_TRANSPORT_FIFO_REG,  in firmware_download()
988 	status = write_register(state, HYDRA_RESET_BBAND_REG,  in firmware_download()
992 	status = write_register(state, HYDRA_RESET_XBAR_REG,  in firmware_download()
1000 	status = write_register(state, HYDRA_MODULES_CLK_2_REG,  in firmware_download()
1016 		status = write_register(state, 0x90720000, 1);  in firmware_download()
1022 		status = write_register(state, 0x9076B510, 1);  in firmware_download()
1035 	status = write_register(state, XPT_DMD0_BASEADDR, 0x76543210);  in firmware_download()