1 // SPDX-License-Identifier: GPL-2.0
3  * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
70 	int pin_out = d->hwirq;  in pdc_enable_intr()
99 	void __iomem *cfg_reg = spi_cfg->base + pin * 4;  in __spi_pin_read()
100 	u64 scm_cfg_reg = spi_cfg->start + pin * 4;  in __spi_pin_read()
102 	if (spi_cfg->scm_io) {  in __spi_pin_read()
114 	void __iomem *cfg_reg = spi_cfg->base + pin * 4;  in __spi_pin_write()
115 	u64 scm_cfg_reg = spi_cfg->start + pin * 4;  in __spi_pin_write()
117 	if (spi_cfg->scm_io)  in __spi_pin_write()
125 	int spi = hwirq - 32;  in spi_configure_type()
134 	if (pin * 4 > spi_cfg->size)  in spi_configure_type()
135 		return -EFAULT;  in spi_configure_type()
154  * Level sensitive active low    LOW
155  * Rising edge sensitive         NOT USED
156  * Falling edge sensitive        LOW
157  * Dual Edge sensitive           NOT USED
158  * Level sensitive active High   HIGH
159  * Falling Edge sensitive        NOT USED
160  * Rising edge sensitive         HIGH
161  * Dual Edge sensitive           HIGH
179  * If @type is level, then forward that as level high as PDC
184 	int parent_hwirq = d->parent_data->hwirq;  in qcom_pdc_gic_set_type()
210 		return -EINVAL;  in qcom_pdc_gic_set_type()
213 	old_pdc_type = pdc_reg_read(IRQ_i_CFG, d->hwirq);  in qcom_pdc_gic_set_type()
214 	pdc_reg_write(IRQ_i_CFG, d->hwirq, pdc_type);  in qcom_pdc_gic_set_type()
266 		if (pin >= region->pin_base &&  in get_parent_hwirq()
267 		    pin < region->pin_base + region->cnt)  in get_parent_hwirq()
268 			return (region->parent_base + pin - region->pin_base);  in get_parent_hwirq()
277 	if (is_of_node(fwspec->fwnode)) {  in qcom_pdc_translate()
278 		if (fwspec->param_count != 2)  in qcom_pdc_translate()
279 			return -EINVAL;  in qcom_pdc_translate()
281 		*hwirq = fwspec->param[0];  in qcom_pdc_translate()
282 		*type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK;  in qcom_pdc_translate()
286 	return -EINVAL;  in qcom_pdc_translate()
309 		return irq_domain_disconnect_hierarchy(domain->parent, virq);  in qcom_pdc_alloc()
317 	parent_fwspec.fwnode      = domain->parent->fwnode;  in qcom_pdc_alloc()
356 		return irq_domain_disconnect_hierarchy(domain->parent, virq);  in qcom_pdc_gpio_alloc()
364 	parent_fwspec.fwnode      = domain->parent->fwnode;  in qcom_pdc_gpio_alloc()
392 	n = of_property_count_elems_of_size(np, "qcom,pdc-ranges", sizeof(u32));  in pdc_setup_pin_mapping()
394 		return -EINVAL;  in pdc_setup_pin_mapping()
400 		return -ENOMEM;  in pdc_setup_pin_mapping()
404 		ret = of_property_read_u32_index(np, "qcom,pdc-ranges",  in pdc_setup_pin_mapping()
409 		ret = of_property_read_u32_index(np, "qcom,pdc-ranges",  in pdc_setup_pin_mapping()
414 		ret = of_property_read_u32_index(np, "qcom,pdc-ranges",  in pdc_setup_pin_mapping()
441 		return -ENXIO;  in qcom_pdc_init()
447 		ret = -ENXIO;  in qcom_pdc_init()
453 		pr_err("%pOF: failed to init PDC pin-hwirq mapping\n", node);  in qcom_pdc_init()
462 		ret = -ENOMEM;  in qcom_pdc_init()
470 			ret = -ENOMEM;  in qcom_pdc_init()
473 		spi_cfg->scm_io = of_find_property(node,  in qcom_pdc_init()
474 						   "qcom,scm-spi-cfg", NULL);  in qcom_pdc_init()
475 		spi_cfg->size = resource_size(&res);  in qcom_pdc_init()
476 		if (spi_cfg->scm_io) {  in qcom_pdc_init()
477 			spi_cfg->start = res.start;  in qcom_pdc_init()
479 			spi_cfg->base = ioremap(res.start, spi_cfg->size);  in qcom_pdc_init()
480 			if (!spi_cfg->base) {  in qcom_pdc_init()
481 				ret = -ENOMEM;  in qcom_pdc_init()
494 		ret = -ENOMEM;  in qcom_pdc_init()
513 	struct device_node *np = pdev->dev.of_node;  in qcom_pdc_probe()
528 		.name = "qcom-pdc",