Lines Matching refs:IRQS_PER_BANK
25 #define IRQS_PER_BANK 32 macro
260 for (i = 0; i < nbanks; i++, irq_base += IRQS_PER_BANK) { in stm32_irq_handler()
264 for_each_set_bit(n, &pending, IRQS_PER_BANK) { in stm32_irq_handler()
277 u32 mask = BIT(d->hwirq % IRQS_PER_BANK); in stm32_exti_set_type()
428 u32 val = BIT(d->hwirq % IRQS_PER_BANK); in stm32_exti_write_bit()
440 val |= BIT(d->hwirq % IRQS_PER_BANK); in stm32_exti_set_bit()
453 val &= ~BIT(d->hwirq % IRQS_PER_BANK); in stm32_exti_clr_bit()
543 u32 mask = BIT(d->hwirq % IRQS_PER_BANK); in stm32_exti_h_set_wake()
617 u32 mask = BIT(d->hwirq % IRQS_PER_BANK); in stm32_exti_h_retrigger()
662 bank = hwirq / IRQS_PER_BANK; in stm32_exti_h_domain_alloc()
761 domain = irq_domain_add_linear(node, drv_data->bank_nr * IRQS_PER_BANK, in stm32_exti_init()
770 ret = irq_alloc_domain_generic_chips(domain, IRQS_PER_BANK, 1, "exti", in stm32_exti_init()
785 gc = irq_get_domain_generic_chip(domain, i * IRQS_PER_BANK); in stm32_exti_init()
796 gc->wake_enabled = IRQ_MSK(IRQS_PER_BANK); in stm32_exti_init()
903 drv_data->bank_nr * IRQS_PER_BANK, in stm32_exti_probe()