146 static void __iomem *per_cpu_int_base;  variable
180 		writel(hwirq, per_cpu_int_base +  in armada_370_xp_irq_mask()
192 		writel(hwirq, per_cpu_int_base +  in armada_370_xp_irq_unmask()
290 	reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK_OFFS)  in armada_370_xp_msi_init()
293 	writel(reg, per_cpu_int_base +  in armada_370_xp_msi_init()
297 	writel(1, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS);  in armada_370_xp_msi_init()
324 	       per_cpu_int_base + ARMADA_370_XP_INT_FABRIC_MASK_OFFS);  in armada_xp_mpic_perf_init()
333 	reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK_OFFS);  in armada_370_xp_ipi_mask()
335 	writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK_OFFS);  in armada_370_xp_ipi_mask()
341 	reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK_OFFS);  in armada_370_xp_ipi_unmask()
343 	writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK_OFFS);  in armada_370_xp_ipi_unmask()
369 	writel(~BIT(d->hwirq), per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS);  in armada_370_xp_ipi_eoi()
479 		writel(i, per_cpu_int_base + ARMADA_370_XP_INT_SET_MASK_OFFS);  in armada_xp_mpic_smp_cpu_init()
482 	writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK_OFFS);  in armada_xp_mpic_smp_cpu_init()
485 	writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS);  in armada_xp_mpic_smp_cpu_init()
488 	writel(0, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS);  in armada_xp_mpic_smp_cpu_init()
551 		writel(hw, per_cpu_int_base +  in armada_370_xp_mpic_irq_map()
581 	msimask = readl_relaxed(per_cpu_int_base +  in armada_370_xp_handle_msi_irq()
585 	writel(~msimask, per_cpu_int_base +  in armada_370_xp_handle_msi_irq()
618 	irqmap = readl_relaxed(per_cpu_int_base + ARMADA_375_PPI_CAUSE);  in armada_370_xp_mpic_handle_cascade_irq()
649 		irqstat = readl_relaxed(per_cpu_int_base +  in armada_370_xp_handle_irq()
672 			ipimask = readl_relaxed(per_cpu_int_base +  in armada_370_xp_handle_irq()
686 	doorbell_mask_reg = readl(per_cpu_int_base +  in armada_370_xp_mpic_suspend()
710 			writel(irq, per_cpu_int_base +  in armada_370_xp_mpic_resume()
731 	       per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK_OFFS);  in armada_370_xp_mpic_resume()
733 		writel(0, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS);  in armada_370_xp_mpic_resume()
735 		writel(1, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS);  in armada_370_xp_mpic_resume()
766 	per_cpu_int_base = ioremap(per_cpu_int_res.start,  in armada_370_xp_mpic_of_init()
768 	BUG_ON(!per_cpu_int_base);  in armada_370_xp_mpic_of_init()