265 	void __iomem *sfrbase;		/* our registers */  member
288 	writel(CTRL_ENABLE, data->sfrbase + REG_MMU_CTRL);  in sysmmu_unblock()
295 	writel(CTRL_BLOCK, data->sfrbase + REG_MMU_CTRL);  in sysmmu_block()
296 	while ((i > 0) && !(readl(data->sfrbase + REG_MMU_STATUS) & 1))  in sysmmu_block()
299 	if (!(readl(data->sfrbase + REG_MMU_STATUS) & 1)) {  in sysmmu_block()
310 		writel(0x1, data->sfrbase + REG_MMU_FLUSH);  in __sysmmu_tlb_invalidate()
312 		writel(0x1, data->sfrbase + REG_V5_MMU_FLUSH_ALL);  in __sysmmu_tlb_invalidate()
323 				     data->sfrbase + REG_MMU_FLUSH_ENTRY);  in __sysmmu_tlb_invalidate_entry()
329 				     data->sfrbase + REG_V5_MMU_FLUSH_ENTRY);  in __sysmmu_tlb_invalidate_entry()
332 				     data->sfrbase + REG_V5_MMU_FLUSH_START);  in __sysmmu_tlb_invalidate_entry()
334 				     data->sfrbase + REG_V5_MMU_FLUSH_END);  in __sysmmu_tlb_invalidate_entry()
335 			writel(1, data->sfrbase + REG_V5_MMU_FLUSH_RANGE);  in __sysmmu_tlb_invalidate_entry()
343 		writel(pgd, data->sfrbase + REG_PT_BASE_ADDR);  in __sysmmu_set_ptbase()
346 			     data->sfrbase + REG_V5_PT_BASE_PFN);  in __sysmmu_set_ptbase()
373 	ver = readl(data->sfrbase + REG_MMU_VERSION);  in __sysmmu_get_version()
432 	itype = __ffs(readl(data->sfrbase + reg_status));  in exynos_sysmmu_irq()
440 	fault_addr = readl(data->sfrbase + finfo->addr_reg);  in exynos_sysmmu_irq()
449 	writel(1 << itype, data->sfrbase + reg_clear);  in exynos_sysmmu_irq()
467 	writel(CTRL_DISABLE, data->sfrbase + REG_MMU_CTRL);  in __sysmmu_disable()
468 	writel(0, data->sfrbase + REG_MMU_CFG);  in __sysmmu_disable()
488 	writel(cfg, data->sfrbase + REG_MMU_CFG);  in __sysmmu_init_config()
498 	writel(CTRL_BLOCK, data->sfrbase + REG_MMU_CTRL);  in __sysmmu_enable()
501 	writel(CTRL_ENABLE, data->sfrbase + REG_MMU_CTRL);  in __sysmmu_enable()
581 	data->sfrbase = devm_ioremap_resource(dev, res);  in exynos_sysmmu_probe()
582 	if (IS_ERR(data->sfrbase))  in exynos_sysmmu_probe()
583 		return PTR_ERR(data->sfrbase);  in exynos_sysmmu_probe()