Lines Matching refs:ret
68 int ret; in hfi1_pcie_init() local
71 ret = pci_enable_device(pdev); in hfi1_pcie_init()
72 if (ret) { in hfi1_pcie_init()
85 dd_dev_err(dd, "pci enable failed: error %d\n", -ret); in hfi1_pcie_init()
86 return ret; in hfi1_pcie_init()
89 ret = pci_request_regions(pdev, DRIVER_NAME); in hfi1_pcie_init()
90 if (ret) { in hfi1_pcie_init()
91 dd_dev_err(dd, "pci_request_regions fails: err %d\n", -ret); in hfi1_pcie_init()
95 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); in hfi1_pcie_init()
96 if (ret) { in hfi1_pcie_init()
102 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); in hfi1_pcie_init()
103 if (ret) { in hfi1_pcie_init()
104 dd_dev_err(dd, "Unable to set DMA mask: %d\n", ret); in hfi1_pcie_init()
107 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); in hfi1_pcie_init()
109 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); in hfi1_pcie_init()
111 if (ret) { in hfi1_pcie_init()
112 dd_dev_err(dd, "Unable to set DMA consistent mask: %d\n", ret); in hfi1_pcie_init()
122 return ret; in hfi1_pcie_init()
147 int ret = 0; in hfi1_pcie_ddinit() local
217 ret = -ENOMEM; in hfi1_pcie_ddinit()
219 return ret; in hfi1_pcie_ddinit()
274 int ret; in update_lbus_info() local
276 ret = pcie_capability_read_word(dd->pcidev, PCI_EXP_LNKSTA, &linkstat); in update_lbus_info()
277 if (ret) { in update_lbus_info()
296 int ret; in pcie_speeds() local
306 ret = pcie_capability_read_dword(dd->pcidev, PCI_EXP_LNKCAP, &linkcap); in pcie_speeds()
307 if (ret) { in pcie_speeds()
309 return pcibios_err_to_errno(ret); in pcie_speeds()
344 int ret; in restore_pci_variables() local
346 ret = pci_write_config_word(dd->pcidev, PCI_COMMAND, dd->pci_command); in restore_pci_variables()
347 if (ret) in restore_pci_variables()
350 ret = pci_write_config_dword(dd->pcidev, PCI_BASE_ADDRESS_0, in restore_pci_variables()
352 if (ret) in restore_pci_variables()
355 ret = pci_write_config_dword(dd->pcidev, PCI_BASE_ADDRESS_1, in restore_pci_variables()
357 if (ret) in restore_pci_variables()
360 ret = pci_write_config_dword(dd->pcidev, PCI_ROM_ADDRESS, dd->pci_rom); in restore_pci_variables()
361 if (ret) in restore_pci_variables()
364 ret = pcie_capability_write_word(dd->pcidev, PCI_EXP_DEVCTL, in restore_pci_variables()
366 if (ret) in restore_pci_variables()
369 ret = pcie_capability_write_word(dd->pcidev, PCI_EXP_LNKCTL, in restore_pci_variables()
371 if (ret) in restore_pci_variables()
374 ret = pcie_capability_write_word(dd->pcidev, PCI_EXP_DEVCTL2, in restore_pci_variables()
376 if (ret) in restore_pci_variables()
379 ret = pci_write_config_dword(dd->pcidev, PCI_CFG_MSIX0, dd->pci_msix0); in restore_pci_variables()
380 if (ret) in restore_pci_variables()
384 ret = pci_write_config_dword(dd->pcidev, PCIE_CFG_TPH2, in restore_pci_variables()
386 if (ret) in restore_pci_variables()
393 return pcibios_err_to_errno(ret); in restore_pci_variables()
403 int ret; in save_pci_variables() local
405 ret = pci_read_config_dword(dd->pcidev, PCI_BASE_ADDRESS_0, in save_pci_variables()
407 if (ret) in save_pci_variables()
410 ret = pci_read_config_dword(dd->pcidev, PCI_BASE_ADDRESS_1, in save_pci_variables()
412 if (ret) in save_pci_variables()
415 ret = pci_read_config_dword(dd->pcidev, PCI_ROM_ADDRESS, &dd->pci_rom); in save_pci_variables()
416 if (ret) in save_pci_variables()
419 ret = pci_read_config_word(dd->pcidev, PCI_COMMAND, &dd->pci_command); in save_pci_variables()
420 if (ret) in save_pci_variables()
423 ret = pcie_capability_read_word(dd->pcidev, PCI_EXP_DEVCTL, in save_pci_variables()
425 if (ret) in save_pci_variables()
428 ret = pcie_capability_read_word(dd->pcidev, PCI_EXP_LNKCTL, in save_pci_variables()
430 if (ret) in save_pci_variables()
433 ret = pcie_capability_read_word(dd->pcidev, PCI_EXP_DEVCTL2, in save_pci_variables()
435 if (ret) in save_pci_variables()
438 ret = pci_read_config_dword(dd->pcidev, PCI_CFG_MSIX0, &dd->pci_msix0); in save_pci_variables()
439 if (ret) in save_pci_variables()
443 ret = pci_read_config_dword(dd->pcidev, PCIE_CFG_TPH2, in save_pci_variables()
445 if (ret) in save_pci_variables()
452 return pcibios_err_to_errno(ret); in save_pci_variables()
473 int ret; in tune_pcie_caps() local
479 ret = pcie_capability_read_word(dd->pcidev, PCI_EXP_DEVCTL, &ectl); in tune_pcie_caps()
480 if ((!ret) && !(ectl & PCI_EXP_DEVCTL_EXT_TAG)) { in tune_pcie_caps()
483 ret = pcie_capability_write_word(dd->pcidev, in tune_pcie_caps()
485 if (ret) in tune_pcie_caps()
567 pci_ers_result_t ret = PCI_ERS_RESULT_RECOVERED; in pci_error_detected() local
577 ret = PCI_ERS_RESULT_NEED_RESET; in pci_error_detected()
588 ret = PCI_ERS_RESULT_DISCONNECT; in pci_error_detected()
596 return ret; in pci_error_detected()
604 pci_ers_result_t ret = PCI_ERS_RESULT_RECOVERED; in pci_mmio_enabled() local
609 ret = PCI_ERS_RESULT_NEED_RESET; in pci_mmio_enabled()
612 words, ret); in pci_mmio_enabled()
614 return ret; in pci_mmio_enabled()
782 int ret; in load_eq_table() local
794 ret = pci_read_config_dword(dd->pcidev, in load_eq_table()
796 if (ret) { in load_eq_table()
998 int ret; in do_pcie_gen3_transition() local
1063 ret = -ENOSYS; in do_pcie_gen3_transition()
1068 ret = acquire_chip_resource(dd, CR_SBUS, SBUS_TIMEOUT); in do_pcie_gen3_transition()
1069 if (ret) { in do_pcie_gen3_transition()
1072 return ret; in do_pcie_gen3_transition()
1090 ret = load_pcie_firmware(dd); in do_pcie_gen3_transition()
1091 if (ret) { in do_pcie_gen3_transition()
1165 ret = load_eq_table(dd, eq, fs, div); in do_pcie_gen3_transition()
1166 if (ret) in do_pcie_gen3_transition()
1255 ret = pcie_capability_read_word(parent, PCI_EXP_LNKCTL2, &lnkctl2); in do_pcie_gen3_transition()
1256 if (ret) { in do_pcie_gen3_transition()
1270 ret = pcie_capability_write_word(parent, in do_pcie_gen3_transition()
1272 if (ret) { in do_pcie_gen3_transition()
1282 ret = pcie_capability_read_word(dd->pcidev, PCI_EXP_LNKCTL2, &lnkctl2); in do_pcie_gen3_transition()
1283 if (ret) { in do_pcie_gen3_transition()
1295 ret = pcie_capability_write_word(dd->pcidev, PCI_EXP_LNKCTL2, lnkctl2); in do_pcie_gen3_transition()
1296 if (ret) { in do_pcie_gen3_transition()
1326 ret = trigger_sbr(dd); in do_pcie_gen3_transition()
1327 if (ret) in do_pcie_gen3_transition()
1333 ret = pci_read_config_word(dd->pcidev, PCI_VENDOR_ID, &vendor); in do_pcie_gen3_transition()
1334 if (ret) { in do_pcie_gen3_transition()
1337 __func__, ret); in do_pcie_gen3_transition()
1344 ret = -EIO; in do_pcie_gen3_transition()
1350 ret = restore_pci_variables(dd); in do_pcie_gen3_transition()
1351 if (ret) { in do_pcie_gen3_transition()
1376 ret = -ENOSYS; in do_pcie_gen3_transition()
1387 ret = pci_read_config_dword(dd->pcidev, PCIE_CFG_SPCIE2, ®32); in do_pcie_gen3_transition()
1388 if (ret) { in do_pcie_gen3_transition()
1403 ret = -EIO; in do_pcie_gen3_transition()
1412 ret = -EIO; in do_pcie_gen3_transition()
1432 ret = -EIO; in do_pcie_gen3_transition()
1445 if (ret && !return_error) { in do_pcie_gen3_transition()
1447 ret = 0; in do_pcie_gen3_transition()
1451 return ret; in do_pcie_gen3_transition()