Lines Matching refs:CNTR_32BIT

1239 	  0, flags | CNTR_32BIT, \
1245 	  0, flags | CNTR_32BIT, \
1271 	  0, flags | CNTR_32BIT, \
1292 	  0, flags | CNTR_32BIT, \
1298 	  0, flags | CNTR_32BIT, \
4295 				      CNTR_NORMAL | CNTR_32BIT | CNTR_SDMA,
4298 			     CNTR_NORMAL | CNTR_32BIT | CNTR_SDMA,
4301 			     CNTR_NORMAL | CNTR_32BIT | CNTR_SDMA,
4304 				  CNTR_NORMAL | CNTR_32BIT | CNTR_SDMA,
4307 				      CNTR_NORMAL | CNTR_32BIT | CNTR_SDMA,
5125 [C_SW_LINK_DOWN] = CNTR_ELEM("SwLinkDown", 0, 0, CNTR_SYNTH | CNTR_32BIT,
5127 [C_SW_LINK_UP] = CNTR_ELEM("SwLinkUp", 0, 0, CNTR_SYNTH | CNTR_32BIT,
5131 [C_SW_XMIT_DSCD] = CNTR_ELEM("XmitDscd", 0, 0, CNTR_SYNTH | CNTR_32BIT,
5134 				CNTR_SYNTH | CNTR_32BIT | CNTR_VL,
12400 		if (entry->flags & CNTR_32BIT) {  in read_dev_port_cntr()
12444 		if (entry->flags & CNTR_32BIT) {  in write_dev_port_cntr()
12670 				if (dev_cntrs[i].flags & CNTR_32BIT)  in init_cntrs()
12682 				if (dev_cntrs[i].flags & CNTR_32BIT)  in init_cntrs()
12691 			if (dev_cntrs[i].flags & CNTR_32BIT)  in init_cntrs()
12727 				if (dev_cntrs[i].flags & CNTR_32BIT) {  in init_cntrs()
12742 				if (dev_cntrs[i].flags & CNTR_32BIT) {  in init_cntrs()
12754 			if (dev_cntrs[i].flags & CNTR_32BIT) {  in init_cntrs()
12794 				if (port_cntrs[i].flags & CNTR_32BIT)  in init_cntrs()
12803 			if (port_cntrs[i].flags & CNTR_32BIT)  in init_cntrs()
12829 				if (port_cntrs[i].flags & CNTR_32BIT) {  in init_cntrs()
12842 			if (port_cntrs[i].flags & CNTR_32BIT) {  in init_cntrs()