Lines Matching refs:TSL2772_CMD_REG
75 #define TSL2772_CMD_REG 0x80 macro
325 TSL2772_CMD_REG | TSL2772_STATUS); in tsl2772_read_status()
339 TSL2772_CMD_REG | TSL2772_CNTRL, data); in tsl2772_write_control_reg()
356 TSL2772_CMD_REG | TSL2772_CMD_AUTOINC_PROTO | in tsl2772_read_autoinc_regs()
366 TSL2772_CMD_REG | lower_reg); in tsl2772_read_autoinc_regs()
376 TSL2772_CMD_REG | upper_reg); in tsl2772_read_autoinc_regs()
386 TSL2772_CMD_REG | TSL2772_CMD_REPEAT_PROTO | in tsl2772_read_autoinc_regs()
661 TSL2772_CMD_REG | TSL2772_CNTRL); in tsl2772_als_calibrate()
779 int reg = TSL2772_CMD_REG + i; in tsl2772_chip_on()
806 TSL2772_CMD_REG | TSL2772_CMD_SPL_FN | in tsl2772_chip_on()
1418 TSL2772_CMD_REG | TSL2772_CMD_SPL_FN | in tsl2772_event_handler()
1801 TSL2772_CMD_REG | TSL2772_CHIPID); in tsl2772_probe()
1812 ret = i2c_smbus_write_byte(clientp, TSL2772_CMD_REG | TSL2772_CNTRL); in tsl2772_probe()