136 	const struct stm32_adc_regs *sqr;  member
349 	.sqr = stm32f4_sq,
443 	.sqr = stm32h7_sq,
1002 	const struct stm32_adc_regs *sqr = adc->cfg->regs->sqr;  in stm32_adc_conf_scan_seq()  local
1024 		val = stm32_adc_readl(adc, sqr[i].reg);  in stm32_adc_conf_scan_seq()
1025 		val &= ~sqr[i].mask;  in stm32_adc_conf_scan_seq()
1026 		val |= chan->channel << sqr[i].shift;  in stm32_adc_conf_scan_seq()
1027 		stm32_adc_writel(adc, sqr[i].reg, val);  in stm32_adc_conf_scan_seq()
1034 	val = stm32_adc_readl(adc, sqr[0].reg);  in stm32_adc_conf_scan_seq()
1035 	val &= ~sqr[0].mask;  in stm32_adc_conf_scan_seq()
1036 	val |= ((i - 1) << sqr[0].shift);  in stm32_adc_conf_scan_seq()
1037 	stm32_adc_writel(adc, sqr[0].reg, val);  in stm32_adc_conf_scan_seq()
1177 	val = stm32_adc_readl(adc, regs->sqr[1].reg);  in stm32_adc_single_conv()
1178 	val &= ~regs->sqr[1].mask;  in stm32_adc_single_conv()
1179 	val |= chan->channel << regs->sqr[1].shift;  in stm32_adc_single_conv()
1180 	stm32_adc_writel(adc, regs->sqr[1].reg, val);  in stm32_adc_single_conv()
1183 	stm32_adc_clr_bits(adc, regs->sqr[0].reg, regs->sqr[0].mask);  in stm32_adc_single_conv()