Lines Matching refs:clock_sel
188 u8 clock_sel; member
325 unsigned int clock_sel; in ad7192_of_clock_select() local
327 clock_sel = AD7192_CLK_INT; in ad7192_of_clock_select()
332 clock_sel = AD7192_CLK_INT_CO; in ad7192_of_clock_select()
335 clock_sel = AD7192_CLK_EXT_MCLK1_2; in ad7192_of_clock_select()
337 clock_sel = AD7192_CLK_EXT_MCLK2; in ad7192_of_clock_select()
340 return clock_sel; in ad7192_of_clock_select()
369 AD7192_MODE_CLKSRC(st->clock_sel) | in ad7192_setup()
988 st->clock_sel = ad7192_of_clock_select(st); in ad7192_probe()
990 if (st->clock_sel == AD7192_CLK_EXT_MCLK1_2 || in ad7192_probe()
991 st->clock_sel == AD7192_CLK_EXT_MCLK2) { in ad7192_probe()
1015 if (st->clock_sel == AD7192_CLK_EXT_MCLK1_2 || in ad7192_probe()
1016 st->clock_sel == AD7192_CLK_EXT_MCLK2) in ad7192_probe()
1034 if (st->clock_sel == AD7192_CLK_EXT_MCLK1_2 || in ad7192_remove()
1035 st->clock_sel == AD7192_CLK_EXT_MCLK2) in ad7192_remove()