Lines Matching refs:MMA8452_INT_DRDY
91 #define MMA8452_INT_DRDY BIT(0) macro
1066 if (!(src & (data->chip_info->enabled_events | MMA8452_INT_DRDY))) in mma8452_interrupt()
1069 if (src & MMA8452_INT_DRDY) { in mma8452_interrupt()
1325 .all_events = MMA8452_INT_DRDY |
1342 .all_events = MMA8452_INT_DRDY |
1359 .all_events = MMA8452_INT_DRDY |
1371 .all_events = MMA8452_INT_DRDY |
1386 .all_events = MMA8452_INT_DRDY |
1401 .all_events = MMA8452_INT_DRDY |
1451 reg |= MMA8452_INT_DRDY; in mma8452_data_rdy_trigger_set_state()
1453 reg &= ~MMA8452_INT_DRDY; in mma8452_data_rdy_trigger_set_state()