Lines Matching refs:i2c_dev

298 static void dvc_writel(struct tegra_i2c_dev *i2c_dev, u32 val,  in dvc_writel()  argument
301 writel_relaxed(val, i2c_dev->base + reg); in dvc_writel()
304 static u32 dvc_readl(struct tegra_i2c_dev *i2c_dev, unsigned int reg) in dvc_readl() argument
306 return readl_relaxed(i2c_dev->base + reg); in dvc_readl()
313 static u32 tegra_i2c_reg_addr(struct tegra_i2c_dev *i2c_dev, unsigned int reg) in tegra_i2c_reg_addr() argument
315 if (i2c_dev->is_dvc) in tegra_i2c_reg_addr()
317 else if (i2c_dev->is_vi) in tegra_i2c_reg_addr()
323 static void i2c_writel(struct tegra_i2c_dev *i2c_dev, u32 val, unsigned int reg) in i2c_writel() argument
325 writel_relaxed(val, i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); in i2c_writel()
329 readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); in i2c_writel()
330 else if (i2c_dev->is_vi) in i2c_writel()
331 readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, I2C_INT_STATUS)); in i2c_writel()
334 static u32 i2c_readl(struct tegra_i2c_dev *i2c_dev, unsigned int reg) in i2c_readl() argument
336 return readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); in i2c_readl()
339 static void i2c_writesl(struct tegra_i2c_dev *i2c_dev, void *data, in i2c_writesl() argument
342 writesl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len); in i2c_writesl()
345 static void i2c_writesl_vi(struct tegra_i2c_dev *i2c_dev, void *data, in i2c_writesl_vi() argument
357 i2c_writel(i2c_dev, *data32++, reg); in i2c_writesl_vi()
360 static void i2c_readsl(struct tegra_i2c_dev *i2c_dev, void *data, in i2c_readsl() argument
363 readsl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len); in i2c_readsl()
366 static void tegra_i2c_mask_irq(struct tegra_i2c_dev *i2c_dev, u32 mask) in tegra_i2c_mask_irq() argument
370 int_mask = i2c_readl(i2c_dev, I2C_INT_MASK) & ~mask; in tegra_i2c_mask_irq()
371 i2c_writel(i2c_dev, int_mask, I2C_INT_MASK); in tegra_i2c_mask_irq()
374 static void tegra_i2c_unmask_irq(struct tegra_i2c_dev *i2c_dev, u32 mask) in tegra_i2c_unmask_irq() argument
378 int_mask = i2c_readl(i2c_dev, I2C_INT_MASK) | mask; in tegra_i2c_unmask_irq()
379 i2c_writel(i2c_dev, int_mask, I2C_INT_MASK); in tegra_i2c_unmask_irq()
384 struct tegra_i2c_dev *i2c_dev = args; in tegra_i2c_dma_complete() local
386 complete(&i2c_dev->dma_complete); in tegra_i2c_dma_complete()
389 static int tegra_i2c_dma_submit(struct tegra_i2c_dev *i2c_dev, size_t len) in tegra_i2c_dma_submit() argument
395 dev_dbg(i2c_dev->dev, "starting DMA for length: %zu\n", len); in tegra_i2c_dma_submit()
397 reinit_completion(&i2c_dev->dma_complete); in tegra_i2c_dma_submit()
399 dir = i2c_dev->msg_read ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV; in tegra_i2c_dma_submit()
400 chan = i2c_dev->msg_read ? i2c_dev->rx_dma_chan : i2c_dev->tx_dma_chan; in tegra_i2c_dma_submit()
402 dma_desc = dmaengine_prep_slave_single(chan, i2c_dev->dma_phys, in tegra_i2c_dma_submit()
406 dev_err(i2c_dev->dev, "failed to get %s DMA descriptor\n", in tegra_i2c_dma_submit()
407 i2c_dev->msg_read ? "RX" : "TX"); in tegra_i2c_dma_submit()
412 dma_desc->callback_param = i2c_dev; in tegra_i2c_dma_submit()
420 static void tegra_i2c_release_dma(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_release_dma() argument
422 if (i2c_dev->dma_buf) { in tegra_i2c_release_dma()
423 dma_free_coherent(i2c_dev->dma_dev, i2c_dev->dma_buf_size, in tegra_i2c_release_dma()
424 i2c_dev->dma_buf, i2c_dev->dma_phys); in tegra_i2c_release_dma()
425 i2c_dev->dma_buf = NULL; in tegra_i2c_release_dma()
428 if (i2c_dev->tx_dma_chan) { in tegra_i2c_release_dma()
429 dma_release_channel(i2c_dev->tx_dma_chan); in tegra_i2c_release_dma()
430 i2c_dev->tx_dma_chan = NULL; in tegra_i2c_release_dma()
433 if (i2c_dev->rx_dma_chan) { in tegra_i2c_release_dma()
434 dma_release_channel(i2c_dev->rx_dma_chan); in tegra_i2c_release_dma()
435 i2c_dev->rx_dma_chan = NULL; in tegra_i2c_release_dma()
439 static int tegra_i2c_init_dma(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_init_dma() argument
446 if (!i2c_dev->hw->has_apb_dma || i2c_dev->is_vi) in tegra_i2c_init_dma()
450 dev_dbg(i2c_dev->dev, "DMA support not enabled\n"); in tegra_i2c_init_dma()
454 chan = dma_request_chan(i2c_dev->dev, "rx"); in tegra_i2c_init_dma()
460 i2c_dev->rx_dma_chan = chan; in tegra_i2c_init_dma()
462 chan = dma_request_chan(i2c_dev->dev, "tx"); in tegra_i2c_init_dma()
468 i2c_dev->tx_dma_chan = chan; in tegra_i2c_init_dma()
470 WARN_ON(i2c_dev->tx_dma_chan->device != i2c_dev->rx_dma_chan->device); in tegra_i2c_init_dma()
471 i2c_dev->dma_dev = chan->device->dev; in tegra_i2c_init_dma()
473 i2c_dev->dma_buf_size = i2c_dev->hw->quirks->max_write_len + in tegra_i2c_init_dma()
476 dma_buf = dma_alloc_coherent(i2c_dev->dma_dev, i2c_dev->dma_buf_size, in tegra_i2c_init_dma()
479 dev_err(i2c_dev->dev, "failed to allocate DMA buffer\n"); in tegra_i2c_init_dma()
484 i2c_dev->dma_buf = dma_buf; in tegra_i2c_init_dma()
485 i2c_dev->dma_phys = dma_phys; in tegra_i2c_init_dma()
490 tegra_i2c_release_dma(i2c_dev); in tegra_i2c_init_dma()
492 dev_err(i2c_dev->dev, "cannot use DMA: %d\n", err); in tegra_i2c_init_dma()
493 dev_err(i2c_dev->dev, "falling back to PIO\n"); in tegra_i2c_init_dma()
507 static void tegra_dvc_init(struct tegra_i2c_dev *i2c_dev) in tegra_dvc_init() argument
511 val = dvc_readl(i2c_dev, DVC_CTRL_REG3); in tegra_dvc_init()
514 dvc_writel(i2c_dev, val, DVC_CTRL_REG3); in tegra_dvc_init()
516 val = dvc_readl(i2c_dev, DVC_CTRL_REG1); in tegra_dvc_init()
518 dvc_writel(i2c_dev, val, DVC_CTRL_REG1); in tegra_dvc_init()
521 static void tegra_i2c_vi_init(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_vi_init() argument
527 i2c_writel(i2c_dev, value, I2C_INTERFACE_TIMING_0); in tegra_i2c_vi_init()
533 i2c_writel(i2c_dev, value, I2C_INTERFACE_TIMING_1); in tegra_i2c_vi_init()
537 i2c_writel(i2c_dev, value, I2C_HS_INTERFACE_TIMING_0); in tegra_i2c_vi_init()
542 i2c_writel(i2c_dev, value, I2C_HS_INTERFACE_TIMING_1); in tegra_i2c_vi_init()
545 i2c_writel(i2c_dev, value, I2C_BUS_CLEAR_CNFG); in tegra_i2c_vi_init()
547 i2c_writel(i2c_dev, 0x0, I2C_TLOW_SEXT); in tegra_i2c_vi_init()
550 static int tegra_i2c_poll_register(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_poll_register() argument
554 void __iomem *addr = i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg); in tegra_i2c_poll_register()
557 if (!i2c_dev->atomic_mode && !in_irq()) in tegra_i2c_poll_register()
565 static int tegra_i2c_flush_fifos(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_flush_fifos() argument
570 if (i2c_dev->hw->has_mst_fifo) { in tegra_i2c_flush_fifos()
580 val = i2c_readl(i2c_dev, offset); in tegra_i2c_flush_fifos()
582 i2c_writel(i2c_dev, val, offset); in tegra_i2c_flush_fifos()
584 err = tegra_i2c_poll_register(i2c_dev, offset, mask, 1000, 1000000); in tegra_i2c_flush_fifos()
586 dev_err(i2c_dev->dev, "failed to flush FIFO\n"); in tegra_i2c_flush_fifos()
593 static int tegra_i2c_wait_for_config_load(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_wait_for_config_load() argument
597 if (!i2c_dev->hw->has_config_load_reg) in tegra_i2c_wait_for_config_load()
600 i2c_writel(i2c_dev, I2C_MSTR_CONFIG_LOAD, I2C_CONFIG_LOAD); in tegra_i2c_wait_for_config_load()
602 err = tegra_i2c_poll_register(i2c_dev, I2C_CONFIG_LOAD, 0xffffffff, in tegra_i2c_wait_for_config_load()
605 dev_err(i2c_dev->dev, "failed to load config\n"); in tegra_i2c_wait_for_config_load()
612 static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_init() argument
625 err = reset_control_reset(i2c_dev->rst); in tegra_i2c_init()
628 if (i2c_dev->is_dvc) in tegra_i2c_init()
629 tegra_dvc_init(i2c_dev); in tegra_i2c_init()
634 if (i2c_dev->hw->has_multi_master_mode) in tegra_i2c_init()
637 i2c_writel(i2c_dev, val, I2C_CNFG); in tegra_i2c_init()
638 i2c_writel(i2c_dev, 0, I2C_INT_MASK); in tegra_i2c_init()
640 if (i2c_dev->is_vi) in tegra_i2c_init()
641 tegra_i2c_vi_init(i2c_dev); in tegra_i2c_init()
643 switch (i2c_dev->bus_clk_rate) { in tegra_i2c_init()
646 tlow = i2c_dev->hw->tlow_fast_fastplus_mode; in tegra_i2c_init()
647 thigh = i2c_dev->hw->thigh_fast_fastplus_mode; in tegra_i2c_init()
648 tsu_thd = i2c_dev->hw->setup_hold_time_fast_fast_plus_mode; in tegra_i2c_init()
650 if (i2c_dev->bus_clk_rate > I2C_MAX_FAST_MODE_FREQ) in tegra_i2c_init()
651 non_hs_mode = i2c_dev->hw->clk_divisor_fast_plus_mode; in tegra_i2c_init()
653 non_hs_mode = i2c_dev->hw->clk_divisor_fast_mode; in tegra_i2c_init()
657 tlow = i2c_dev->hw->tlow_std_mode; in tegra_i2c_init()
658 thigh = i2c_dev->hw->thigh_std_mode; in tegra_i2c_init()
659 tsu_thd = i2c_dev->hw->setup_hold_time_std_mode; in tegra_i2c_init()
660 non_hs_mode = i2c_dev->hw->clk_divisor_std_mode; in tegra_i2c_init()
666 i2c_dev->hw->clk_divisor_hs_mode) | in tegra_i2c_init()
668 i2c_writel(i2c_dev, clk_divisor, I2C_CLK_DIVISOR); in tegra_i2c_init()
670 if (i2c_dev->hw->has_interface_timing_reg) { in tegra_i2c_init()
673 i2c_writel(i2c_dev, val, I2C_INTERFACE_TIMING_0); in tegra_i2c_init()
680 if (i2c_dev->hw->has_interface_timing_reg && tsu_thd) in tegra_i2c_init()
681 i2c_writel(i2c_dev, tsu_thd, I2C_INTERFACE_TIMING_1); in tegra_i2c_init()
685 err = clk_set_rate(i2c_dev->div_clk, in tegra_i2c_init()
686 i2c_dev->bus_clk_rate * clk_multiplier); in tegra_i2c_init()
688 dev_err(i2c_dev->dev, "failed to set div-clk rate: %d\n", err); in tegra_i2c_init()
692 if (!i2c_dev->is_dvc && !i2c_dev->is_vi) { in tegra_i2c_init()
693 u32 sl_cfg = i2c_readl(i2c_dev, I2C_SL_CNFG); in tegra_i2c_init()
696 i2c_writel(i2c_dev, sl_cfg, I2C_SL_CNFG); in tegra_i2c_init()
697 i2c_writel(i2c_dev, 0xfc, I2C_SL_ADDR1); in tegra_i2c_init()
698 i2c_writel(i2c_dev, 0x00, I2C_SL_ADDR2); in tegra_i2c_init()
701 err = tegra_i2c_flush_fifos(i2c_dev); in tegra_i2c_init()
705 if (i2c_dev->multimaster_mode && i2c_dev->hw->has_slcg_override_reg) in tegra_i2c_init()
706 i2c_writel(i2c_dev, I2C_MST_CORE_CLKEN_OVR, I2C_CLKEN_OVERRIDE); in tegra_i2c_init()
708 err = tegra_i2c_wait_for_config_load(i2c_dev); in tegra_i2c_init()
715 static int tegra_i2c_disable_packet_mode(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_disable_packet_mode() argument
725 udelay(DIV_ROUND_UP(2 * 1000000, i2c_dev->bus_clk_rate)); in tegra_i2c_disable_packet_mode()
727 cnfg = i2c_readl(i2c_dev, I2C_CNFG); in tegra_i2c_disable_packet_mode()
729 i2c_writel(i2c_dev, cnfg & ~I2C_CNFG_PACKET_MODE_EN, I2C_CNFG); in tegra_i2c_disable_packet_mode()
731 return tegra_i2c_wait_for_config_load(i2c_dev); in tegra_i2c_disable_packet_mode()
734 static int tegra_i2c_empty_rx_fifo(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_empty_rx_fifo() argument
736 size_t buf_remaining = i2c_dev->msg_buf_remaining; in tegra_i2c_empty_rx_fifo()
738 u8 *buf = i2c_dev->msg_buf; in tegra_i2c_empty_rx_fifo()
745 if (WARN_ON_ONCE(!(i2c_dev->msg_buf_remaining))) in tegra_i2c_empty_rx_fifo()
748 if (i2c_dev->hw->has_mst_fifo) { in tegra_i2c_empty_rx_fifo()
749 val = i2c_readl(i2c_dev, I2C_MST_FIFO_STATUS); in tegra_i2c_empty_rx_fifo()
752 val = i2c_readl(i2c_dev, I2C_FIFO_STATUS); in tegra_i2c_empty_rx_fifo()
761 i2c_readsl(i2c_dev, buf, I2C_RX_FIFO, words_to_transfer); in tegra_i2c_empty_rx_fifo()
777 val = i2c_readl(i2c_dev, I2C_RX_FIFO); in tegra_i2c_empty_rx_fifo()
788 i2c_dev->msg_buf_remaining = buf_remaining; in tegra_i2c_empty_rx_fifo()
789 i2c_dev->msg_buf = buf; in tegra_i2c_empty_rx_fifo()
794 static int tegra_i2c_fill_tx_fifo(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_fill_tx_fifo() argument
796 size_t buf_remaining = i2c_dev->msg_buf_remaining; in tegra_i2c_fill_tx_fifo()
798 u8 *buf = i2c_dev->msg_buf; in tegra_i2c_fill_tx_fifo()
801 if (i2c_dev->hw->has_mst_fifo) { in tegra_i2c_fill_tx_fifo()
802 val = i2c_readl(i2c_dev, I2C_MST_FIFO_STATUS); in tegra_i2c_fill_tx_fifo()
805 val = i2c_readl(i2c_dev, I2C_FIFO_STATUS); in tegra_i2c_fill_tx_fifo()
832 i2c_dev->msg_buf_remaining = buf_remaining; in tegra_i2c_fill_tx_fifo()
833 i2c_dev->msg_buf = buf + words_to_transfer * BYTES_PER_FIFO_WORD; in tegra_i2c_fill_tx_fifo()
835 if (i2c_dev->is_vi) in tegra_i2c_fill_tx_fifo()
836 i2c_writesl_vi(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer); in tegra_i2c_fill_tx_fifo()
838 i2c_writesl(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer); in tegra_i2c_fill_tx_fifo()
857 i2c_dev->msg_buf_remaining = 0; in tegra_i2c_fill_tx_fifo()
858 i2c_dev->msg_buf = NULL; in tegra_i2c_fill_tx_fifo()
860 i2c_writel(i2c_dev, val, I2C_TX_FIFO); in tegra_i2c_fill_tx_fifo()
869 struct tegra_i2c_dev *i2c_dev = dev_id; in tegra_i2c_isr() local
872 status = i2c_readl(i2c_dev, I2C_INT_STATUS); in tegra_i2c_isr()
875 dev_warn(i2c_dev->dev, "IRQ status 0 %08x %08x %08x\n", in tegra_i2c_isr()
876 i2c_readl(i2c_dev, I2C_PACKET_TRANSFER_STATUS), in tegra_i2c_isr()
877 i2c_readl(i2c_dev, I2C_STATUS), in tegra_i2c_isr()
878 i2c_readl(i2c_dev, I2C_CNFG)); in tegra_i2c_isr()
879 i2c_dev->msg_err |= I2C_ERR_UNKNOWN_INTERRUPT; in tegra_i2c_isr()
884 tegra_i2c_disable_packet_mode(i2c_dev); in tegra_i2c_isr()
886 i2c_dev->msg_err |= I2C_ERR_NO_ACK; in tegra_i2c_isr()
888 i2c_dev->msg_err |= I2C_ERR_ARBITRATION_LOST; in tegra_i2c_isr()
896 if (i2c_dev->hw->supports_bus_clear && (status & I2C_INT_BUS_CLR_DONE)) in tegra_i2c_isr()
899 if (!i2c_dev->dma_mode) { in tegra_i2c_isr()
900 if (i2c_dev->msg_read && (status & I2C_INT_RX_FIFO_DATA_REQ)) { in tegra_i2c_isr()
901 if (tegra_i2c_empty_rx_fifo(i2c_dev)) { in tegra_i2c_isr()
907 i2c_dev->msg_err |= I2C_ERR_RX_BUFFER_OVERFLOW; in tegra_i2c_isr()
912 if (!i2c_dev->msg_read && (status & I2C_INT_TX_FIFO_DATA_REQ)) { in tegra_i2c_isr()
913 if (i2c_dev->msg_buf_remaining) in tegra_i2c_isr()
914 tegra_i2c_fill_tx_fifo(i2c_dev); in tegra_i2c_isr()
916 tegra_i2c_mask_irq(i2c_dev, in tegra_i2c_isr()
921 i2c_writel(i2c_dev, status, I2C_INT_STATUS); in tegra_i2c_isr()
922 if (i2c_dev->is_dvc) in tegra_i2c_isr()
923 dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS); in tegra_i2c_isr()
934 if (i2c_dev->dma_mode) in tegra_i2c_isr()
935 i2c_dev->msg_buf_remaining = 0; in tegra_i2c_isr()
940 if (WARN_ON_ONCE(i2c_dev->msg_buf_remaining)) { in tegra_i2c_isr()
941 i2c_dev->msg_err |= I2C_ERR_UNKNOWN_INTERRUPT; in tegra_i2c_isr()
944 complete(&i2c_dev->msg_complete); in tegra_i2c_isr()
949 tegra_i2c_mask_irq(i2c_dev, in tegra_i2c_isr()
956 if (i2c_dev->hw->supports_bus_clear) in tegra_i2c_isr()
957 tegra_i2c_mask_irq(i2c_dev, I2C_INT_BUS_CLR_DONE); in tegra_i2c_isr()
959 i2c_writel(i2c_dev, status, I2C_INT_STATUS); in tegra_i2c_isr()
961 if (i2c_dev->is_dvc) in tegra_i2c_isr()
962 dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS); in tegra_i2c_isr()
964 if (i2c_dev->dma_mode) { in tegra_i2c_isr()
965 if (i2c_dev->msg_read) in tegra_i2c_isr()
966 dmaengine_terminate_async(i2c_dev->rx_dma_chan); in tegra_i2c_isr()
968 dmaengine_terminate_async(i2c_dev->tx_dma_chan); in tegra_i2c_isr()
970 complete(&i2c_dev->dma_complete); in tegra_i2c_isr()
973 complete(&i2c_dev->msg_complete); in tegra_i2c_isr()
978 static void tegra_i2c_config_fifo_trig(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_config_fifo_trig() argument
986 if (i2c_dev->hw->has_mst_fifo) in tegra_i2c_config_fifo_trig()
991 if (i2c_dev->dma_mode) { in tegra_i2c_config_fifo_trig()
999 if (i2c_dev->msg_read) { in tegra_i2c_config_fifo_trig()
1000 chan = i2c_dev->rx_dma_chan; in tegra_i2c_config_fifo_trig()
1001 reg_offset = tegra_i2c_reg_addr(i2c_dev, I2C_RX_FIFO); in tegra_i2c_config_fifo_trig()
1003 slv_config.src_addr = i2c_dev->base_phys + reg_offset; in tegra_i2c_config_fifo_trig()
1007 if (i2c_dev->hw->has_mst_fifo) in tegra_i2c_config_fifo_trig()
1012 chan = i2c_dev->tx_dma_chan; in tegra_i2c_config_fifo_trig()
1013 reg_offset = tegra_i2c_reg_addr(i2c_dev, I2C_TX_FIFO); in tegra_i2c_config_fifo_trig()
1015 slv_config.dst_addr = i2c_dev->base_phys + reg_offset; in tegra_i2c_config_fifo_trig()
1019 if (i2c_dev->hw->has_mst_fifo) in tegra_i2c_config_fifo_trig()
1028 dev_err(i2c_dev->dev, "DMA config failed: %d\n", err); in tegra_i2c_config_fifo_trig()
1029 dev_err(i2c_dev->dev, "falling back to PIO\n"); in tegra_i2c_config_fifo_trig()
1031 tegra_i2c_release_dma(i2c_dev); in tegra_i2c_config_fifo_trig()
1032 i2c_dev->dma_mode = false; in tegra_i2c_config_fifo_trig()
1038 if (i2c_dev->hw->has_mst_fifo) in tegra_i2c_config_fifo_trig()
1045 i2c_writel(i2c_dev, val, reg); in tegra_i2c_config_fifo_trig()
1048 static unsigned long tegra_i2c_poll_completion(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_poll_completion() argument
1056 u32 status = i2c_readl(i2c_dev, I2C_INT_STATUS); in tegra_i2c_poll_completion()
1059 tegra_i2c_isr(i2c_dev->irq, i2c_dev); in tegra_i2c_poll_completion()
1074 static unsigned long tegra_i2c_wait_completion(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_wait_completion() argument
1080 if (i2c_dev->atomic_mode) { in tegra_i2c_wait_completion()
1081 ret = tegra_i2c_poll_completion(i2c_dev, complete, timeout_ms); in tegra_i2c_wait_completion()
1083 enable_irq(i2c_dev->irq); in tegra_i2c_wait_completion()
1086 disable_irq(i2c_dev->irq); in tegra_i2c_wait_completion()
1099 ret = tegra_i2c_poll_completion(i2c_dev, complete, 0); in tegra_i2c_wait_completion()
1107 struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap); in tegra_i2c_issue_bus_clear() local
1111 reinit_completion(&i2c_dev->msg_complete); in tegra_i2c_issue_bus_clear()
1115 i2c_writel(i2c_dev, val, I2C_BUS_CLEAR_CNFG); in tegra_i2c_issue_bus_clear()
1117 err = tegra_i2c_wait_for_config_load(i2c_dev); in tegra_i2c_issue_bus_clear()
1122 i2c_writel(i2c_dev, val, I2C_BUS_CLEAR_CNFG); in tegra_i2c_issue_bus_clear()
1123 tegra_i2c_unmask_irq(i2c_dev, I2C_INT_BUS_CLR_DONE); in tegra_i2c_issue_bus_clear()
1125 time_left = tegra_i2c_wait_completion(i2c_dev, &i2c_dev->msg_complete, 50); in tegra_i2c_issue_bus_clear()
1126 tegra_i2c_mask_irq(i2c_dev, I2C_INT_BUS_CLR_DONE); in tegra_i2c_issue_bus_clear()
1129 dev_err(i2c_dev->dev, "failed to clear bus\n"); in tegra_i2c_issue_bus_clear()
1133 val = i2c_readl(i2c_dev, I2C_BUS_CLEAR_STATUS); in tegra_i2c_issue_bus_clear()
1135 dev_err(i2c_dev->dev, "un-recovered arbitration lost\n"); in tegra_i2c_issue_bus_clear()
1142 static void tegra_i2c_push_packet_header(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_push_packet_header() argument
1146 u32 *dma_buf = i2c_dev->dma_buf; in tegra_i2c_push_packet_header()
1152 FIELD_PREP(PACKET_HEADER0_CONT_ID, i2c_dev->cont_id) | in tegra_i2c_push_packet_header()
1155 if (i2c_dev->dma_mode && !i2c_dev->msg_read) in tegra_i2c_push_packet_header()
1158 i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO); in tegra_i2c_push_packet_header()
1162 if (i2c_dev->dma_mode && !i2c_dev->msg_read) in tegra_i2c_push_packet_header()
1165 i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO); in tegra_i2c_push_packet_header()
1187 if (i2c_dev->dma_mode && !i2c_dev->msg_read) in tegra_i2c_push_packet_header()
1190 i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO); in tegra_i2c_push_packet_header()
1193 static int tegra_i2c_error_recover(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_error_recover() argument
1196 if (i2c_dev->msg_err == I2C_ERR_NONE) in tegra_i2c_error_recover()
1199 tegra_i2c_init(i2c_dev); in tegra_i2c_error_recover()
1202 if (i2c_dev->msg_err == I2C_ERR_ARBITRATION_LOST) { in tegra_i2c_error_recover()
1203 if (!i2c_dev->multimaster_mode) in tegra_i2c_error_recover()
1204 return i2c_recover_bus(&i2c_dev->adapter); in tegra_i2c_error_recover()
1209 if (i2c_dev->msg_err == I2C_ERR_NO_ACK) { in tegra_i2c_error_recover()
1219 static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_xfer_msg() argument
1228 err = tegra_i2c_flush_fifos(i2c_dev); in tegra_i2c_xfer_msg()
1232 i2c_dev->msg_buf = msg->buf; in tegra_i2c_xfer_msg()
1233 i2c_dev->msg_buf_remaining = msg->len; in tegra_i2c_xfer_msg()
1234 i2c_dev->msg_err = I2C_ERR_NONE; in tegra_i2c_xfer_msg()
1235 i2c_dev->msg_read = !!(msg->flags & I2C_M_RD); in tegra_i2c_xfer_msg()
1236 reinit_completion(&i2c_dev->msg_complete); in tegra_i2c_xfer_msg()
1238 if (i2c_dev->msg_read) in tegra_i2c_xfer_msg()
1245 i2c_dev->dma_mode = xfer_size > I2C_PIO_MODE_PREFERRED_LEN && in tegra_i2c_xfer_msg()
1246 i2c_dev->dma_buf && !i2c_dev->atomic_mode; in tegra_i2c_xfer_msg()
1248 tegra_i2c_config_fifo_trig(i2c_dev, xfer_size); in tegra_i2c_xfer_msg()
1255 i2c_dev->bus_clk_rate); in tegra_i2c_xfer_msg()
1258 tegra_i2c_unmask_irq(i2c_dev, int_mask); in tegra_i2c_xfer_msg()
1260 if (i2c_dev->dma_mode) { in tegra_i2c_xfer_msg()
1261 if (i2c_dev->msg_read) { in tegra_i2c_xfer_msg()
1262 dma_sync_single_for_device(i2c_dev->dma_dev, in tegra_i2c_xfer_msg()
1263 i2c_dev->dma_phys, in tegra_i2c_xfer_msg()
1266 err = tegra_i2c_dma_submit(i2c_dev, xfer_size); in tegra_i2c_xfer_msg()
1270 dma_sync_single_for_cpu(i2c_dev->dma_dev, in tegra_i2c_xfer_msg()
1271 i2c_dev->dma_phys, in tegra_i2c_xfer_msg()
1276 tegra_i2c_push_packet_header(i2c_dev, msg, end_state); in tegra_i2c_xfer_msg()
1278 if (!i2c_dev->msg_read) { in tegra_i2c_xfer_msg()
1279 if (i2c_dev->dma_mode) { in tegra_i2c_xfer_msg()
1280 memcpy(i2c_dev->dma_buf + I2C_PACKET_HEADER_SIZE, in tegra_i2c_xfer_msg()
1283 dma_sync_single_for_device(i2c_dev->dma_dev, in tegra_i2c_xfer_msg()
1284 i2c_dev->dma_phys, in tegra_i2c_xfer_msg()
1287 err = tegra_i2c_dma_submit(i2c_dev, xfer_size); in tegra_i2c_xfer_msg()
1291 tegra_i2c_fill_tx_fifo(i2c_dev); in tegra_i2c_xfer_msg()
1295 if (i2c_dev->hw->has_per_pkt_xfer_complete_irq) in tegra_i2c_xfer_msg()
1298 if (!i2c_dev->dma_mode) { in tegra_i2c_xfer_msg()
1301 else if (i2c_dev->msg_buf_remaining) in tegra_i2c_xfer_msg()
1305 tegra_i2c_unmask_irq(i2c_dev, int_mask); in tegra_i2c_xfer_msg()
1306 dev_dbg(i2c_dev->dev, "unmasked IRQ: %02x\n", in tegra_i2c_xfer_msg()
1307 i2c_readl(i2c_dev, I2C_INT_MASK)); in tegra_i2c_xfer_msg()
1309 if (i2c_dev->dma_mode) { in tegra_i2c_xfer_msg()
1310 time_left = tegra_i2c_wait_completion(i2c_dev, in tegra_i2c_xfer_msg()
1311 &i2c_dev->dma_complete, in tegra_i2c_xfer_msg()
1319 dmaengine_synchronize(i2c_dev->msg_read ? in tegra_i2c_xfer_msg()
1320 i2c_dev->rx_dma_chan : in tegra_i2c_xfer_msg()
1321 i2c_dev->tx_dma_chan); in tegra_i2c_xfer_msg()
1323 dmaengine_terminate_sync(i2c_dev->msg_read ? in tegra_i2c_xfer_msg()
1324 i2c_dev->rx_dma_chan : in tegra_i2c_xfer_msg()
1325 i2c_dev->tx_dma_chan); in tegra_i2c_xfer_msg()
1327 if (!time_left && !completion_done(&i2c_dev->dma_complete)) { in tegra_i2c_xfer_msg()
1328 dev_err(i2c_dev->dev, "DMA transfer timed out\n"); in tegra_i2c_xfer_msg()
1329 tegra_i2c_init(i2c_dev); in tegra_i2c_xfer_msg()
1333 if (i2c_dev->msg_read && i2c_dev->msg_err == I2C_ERR_NONE) { in tegra_i2c_xfer_msg()
1334 dma_sync_single_for_cpu(i2c_dev->dma_dev, in tegra_i2c_xfer_msg()
1335 i2c_dev->dma_phys, in tegra_i2c_xfer_msg()
1338 memcpy(i2c_dev->msg_buf, i2c_dev->dma_buf, msg->len); in tegra_i2c_xfer_msg()
1342 time_left = tegra_i2c_wait_completion(i2c_dev, &i2c_dev->msg_complete, in tegra_i2c_xfer_msg()
1345 tegra_i2c_mask_irq(i2c_dev, int_mask); in tegra_i2c_xfer_msg()
1348 dev_err(i2c_dev->dev, "I2C transfer timed out\n"); in tegra_i2c_xfer_msg()
1349 tegra_i2c_init(i2c_dev); in tegra_i2c_xfer_msg()
1353 dev_dbg(i2c_dev->dev, "transfer complete: %lu %d %d\n", in tegra_i2c_xfer_msg()
1354 time_left, completion_done(&i2c_dev->msg_complete), in tegra_i2c_xfer_msg()
1355 i2c_dev->msg_err); in tegra_i2c_xfer_msg()
1357 i2c_dev->dma_mode = false; in tegra_i2c_xfer_msg()
1359 err = tegra_i2c_error_recover(i2c_dev, msg); in tegra_i2c_xfer_msg()
1369 struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap); in tegra_i2c_xfer() local
1372 ret = pm_runtime_get_sync(i2c_dev->dev); in tegra_i2c_xfer()
1374 dev_err(i2c_dev->dev, "runtime resume failed %d\n", ret); in tegra_i2c_xfer()
1375 pm_runtime_put_noidle(i2c_dev->dev); in tegra_i2c_xfer()
1389 ret = tegra_i2c_xfer_msg(i2c_dev, &msgs[i], end_type); in tegra_i2c_xfer()
1394 pm_runtime_put(i2c_dev->dev); in tegra_i2c_xfer()
1402 struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap); in tegra_i2c_xfer_atomic() local
1405 i2c_dev->atomic_mode = true; in tegra_i2c_xfer_atomic()
1407 i2c_dev->atomic_mode = false; in tegra_i2c_xfer_atomic()
1414 struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap); in tegra_i2c_func() local
1418 if (i2c_dev->hw->has_continue_xfer_support) in tegra_i2c_func()
1628 static void tegra_i2c_parse_dt(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_parse_dt() argument
1630 struct device_node *np = i2c_dev->dev->of_node; in tegra_i2c_parse_dt()
1635 &i2c_dev->bus_clk_rate); in tegra_i2c_parse_dt()
1637 i2c_dev->bus_clk_rate = I2C_MAX_STANDARD_MODE_FREQ; in tegra_i2c_parse_dt()
1640 i2c_dev->multimaster_mode = multi_mode; in tegra_i2c_parse_dt()
1643 i2c_dev->is_dvc = true; in tegra_i2c_parse_dt()
1646 i2c_dev->is_vi = true; in tegra_i2c_parse_dt()
1649 static int tegra_i2c_init_clocks(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_init_clocks() argument
1653 i2c_dev->clocks[i2c_dev->nclocks++].id = "div-clk"; in tegra_i2c_init_clocks()
1655 if (i2c_dev->hw == &tegra20_i2c_hw || i2c_dev->hw == &tegra30_i2c_hw) in tegra_i2c_init_clocks()
1656 i2c_dev->clocks[i2c_dev->nclocks++].id = "fast-clk"; in tegra_i2c_init_clocks()
1658 if (i2c_dev->is_vi) in tegra_i2c_init_clocks()
1659 i2c_dev->clocks[i2c_dev->nclocks++].id = "slow"; in tegra_i2c_init_clocks()
1661 err = devm_clk_bulk_get(i2c_dev->dev, i2c_dev->nclocks, in tegra_i2c_init_clocks()
1662 i2c_dev->clocks); in tegra_i2c_init_clocks()
1666 err = clk_bulk_prepare(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_init_clocks()
1670 i2c_dev->div_clk = i2c_dev->clocks[0].clk; in tegra_i2c_init_clocks()
1672 if (!i2c_dev->multimaster_mode) in tegra_i2c_init_clocks()
1675 err = clk_enable(i2c_dev->div_clk); in tegra_i2c_init_clocks()
1677 dev_err(i2c_dev->dev, "failed to enable div-clk: %d\n", err); in tegra_i2c_init_clocks()
1684 clk_bulk_unprepare(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_init_clocks()
1689 static void tegra_i2c_release_clocks(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_release_clocks() argument
1691 if (i2c_dev->multimaster_mode) in tegra_i2c_release_clocks()
1692 clk_disable(i2c_dev->div_clk); in tegra_i2c_release_clocks()
1694 clk_bulk_unprepare(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_release_clocks()
1697 static int tegra_i2c_init_hardware(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_init_hardware() argument
1701 ret = pm_runtime_get_sync(i2c_dev->dev); in tegra_i2c_init_hardware()
1703 dev_err(i2c_dev->dev, "runtime resume failed: %d\n", ret); in tegra_i2c_init_hardware()
1705 ret = tegra_i2c_init(i2c_dev); in tegra_i2c_init_hardware()
1707 pm_runtime_put(i2c_dev->dev); in tegra_i2c_init_hardware()
1714 struct tegra_i2c_dev *i2c_dev; in tegra_i2c_probe() local
1718 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL); in tegra_i2c_probe()
1719 if (!i2c_dev) in tegra_i2c_probe()
1722 platform_set_drvdata(pdev, i2c_dev); in tegra_i2c_probe()
1724 init_completion(&i2c_dev->msg_complete); in tegra_i2c_probe()
1725 init_completion(&i2c_dev->dma_complete); in tegra_i2c_probe()
1727 i2c_dev->hw = of_device_get_match_data(&pdev->dev); in tegra_i2c_probe()
1728 i2c_dev->cont_id = pdev->id; in tegra_i2c_probe()
1729 i2c_dev->dev = &pdev->dev; in tegra_i2c_probe()
1731 i2c_dev->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in tegra_i2c_probe()
1732 if (IS_ERR(i2c_dev->base)) in tegra_i2c_probe()
1733 return PTR_ERR(i2c_dev->base); in tegra_i2c_probe()
1735 i2c_dev->base_phys = res->start; in tegra_i2c_probe()
1741 i2c_dev->irq = err; in tegra_i2c_probe()
1744 irq_set_status_flags(i2c_dev->irq, IRQ_NOAUTOEN); in tegra_i2c_probe()
1746 err = devm_request_irq(i2c_dev->dev, i2c_dev->irq, tegra_i2c_isr, in tegra_i2c_probe()
1747 IRQF_NO_SUSPEND, dev_name(i2c_dev->dev), in tegra_i2c_probe()
1748 i2c_dev); in tegra_i2c_probe()
1752 i2c_dev->rst = devm_reset_control_get_exclusive(i2c_dev->dev, "i2c"); in tegra_i2c_probe()
1753 if (IS_ERR(i2c_dev->rst)) { in tegra_i2c_probe()
1754 dev_err_probe(i2c_dev->dev, PTR_ERR(i2c_dev->rst), in tegra_i2c_probe()
1756 return PTR_ERR(i2c_dev->rst); in tegra_i2c_probe()
1759 tegra_i2c_parse_dt(i2c_dev); in tegra_i2c_probe()
1761 err = tegra_i2c_init_clocks(i2c_dev); in tegra_i2c_probe()
1765 err = tegra_i2c_init_dma(i2c_dev); in tegra_i2c_probe()
1778 if (!i2c_dev->is_vi) in tegra_i2c_probe()
1779 pm_runtime_irq_safe(i2c_dev->dev); in tegra_i2c_probe()
1781 pm_runtime_enable(i2c_dev->dev); in tegra_i2c_probe()
1783 err = tegra_i2c_init_hardware(i2c_dev); in tegra_i2c_probe()
1787 i2c_set_adapdata(&i2c_dev->adapter, i2c_dev); in tegra_i2c_probe()
1788 i2c_dev->adapter.dev.of_node = i2c_dev->dev->of_node; in tegra_i2c_probe()
1789 i2c_dev->adapter.dev.parent = i2c_dev->dev; in tegra_i2c_probe()
1790 i2c_dev->adapter.retries = 1; in tegra_i2c_probe()
1791 i2c_dev->adapter.timeout = 6 * HZ; in tegra_i2c_probe()
1792 i2c_dev->adapter.quirks = i2c_dev->hw->quirks; in tegra_i2c_probe()
1793 i2c_dev->adapter.owner = THIS_MODULE; in tegra_i2c_probe()
1794 i2c_dev->adapter.class = I2C_CLASS_DEPRECATED; in tegra_i2c_probe()
1795 i2c_dev->adapter.algo = &tegra_i2c_algo; in tegra_i2c_probe()
1796 i2c_dev->adapter.nr = pdev->id; in tegra_i2c_probe()
1798 if (i2c_dev->hw->supports_bus_clear) in tegra_i2c_probe()
1799 i2c_dev->adapter.bus_recovery_info = &tegra_i2c_recovery_info; in tegra_i2c_probe()
1801 strlcpy(i2c_dev->adapter.name, dev_name(i2c_dev->dev), in tegra_i2c_probe()
1802 sizeof(i2c_dev->adapter.name)); in tegra_i2c_probe()
1804 err = i2c_add_numbered_adapter(&i2c_dev->adapter); in tegra_i2c_probe()
1811 pm_runtime_disable(i2c_dev->dev); in tegra_i2c_probe()
1813 tegra_i2c_release_dma(i2c_dev); in tegra_i2c_probe()
1815 tegra_i2c_release_clocks(i2c_dev); in tegra_i2c_probe()
1822 struct tegra_i2c_dev *i2c_dev = platform_get_drvdata(pdev); in tegra_i2c_remove() local
1824 i2c_del_adapter(&i2c_dev->adapter); in tegra_i2c_remove()
1825 pm_runtime_disable(i2c_dev->dev); in tegra_i2c_remove()
1827 tegra_i2c_release_dma(i2c_dev); in tegra_i2c_remove()
1828 tegra_i2c_release_clocks(i2c_dev); in tegra_i2c_remove()
1835 struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev); in tegra_i2c_runtime_resume() local
1842 err = clk_bulk_enable(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_runtime_resume()
1851 if (i2c_dev->is_vi) { in tegra_i2c_runtime_resume()
1852 err = tegra_i2c_init(i2c_dev); in tegra_i2c_runtime_resume()
1860 clk_bulk_disable(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_runtime_resume()
1867 struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev); in tegra_i2c_runtime_suspend() local
1869 clk_bulk_disable(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_runtime_suspend()
1876 struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev); in tegra_i2c_suspend() local
1879 i2c_mark_adapter_suspended(&i2c_dev->adapter); in tegra_i2c_suspend()
1892 struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev); in tegra_i2c_resume() local
1903 err = tegra_i2c_init(i2c_dev); in tegra_i2c_resume()
1918 i2c_mark_adapter_resumed(&i2c_dev->adapter); in tegra_i2c_resume()