Lines Matching refs:ret
147 int ret; in pvt_read_temp() local
152 ret = regmap_read_poll_timeout(t_map, SDIF_DONE(channel), in pvt_read_temp()
156 if (ret) in pvt_read_temp()
157 return ret; in pvt_read_temp()
159 ret = regmap_read(t_map, SDIF_DATA(channel), &nbs); in pvt_read_temp()
160 if(ret < 0) in pvt_read_temp()
161 return ret; in pvt_read_temp()
185 int ret; in pvt_read_in() local
195 ret = regmap_read_poll_timeout(v_map, VM_SDIF_DONE(vm_idx), in pvt_read_in()
199 if (ret) in pvt_read_in()
200 return ret; in pvt_read_in()
202 ret = regmap_read(v_map, VM_SDIF_DATA(vm_idx, ch_idx), &n); in pvt_read_in()
203 if(ret < 0) in pvt_read_in()
204 return ret; in pvt_read_in()
276 int ret; in pvt_init() local
306 ret = regmap_write(t_map, SDIF_SMPL_CTRL, 0x0); in pvt_init()
307 if(ret < 0) in pvt_init()
308 return ret; in pvt_init()
310 ret = regmap_write(t_map, SDIF_HALT, 0x0); in pvt_init()
311 if(ret < 0) in pvt_init()
312 return ret; in pvt_init()
314 ret = regmap_write(t_map, CLK_SYNTH, clk_synth); in pvt_init()
315 if(ret < 0) in pvt_init()
316 return ret; in pvt_init()
318 ret = regmap_write(t_map, SDIF_DISABLE, 0x0); in pvt_init()
319 if(ret < 0) in pvt_init()
320 return ret; in pvt_init()
322 ret = regmap_read_poll_timeout(t_map, SDIF_STAT, in pvt_init()
326 if (ret) in pvt_init()
327 return ret; in pvt_init()
331 ret = regmap_write(t_map, SDIF_W, val); in pvt_init()
332 if(ret < 0) in pvt_init()
333 return ret; in pvt_init()
335 ret = regmap_read_poll_timeout(t_map, SDIF_STAT, in pvt_init()
339 if (ret) in pvt_init()
340 return ret; in pvt_init()
344 ret = regmap_write(t_map, SDIF_W, val); in pvt_init()
345 if(ret < 0) in pvt_init()
346 return ret; in pvt_init()
348 ret = regmap_read_poll_timeout(t_map, SDIF_STAT, in pvt_init()
352 if (ret) in pvt_init()
353 return ret; in pvt_init()
358 ret = regmap_write(t_map, SDIF_W, val); in pvt_init()
359 if(ret < 0) in pvt_init()
360 return ret; in pvt_init()
364 ret = regmap_write(p_map, SDIF_HALT, 0x0); in pvt_init()
365 if(ret < 0) in pvt_init()
366 return ret; in pvt_init()
368 ret = regmap_write(p_map, SDIF_DISABLE, BIT(p_num) - 1); in pvt_init()
369 if(ret < 0) in pvt_init()
370 return ret; in pvt_init()
372 ret = regmap_write(p_map, CLK_SYNTH, clk_synth); in pvt_init()
373 if(ret < 0) in pvt_init()
374 return ret; in pvt_init()
378 ret = regmap_write(v_map, SDIF_SMPL_CTRL, 0x0); in pvt_init()
379 if(ret < 0) in pvt_init()
380 return ret; in pvt_init()
382 ret = regmap_write(v_map, SDIF_HALT, 0x0); in pvt_init()
383 if(ret < 0) in pvt_init()
384 return ret; in pvt_init()
386 ret = regmap_write(v_map, CLK_SYNTH, clk_synth); in pvt_init()
387 if(ret < 0) in pvt_init()
388 return ret; in pvt_init()
390 ret = regmap_write(v_map, SDIF_DISABLE, 0x0); in pvt_init()
391 if(ret < 0) in pvt_init()
392 return ret; in pvt_init()
394 ret = regmap_read_poll_timeout(v_map, SDIF_STAT, in pvt_init()
398 if (ret) in pvt_init()
399 return ret; in pvt_init()
403 ret = regmap_write(v_map, SDIF_W, val); in pvt_init()
404 if (ret < 0) in pvt_init()
405 return ret; in pvt_init()
407 ret = regmap_read_poll_timeout(v_map, SDIF_STAT, in pvt_init()
411 if (ret) in pvt_init()
412 return ret; in pvt_init()
417 ret = regmap_write(v_map, SDIF_W, val); in pvt_init()
418 if(ret < 0) in pvt_init()
419 return ret; in pvt_init()
421 ret = regmap_read_poll_timeout(v_map, SDIF_STAT, in pvt_init()
425 if (ret) in pvt_init()
426 return ret; in pvt_init()
430 ret = regmap_write(v_map, SDIF_W, val); in pvt_init()
431 if(ret < 0) in pvt_init()
432 return ret; in pvt_init()
434 ret = regmap_read_poll_timeout(v_map, SDIF_STAT, in pvt_init()
438 if (ret) in pvt_init()
439 return ret; in pvt_init()
444 ret = regmap_write(v_map, SDIF_W, val); in pvt_init()
445 if(ret < 0) in pvt_init()
446 return ret; in pvt_init()
499 int ret; in pvt_clk_enable() local
501 ret = clk_prepare_enable(pvt->clk); in pvt_clk_enable()
502 if (ret) in pvt_clk_enable()
503 return ret; in pvt_clk_enable()
517 int ret; in pvt_reset_control_deassert() local
519 ret = reset_control_deassert(pvt->rst); in pvt_reset_control_deassert()
520 if (ret) in pvt_reset_control_deassert()
521 return ret; in pvt_reset_control_deassert()
534 int ret; in mr75203_probe() local
540 ret = pvt_get_regmap(pdev, "common", pvt); in mr75203_probe()
541 if (ret) in mr75203_probe()
542 return ret; in mr75203_probe()
548 ret = pvt_clk_enable(dev, pvt); in mr75203_probe()
549 if (ret) { in mr75203_probe()
551 return ret; in mr75203_probe()
559 ret = pvt_reset_control_deassert(dev, pvt); in mr75203_probe()
560 if (ret) in mr75203_probe()
561 return dev_err_probe(dev, ret, "cannot deassert reset control\n"); in mr75203_probe()
563 ret = regmap_read(pvt->c_map, PVT_IP_CONFIG, &val); in mr75203_probe()
564 if(ret < 0) in mr75203_probe()
565 return ret; in mr75203_probe()
590 ret = pvt_get_regmap(pdev, "ts", pvt); in mr75203_probe()
591 if (ret) in mr75203_probe()
592 return ret; in mr75203_probe()
605 ret = pvt_get_regmap(pdev, "pd", pvt); in mr75203_probe()
606 if (ret) in mr75203_probe()
607 return ret; in mr75203_probe()
613 ret = pvt_get_regmap(pdev, "vm", pvt); in mr75203_probe()
614 if (ret) in mr75203_probe()
615 return ret; in mr75203_probe()
622 ret = device_property_read_u8_array(dev, "intel,vm-map", in mr75203_probe()
624 if (ret) { in mr75203_probe()
654 ret = pvt_init(pvt); in mr75203_probe()
655 if (ret) { in mr75203_probe()
656 dev_err(dev, "failed to init pvt: %d\n", ret); in mr75203_probe()
657 return ret; in mr75203_probe()