45 #define SUN4I_HDMI_AVI_INFOFRAME_REG(n)	(0x080 + (n))  argument
67 #define SUN4I_HDMI_PAD_CTRL1_REG_EMP(n)		(((n) & 7) << 10)  argument
69 #define SUN4I_HDMI_PAD_CTRL1_REG_AMP(n)		(((n) & 7) << 3)  argument
83 #define SUN4I_HDMI_PLL_CTRL_VCO_GAIN(n)		(((n) & 7) << 20)  argument
84 #define SUN4I_HDMI_PLL_CTRL_S(n)		(((n) & 7) << 17)  argument
85 #define SUN4I_HDMI_PLL_CTRL_CP_S(n)		(((n) & 0x1f) << 12)  argument
86 #define SUN4I_HDMI_PLL_CTRL_CS(n)		(((n) & 0xf) << 8)  argument
87 #define SUN4I_HDMI_PLL_CTRL_DIV(n)		(((n) & 0xf) << 4)  argument
89 #define SUN4I_HDMI_PLL_CTRL_VCO_S(n)		((n) & 0xf)  argument
92 #define SUN4I_HDMI_PLL_DBG0_TMDS_PARENT(n)	(((n) & 1) << 21)  argument
101 #define SUN4I_HDMI_PKT_CTRL_REG(n)	(0x2f0 + (4 * (n)))  argument
102 #define SUN4I_HDMI_PKT_CTRL_TYPE(n, t)		((t) << (((n) % 4) * 4))  argument
133 #define SUN4I_HDMI_DDC_FIFO_CTRL_RX_THRES(n)	(((n) & 0xf) << 4)  argument
136 #define SUN4I_HDMI_DDC_FIFO_CTRL_TX_THRES(n)	((n) & 0xf)  argument
152 #define SUN4I_HDMI_DDC_CLK_N(n)			((n) & 0x7)  argument