Lines Matching refs:vddci
2957 u16 vddc, vddci, min_vce_voltage = 0; in si_apply_state_adjust_rules() local
3026 if (ps->performance_levels[i].vddci > max_limits->vddci) in si_apply_state_adjust_rules()
3027 ps->performance_levels[i].vddci = max_limits->vddci; in si_apply_state_adjust_rules()
3066 vddci = ps->performance_levels[ps->performance_level_count - 1].vddci; in si_apply_state_adjust_rules()
3069 vddci = ps->performance_levels[0].vddci; in si_apply_state_adjust_rules()
3091 ps->performance_levels[0].vddci = vddci; in si_apply_state_adjust_rules()
3120 ps->performance_levels[i].vddci = vddci; in si_apply_state_adjust_rules()
3126 if (ps->performance_levels[i].vddci < ps->performance_levels[i - 1].vddci) in si_apply_state_adjust_rules()
3127 ps->performance_levels[i].vddci = ps->performance_levels[i - 1].vddci; in si_apply_state_adjust_rules()
3143 max_limits->vddci, &ps->performance_levels[i].vddci); in si_apply_state_adjust_rules()
3154 max_limits->vddc, max_limits->vddci, in si_apply_state_adjust_rules()
3156 &ps->performance_levels[i].vddci); in si_apply_state_adjust_rules()
4421 initial_state->performance_levels[0].vddci, in si_populate_smc_initial_state()
4422 &table->initialState.levels[0].vddci); in si_populate_smc_initial_state()
4550 &table->ACPIState.levels[0].vddci); in si_populate_smc_acpi_state()
5045 pl->vddci, &level->vddci); in si_convert_power_level_to_smc()
6734 pl->vddci = le16_to_cpu(clock_info->si.usVDDCI); in si_parse_pplib_clock_info()
6749 eg_pi->acpi_vddci = pl->vddci; in si_parse_pplib_clock_info()
6772 u16 vddc, vddci, mvdd; in si_parse_pplib_clock_info() local
6773 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); in si_parse_pplib_clock_info()
6777 pl->vddci = vddci; in si_parse_pplib_clock_info()
6786 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = pl->vddci; in si_parse_pplib_clock_info()
7091 current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci, pl->pcie_gen + 1); in si_dpm_debugfs_print_current_performance_level()