Lines Matching refs:rdev
50 static int radeon_debugfs_pm_init(struct radeon_device *rdev);
51 static bool radeon_pm_in_vbl(struct radeon_device *rdev);
52 static bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish);
53 static void radeon_pm_update_profile(struct radeon_device *rdev);
54 static void radeon_pm_set_clocks(struct radeon_device *rdev);
56 int radeon_pm_get_type_index(struct radeon_device *rdev, in radeon_pm_get_type_index() argument
63 for (i = 0; i < rdev->pm.num_power_states; i++) { in radeon_pm_get_type_index()
64 if (rdev->pm.power_state[i].type == ps_type) { in radeon_pm_get_type_index()
71 return rdev->pm.default_power_state_index; in radeon_pm_get_type_index()
74 void radeon_pm_acpi_event_handler(struct radeon_device *rdev) in radeon_pm_acpi_event_handler() argument
76 if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { in radeon_pm_acpi_event_handler()
77 mutex_lock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
79 rdev->pm.dpm.ac_power = true; in radeon_pm_acpi_event_handler()
81 rdev->pm.dpm.ac_power = false; in radeon_pm_acpi_event_handler()
82 if (rdev->family == CHIP_ARUBA) { in radeon_pm_acpi_event_handler()
83 if (rdev->asic->dpm.enable_bapm) in radeon_pm_acpi_event_handler()
84 radeon_dpm_enable_bapm(rdev, rdev->pm.dpm.ac_power); in radeon_pm_acpi_event_handler()
86 mutex_unlock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
87 } else if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_pm_acpi_event_handler()
88 if (rdev->pm.profile == PM_PROFILE_AUTO) { in radeon_pm_acpi_event_handler()
89 mutex_lock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
90 radeon_pm_update_profile(rdev); in radeon_pm_acpi_event_handler()
91 radeon_pm_set_clocks(rdev); in radeon_pm_acpi_event_handler()
92 mutex_unlock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
97 static void radeon_pm_update_profile(struct radeon_device *rdev) in radeon_pm_update_profile() argument
99 switch (rdev->pm.profile) { in radeon_pm_update_profile()
101 rdev->pm.profile_index = PM_PROFILE_DEFAULT_IDX; in radeon_pm_update_profile()
105 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
106 rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX; in radeon_pm_update_profile()
108 rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX; in radeon_pm_update_profile()
110 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
111 rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX; in radeon_pm_update_profile()
113 rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX; in radeon_pm_update_profile()
117 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
118 rdev->pm.profile_index = PM_PROFILE_LOW_MH_IDX; in radeon_pm_update_profile()
120 rdev->pm.profile_index = PM_PROFILE_LOW_SH_IDX; in radeon_pm_update_profile()
123 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
124 rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX; in radeon_pm_update_profile()
126 rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX; in radeon_pm_update_profile()
129 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
130 rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX; in radeon_pm_update_profile()
132 rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX; in radeon_pm_update_profile()
136 if (rdev->pm.active_crtc_count == 0) { in radeon_pm_update_profile()
137 rdev->pm.requested_power_state_index = in radeon_pm_update_profile()
138 rdev->pm.profiles[rdev->pm.profile_index].dpms_off_ps_idx; in radeon_pm_update_profile()
139 rdev->pm.requested_clock_mode_index = in radeon_pm_update_profile()
140 rdev->pm.profiles[rdev->pm.profile_index].dpms_off_cm_idx; in radeon_pm_update_profile()
142 rdev->pm.requested_power_state_index = in radeon_pm_update_profile()
143 rdev->pm.profiles[rdev->pm.profile_index].dpms_on_ps_idx; in radeon_pm_update_profile()
144 rdev->pm.requested_clock_mode_index = in radeon_pm_update_profile()
145 rdev->pm.profiles[rdev->pm.profile_index].dpms_on_cm_idx; in radeon_pm_update_profile()
149 static void radeon_unmap_vram_bos(struct radeon_device *rdev) in radeon_unmap_vram_bos() argument
153 if (list_empty(&rdev->gem.objects)) in radeon_unmap_vram_bos()
156 list_for_each_entry_safe(bo, n, &rdev->gem.objects, list) { in radeon_unmap_vram_bos()
162 static void radeon_sync_with_vblank(struct radeon_device *rdev) in radeon_sync_with_vblank() argument
164 if (rdev->pm.active_crtcs) { in radeon_sync_with_vblank()
165 rdev->pm.vblank_sync = false; in radeon_sync_with_vblank()
167 rdev->irq.vblank_queue, rdev->pm.vblank_sync, in radeon_sync_with_vblank()
172 static void radeon_set_power_state(struct radeon_device *rdev) in radeon_set_power_state() argument
177 if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) && in radeon_set_power_state()
178 (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index)) in radeon_set_power_state()
181 if (radeon_gui_idle(rdev)) { in radeon_set_power_state()
182 sclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. in radeon_set_power_state()
183 clock_info[rdev->pm.requested_clock_mode_index].sclk; in radeon_set_power_state()
184 if (sclk > rdev->pm.default_sclk) in radeon_set_power_state()
185 sclk = rdev->pm.default_sclk; in radeon_set_power_state()
191 if ((rdev->pm.pm_method == PM_METHOD_PROFILE) && in radeon_set_power_state()
192 (rdev->family >= CHIP_BARTS) && in radeon_set_power_state()
193 rdev->pm.active_crtc_count && in radeon_set_power_state()
194 ((rdev->pm.profile_index == PM_PROFILE_MID_MH_IDX) || in radeon_set_power_state()
195 (rdev->pm.profile_index == PM_PROFILE_LOW_MH_IDX))) in radeon_set_power_state()
196 mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. in radeon_set_power_state()
197 clock_info[rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx].mclk; in radeon_set_power_state()
199 mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. in radeon_set_power_state()
200 clock_info[rdev->pm.requested_clock_mode_index].mclk; in radeon_set_power_state()
202 if (mclk > rdev->pm.default_mclk) in radeon_set_power_state()
203 mclk = rdev->pm.default_mclk; in radeon_set_power_state()
206 if (sclk < rdev->pm.current_sclk) in radeon_set_power_state()
209 radeon_sync_with_vblank(rdev); in radeon_set_power_state()
211 if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_set_power_state()
212 if (!radeon_pm_in_vbl(rdev)) in radeon_set_power_state()
216 radeon_pm_prepare(rdev); in radeon_set_power_state()
220 radeon_pm_misc(rdev); in radeon_set_power_state()
223 if (sclk != rdev->pm.current_sclk) { in radeon_set_power_state()
224 radeon_pm_debug_check_in_vbl(rdev, false); in radeon_set_power_state()
225 radeon_set_engine_clock(rdev, sclk); in radeon_set_power_state()
226 radeon_pm_debug_check_in_vbl(rdev, true); in radeon_set_power_state()
227 rdev->pm.current_sclk = sclk; in radeon_set_power_state()
232 if (rdev->asic->pm.set_memory_clock && (mclk != rdev->pm.current_mclk)) { in radeon_set_power_state()
233 radeon_pm_debug_check_in_vbl(rdev, false); in radeon_set_power_state()
234 radeon_set_memory_clock(rdev, mclk); in radeon_set_power_state()
235 radeon_pm_debug_check_in_vbl(rdev, true); in radeon_set_power_state()
236 rdev->pm.current_mclk = mclk; in radeon_set_power_state()
242 radeon_pm_misc(rdev); in radeon_set_power_state()
244 radeon_pm_finish(rdev); in radeon_set_power_state()
246 rdev->pm.current_power_state_index = rdev->pm.requested_power_state_index; in radeon_set_power_state()
247 rdev->pm.current_clock_mode_index = rdev->pm.requested_clock_mode_index; in radeon_set_power_state()
252 static void radeon_pm_set_clocks(struct radeon_device *rdev) in radeon_pm_set_clocks() argument
258 if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) && in radeon_pm_set_clocks()
259 (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index)) in radeon_pm_set_clocks()
262 down_write(&rdev->pm.mclk_lock); in radeon_pm_set_clocks()
263 mutex_lock(&rdev->ring_lock); in radeon_pm_set_clocks()
267 struct radeon_ring *ring = &rdev->ring[i]; in radeon_pm_set_clocks()
271 r = radeon_fence_wait_empty(rdev, i); in radeon_pm_set_clocks()
274 mutex_unlock(&rdev->ring_lock); in radeon_pm_set_clocks()
275 up_write(&rdev->pm.mclk_lock); in radeon_pm_set_clocks()
280 radeon_unmap_vram_bos(rdev); in radeon_pm_set_clocks()
282 if (rdev->irq.installed) { in radeon_pm_set_clocks()
284 drm_for_each_crtc(crtc, rdev->ddev) { in radeon_pm_set_clocks()
285 if (rdev->pm.active_crtcs & (1 << i)) { in radeon_pm_set_clocks()
288 rdev->pm.req_vblank |= (1 << i); in radeon_pm_set_clocks()
297 radeon_set_power_state(rdev); in radeon_pm_set_clocks()
299 if (rdev->irq.installed) { in radeon_pm_set_clocks()
301 drm_for_each_crtc(crtc, rdev->ddev) { in radeon_pm_set_clocks()
302 if (rdev->pm.req_vblank & (1 << i)) { in radeon_pm_set_clocks()
303 rdev->pm.req_vblank &= ~(1 << i); in radeon_pm_set_clocks()
311 radeon_update_bandwidth_info(rdev); in radeon_pm_set_clocks()
312 if (rdev->pm.active_crtc_count) in radeon_pm_set_clocks()
313 radeon_bandwidth_update(rdev); in radeon_pm_set_clocks()
315 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_pm_set_clocks()
317 mutex_unlock(&rdev->ring_lock); in radeon_pm_set_clocks()
318 up_write(&rdev->pm.mclk_lock); in radeon_pm_set_clocks()
321 static void radeon_pm_print_states(struct radeon_device *rdev) in radeon_pm_print_states() argument
327 DRM_DEBUG_DRIVER("%d Power State(s)\n", rdev->pm.num_power_states); in radeon_pm_print_states()
328 for (i = 0; i < rdev->pm.num_power_states; i++) { in radeon_pm_print_states()
329 power_state = &rdev->pm.power_state[i]; in radeon_pm_print_states()
332 if (i == rdev->pm.default_power_state_index) in radeon_pm_print_states()
334 if ((rdev->flags & RADEON_IS_PCIE) && !(rdev->flags & RADEON_IS_IGP)) in radeon_pm_print_states()
341 if (rdev->flags & RADEON_IS_IGP) in radeon_pm_print_states()
360 struct radeon_device *rdev = ddev->dev_private; in radeon_get_pm_profile() local
361 int cp = rdev->pm.profile; in radeon_get_pm_profile()
376 struct radeon_device *rdev = ddev->dev_private; in radeon_set_pm_profile() local
379 if ((rdev->flags & RADEON_IS_PX) && in radeon_set_pm_profile()
383 mutex_lock(&rdev->pm.mutex); in radeon_set_pm_profile()
384 if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_set_pm_profile()
386 rdev->pm.profile = PM_PROFILE_DEFAULT; in radeon_set_pm_profile()
388 rdev->pm.profile = PM_PROFILE_AUTO; in radeon_set_pm_profile()
390 rdev->pm.profile = PM_PROFILE_LOW; in radeon_set_pm_profile()
392 rdev->pm.profile = PM_PROFILE_MID; in radeon_set_pm_profile()
394 rdev->pm.profile = PM_PROFILE_HIGH; in radeon_set_pm_profile()
399 radeon_pm_update_profile(rdev); in radeon_set_pm_profile()
400 radeon_pm_set_clocks(rdev); in radeon_set_pm_profile()
405 mutex_unlock(&rdev->pm.mutex); in radeon_set_pm_profile()
415 struct radeon_device *rdev = ddev->dev_private; in radeon_get_pm_method() local
416 int pm = rdev->pm.pm_method; in radeon_get_pm_method()
429 struct radeon_device *rdev = ddev->dev_private; in radeon_set_pm_method() local
432 if ((rdev->flags & RADEON_IS_PX) && in radeon_set_pm_method()
439 if (rdev->pm.pm_method == PM_METHOD_DPM) { in radeon_set_pm_method()
445 mutex_lock(&rdev->pm.mutex); in radeon_set_pm_method()
446 rdev->pm.pm_method = PM_METHOD_DYNPM; in radeon_set_pm_method()
447 rdev->pm.dynpm_state = DYNPM_STATE_PAUSED; in radeon_set_pm_method()
448 rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; in radeon_set_pm_method()
449 mutex_unlock(&rdev->pm.mutex); in radeon_set_pm_method()
451 mutex_lock(&rdev->pm.mutex); in radeon_set_pm_method()
453 rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; in radeon_set_pm_method()
454 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_set_pm_method()
455 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_set_pm_method()
456 mutex_unlock(&rdev->pm.mutex); in radeon_set_pm_method()
457 cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); in radeon_set_pm_method()
462 radeon_pm_compute_clocks(rdev); in radeon_set_pm_method()
472 struct radeon_device *rdev = ddev->dev_private; in radeon_get_dpm_state() local
473 enum radeon_pm_state_type pm = rdev->pm.dpm.user_state; in radeon_get_dpm_state()
486 struct radeon_device *rdev = ddev->dev_private; in radeon_set_dpm_state() local
488 mutex_lock(&rdev->pm.mutex); in radeon_set_dpm_state()
490 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BATTERY; in radeon_set_dpm_state()
492 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; in radeon_set_dpm_state()
494 rdev->pm.dpm.user_state = POWER_STATE_TYPE_PERFORMANCE; in radeon_set_dpm_state()
496 mutex_unlock(&rdev->pm.mutex); in radeon_set_dpm_state()
500 mutex_unlock(&rdev->pm.mutex); in radeon_set_dpm_state()
503 if (!(rdev->flags & RADEON_IS_PX) || in radeon_set_dpm_state()
505 radeon_pm_compute_clocks(rdev); in radeon_set_dpm_state()
516 struct radeon_device *rdev = ddev->dev_private; in radeon_get_dpm_forced_performance_level() local
517 enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level; in radeon_get_dpm_forced_performance_level()
519 if ((rdev->flags & RADEON_IS_PX) && in radeon_get_dpm_forced_performance_level()
534 struct radeon_device *rdev = ddev->dev_private; in radeon_set_dpm_forced_performance_level() local
539 if ((rdev->flags & RADEON_IS_PX) && in radeon_set_dpm_forced_performance_level()
543 mutex_lock(&rdev->pm.mutex); in radeon_set_dpm_forced_performance_level()
554 if (rdev->asic->dpm.force_performance_level) { in radeon_set_dpm_forced_performance_level()
555 if (rdev->pm.dpm.thermal_active) { in radeon_set_dpm_forced_performance_level()
559 ret = radeon_dpm_force_performance_level(rdev, level); in radeon_set_dpm_forced_performance_level()
564 mutex_unlock(&rdev->pm.mutex); in radeon_set_dpm_forced_performance_level()
573 struct radeon_device *rdev = dev_get_drvdata(dev); in radeon_hwmon_get_pwm1_enable() local
576 if (rdev->asic->dpm.fan_ctrl_get_mode) in radeon_hwmon_get_pwm1_enable()
577 pwm_mode = rdev->asic->dpm.fan_ctrl_get_mode(rdev); in radeon_hwmon_get_pwm1_enable()
588 struct radeon_device *rdev = dev_get_drvdata(dev); in radeon_hwmon_set_pwm1_enable() local
592 if(!rdev->asic->dpm.fan_ctrl_set_mode) in radeon_hwmon_set_pwm1_enable()
601 rdev->asic->dpm.fan_ctrl_set_mode(rdev, FDO_PWM_MODE_STATIC); in radeon_hwmon_set_pwm1_enable()
604 rdev->asic->dpm.fan_ctrl_set_mode(rdev, 0); in radeon_hwmon_set_pwm1_enable()
629 struct radeon_device *rdev = dev_get_drvdata(dev); in radeon_hwmon_set_pwm1() local
639 err = rdev->asic->dpm.set_fan_speed_percent(rdev, value); in radeon_hwmon_set_pwm1()
650 struct radeon_device *rdev = dev_get_drvdata(dev); in radeon_hwmon_get_pwm1() local
654 err = rdev->asic->dpm.get_fan_speed_percent(rdev, &speed); in radeon_hwmon_get_pwm1()
674 struct radeon_device *rdev = dev_get_drvdata(dev); in radeon_hwmon_show_temp() local
675 struct drm_device *ddev = rdev->ddev; in radeon_hwmon_show_temp()
679 if ((rdev->flags & RADEON_IS_PX) && in radeon_hwmon_show_temp()
683 if (rdev->asic->pm.get_temperature) in radeon_hwmon_show_temp()
684 temp = radeon_get_temperature(rdev); in radeon_hwmon_show_temp()
695 struct radeon_device *rdev = dev_get_drvdata(dev); in radeon_hwmon_show_temp_thresh() local
700 temp = rdev->pm.dpm.thermal.min_temp; in radeon_hwmon_show_temp_thresh()
702 temp = rdev->pm.dpm.thermal.max_temp; in radeon_hwmon_show_temp_thresh()
718 struct radeon_device *rdev = dev_get_drvdata(dev); in radeon_hwmon_show_sclk() local
719 struct drm_device *ddev = rdev->ddev; in radeon_hwmon_show_sclk()
723 if ((rdev->flags & RADEON_IS_PX) && in radeon_hwmon_show_sclk()
727 if (rdev->asic->dpm.get_current_sclk) in radeon_hwmon_show_sclk()
728 sclk = radeon_dpm_get_current_sclk(rdev); in radeon_hwmon_show_sclk()
757 struct radeon_device *rdev = dev_get_drvdata(dev); in hwmon_attributes_visible() local
761 if (rdev->pm.pm_method != PM_METHOD_DPM && in hwmon_attributes_visible()
772 if (rdev->pm.no_fan && in hwmon_attributes_visible()
780 if ((!rdev->asic->dpm.get_fan_speed_percent && in hwmon_attributes_visible()
782 (!rdev->asic->dpm.fan_ctrl_get_mode && in hwmon_attributes_visible()
786 if ((!rdev->asic->dpm.set_fan_speed_percent && in hwmon_attributes_visible()
788 (!rdev->asic->dpm.fan_ctrl_set_mode && in hwmon_attributes_visible()
793 if ((!rdev->asic->dpm.set_fan_speed_percent && in hwmon_attributes_visible()
794 !rdev->asic->dpm.get_fan_speed_percent) && in hwmon_attributes_visible()
812 static int radeon_hwmon_init(struct radeon_device *rdev) in radeon_hwmon_init() argument
816 switch (rdev->pm.int_thermal_type) { in radeon_hwmon_init()
825 if (rdev->asic->pm.get_temperature == NULL) in radeon_hwmon_init()
827 rdev->pm.int_hwmon_dev = hwmon_device_register_with_groups(rdev->dev, in radeon_hwmon_init()
828 "radeon", rdev, in radeon_hwmon_init()
830 if (IS_ERR(rdev->pm.int_hwmon_dev)) { in radeon_hwmon_init()
831 err = PTR_ERR(rdev->pm.int_hwmon_dev); in radeon_hwmon_init()
832 dev_err(rdev->dev, in radeon_hwmon_init()
843 static void radeon_hwmon_fini(struct radeon_device *rdev) in radeon_hwmon_fini() argument
845 if (rdev->pm.int_hwmon_dev) in radeon_hwmon_fini()
846 hwmon_device_unregister(rdev->pm.int_hwmon_dev); in radeon_hwmon_fini()
851 struct radeon_device *rdev = in radeon_dpm_thermal_work_handler() local
857 if (!rdev->pm.dpm_enabled) in radeon_dpm_thermal_work_handler()
860 if (rdev->asic->pm.get_temperature) { in radeon_dpm_thermal_work_handler()
861 int temp = radeon_get_temperature(rdev); in radeon_dpm_thermal_work_handler()
863 if (temp < rdev->pm.dpm.thermal.min_temp) in radeon_dpm_thermal_work_handler()
865 dpm_state = rdev->pm.dpm.user_state; in radeon_dpm_thermal_work_handler()
867 if (rdev->pm.dpm.thermal.high_to_low) in radeon_dpm_thermal_work_handler()
869 dpm_state = rdev->pm.dpm.user_state; in radeon_dpm_thermal_work_handler()
871 mutex_lock(&rdev->pm.mutex); in radeon_dpm_thermal_work_handler()
873 rdev->pm.dpm.thermal_active = true; in radeon_dpm_thermal_work_handler()
875 rdev->pm.dpm.thermal_active = false; in radeon_dpm_thermal_work_handler()
876 rdev->pm.dpm.state = dpm_state; in radeon_dpm_thermal_work_handler()
877 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_thermal_work_handler()
879 radeon_pm_compute_clocks(rdev); in radeon_dpm_thermal_work_handler()
882 static bool radeon_dpm_single_display(struct radeon_device *rdev) in radeon_dpm_single_display() argument
884 bool single_display = (rdev->pm.dpm.new_active_crtc_count < 2) ? in radeon_dpm_single_display()
888 if (single_display && rdev->asic->dpm.vblank_too_short) { in radeon_dpm_single_display()
889 if (radeon_dpm_vblank_too_short(rdev)) in radeon_dpm_single_display()
896 if (single_display && (r600_dpm_get_vrefresh(rdev) >= 120)) in radeon_dpm_single_display()
902 static struct radeon_ps *radeon_dpm_pick_power_state(struct radeon_device *rdev, in radeon_dpm_pick_power_state() argument
908 bool single_display = radeon_dpm_single_display(rdev); in radeon_dpm_pick_power_state()
921 for (i = 0; i < rdev->pm.dpm.num_ps; i++) { in radeon_dpm_pick_power_state()
922 ps = &rdev->pm.dpm.ps[i]; in radeon_dpm_pick_power_state()
955 if (rdev->pm.dpm.uvd_ps) in radeon_dpm_pick_power_state()
956 return rdev->pm.dpm.uvd_ps; in radeon_dpm_pick_power_state()
976 return rdev->pm.dpm.boot_ps; in radeon_dpm_pick_power_state()
1005 if (rdev->pm.dpm.uvd_ps) { in radeon_dpm_pick_power_state()
1006 return rdev->pm.dpm.uvd_ps; in radeon_dpm_pick_power_state()
1029 static void radeon_dpm_change_power_state_locked(struct radeon_device *rdev) in radeon_dpm_change_power_state_locked() argument
1035 bool single_display = radeon_dpm_single_display(rdev); in radeon_dpm_change_power_state_locked()
1038 if (!rdev->pm.dpm_enabled) in radeon_dpm_change_power_state_locked()
1041 if (rdev->pm.dpm.user_state != rdev->pm.dpm.state) { in radeon_dpm_change_power_state_locked()
1043 if ((!rdev->pm.dpm.thermal_active) && in radeon_dpm_change_power_state_locked()
1044 (!rdev->pm.dpm.uvd_active)) in radeon_dpm_change_power_state_locked()
1045 rdev->pm.dpm.state = rdev->pm.dpm.user_state; in radeon_dpm_change_power_state_locked()
1047 dpm_state = rdev->pm.dpm.state; in radeon_dpm_change_power_state_locked()
1049 ps = radeon_dpm_pick_power_state(rdev, dpm_state); in radeon_dpm_change_power_state_locked()
1051 rdev->pm.dpm.requested_ps = ps; in radeon_dpm_change_power_state_locked()
1056 if (rdev->pm.dpm.current_ps == rdev->pm.dpm.requested_ps) { in radeon_dpm_change_power_state_locked()
1058 if (ps->vce_active != rdev->pm.dpm.vce_active) in radeon_dpm_change_power_state_locked()
1061 if (rdev->pm.dpm.single_display != single_display) in radeon_dpm_change_power_state_locked()
1063 if ((rdev->family < CHIP_BARTS) || (rdev->flags & RADEON_IS_IGP)) { in radeon_dpm_change_power_state_locked()
1067 if (rdev->pm.dpm.new_active_crtcs != rdev->pm.dpm.current_active_crtcs) { in radeon_dpm_change_power_state_locked()
1069 radeon_bandwidth_update(rdev); in radeon_dpm_change_power_state_locked()
1071 radeon_dpm_display_configuration_changed(rdev); in radeon_dpm_change_power_state_locked()
1072 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()
1073 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()
1081 if (rdev->pm.dpm.new_active_crtcs == in radeon_dpm_change_power_state_locked()
1082 rdev->pm.dpm.current_active_crtcs) { in radeon_dpm_change_power_state_locked()
1085 if ((rdev->pm.dpm.current_active_crtc_count > 1) && in radeon_dpm_change_power_state_locked()
1086 (rdev->pm.dpm.new_active_crtc_count > 1)) { in radeon_dpm_change_power_state_locked()
1088 radeon_bandwidth_update(rdev); in radeon_dpm_change_power_state_locked()
1090 radeon_dpm_display_configuration_changed(rdev); in radeon_dpm_change_power_state_locked()
1091 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()
1092 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()
1102 radeon_dpm_print_power_state(rdev, rdev->pm.dpm.current_ps); in radeon_dpm_change_power_state_locked()
1104 radeon_dpm_print_power_state(rdev, rdev->pm.dpm.requested_ps); in radeon_dpm_change_power_state_locked()
1107 down_write(&rdev->pm.mclk_lock); in radeon_dpm_change_power_state_locked()
1108 mutex_lock(&rdev->ring_lock); in radeon_dpm_change_power_state_locked()
1111 ps->vce_active = rdev->pm.dpm.vce_active; in radeon_dpm_change_power_state_locked()
1113 ret = radeon_dpm_pre_set_power_state(rdev); in radeon_dpm_change_power_state_locked()
1118 radeon_bandwidth_update(rdev); in radeon_dpm_change_power_state_locked()
1120 radeon_dpm_display_configuration_changed(rdev); in radeon_dpm_change_power_state_locked()
1124 struct radeon_ring *ring = &rdev->ring[i]; in radeon_dpm_change_power_state_locked()
1126 radeon_fence_wait_empty(rdev, i); in radeon_dpm_change_power_state_locked()
1130 radeon_dpm_set_power_state(rdev); in radeon_dpm_change_power_state_locked()
1133 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps; in radeon_dpm_change_power_state_locked()
1135 radeon_dpm_post_set_power_state(rdev); in radeon_dpm_change_power_state_locked()
1137 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()
1138 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()
1139 rdev->pm.dpm.single_display = single_display; in radeon_dpm_change_power_state_locked()
1141 if (rdev->asic->dpm.force_performance_level) { in radeon_dpm_change_power_state_locked()
1142 if (rdev->pm.dpm.thermal_active) { in radeon_dpm_change_power_state_locked()
1143 enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level; in radeon_dpm_change_power_state_locked()
1145 radeon_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_LOW); in radeon_dpm_change_power_state_locked()
1147 rdev->pm.dpm.forced_level = level; in radeon_dpm_change_power_state_locked()
1150 radeon_dpm_force_performance_level(rdev, rdev->pm.dpm.forced_level); in radeon_dpm_change_power_state_locked()
1155 mutex_unlock(&rdev->ring_lock); in radeon_dpm_change_power_state_locked()
1156 up_write(&rdev->pm.mclk_lock); in radeon_dpm_change_power_state_locked()
1159 void radeon_dpm_enable_uvd(struct radeon_device *rdev, bool enable) in radeon_dpm_enable_uvd() argument
1163 if (rdev->asic->dpm.powergate_uvd) { in radeon_dpm_enable_uvd()
1164 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1167 enable |= rdev->pm.dpm.sd > 0; in radeon_dpm_enable_uvd()
1168 enable |= rdev->pm.dpm.hd > 0; in radeon_dpm_enable_uvd()
1170 radeon_dpm_powergate_uvd(rdev, !enable); in radeon_dpm_enable_uvd()
1171 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1174 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1175 rdev->pm.dpm.uvd_active = true; in radeon_dpm_enable_uvd()
1178 if ((rdev->pm.dpm.sd == 1) && (rdev->pm.dpm.hd == 0)) in radeon_dpm_enable_uvd()
1180 else if ((rdev->pm.dpm.sd == 2) && (rdev->pm.dpm.hd == 0)) in radeon_dpm_enable_uvd()
1182 else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 1)) in radeon_dpm_enable_uvd()
1184 else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 2)) in radeon_dpm_enable_uvd()
1189 rdev->pm.dpm.state = dpm_state; in radeon_dpm_enable_uvd()
1190 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1192 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1193 rdev->pm.dpm.uvd_active = false; in radeon_dpm_enable_uvd()
1194 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1197 radeon_pm_compute_clocks(rdev); in radeon_dpm_enable_uvd()
1201 void radeon_dpm_enable_vce(struct radeon_device *rdev, bool enable) in radeon_dpm_enable_vce() argument
1204 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1205 rdev->pm.dpm.vce_active = true; in radeon_dpm_enable_vce()
1207 rdev->pm.dpm.vce_level = RADEON_VCE_LEVEL_AC_ALL; in radeon_dpm_enable_vce()
1208 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1210 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1211 rdev->pm.dpm.vce_active = false; in radeon_dpm_enable_vce()
1212 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1215 radeon_pm_compute_clocks(rdev); in radeon_dpm_enable_vce()
1218 static void radeon_pm_suspend_old(struct radeon_device *rdev) in radeon_pm_suspend_old() argument
1220 mutex_lock(&rdev->pm.mutex); in radeon_pm_suspend_old()
1221 if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_pm_suspend_old()
1222 if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) in radeon_pm_suspend_old()
1223 rdev->pm.dynpm_state = DYNPM_STATE_SUSPENDED; in radeon_pm_suspend_old()
1225 mutex_unlock(&rdev->pm.mutex); in radeon_pm_suspend_old()
1227 cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); in radeon_pm_suspend_old()
1230 static void radeon_pm_suspend_dpm(struct radeon_device *rdev) in radeon_pm_suspend_dpm() argument
1232 mutex_lock(&rdev->pm.mutex); in radeon_pm_suspend_dpm()
1234 radeon_dpm_disable(rdev); in radeon_pm_suspend_dpm()
1236 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_suspend_dpm()
1237 rdev->pm.dpm_enabled = false; in radeon_pm_suspend_dpm()
1238 mutex_unlock(&rdev->pm.mutex); in radeon_pm_suspend_dpm()
1241 void radeon_pm_suspend(struct radeon_device *rdev) in radeon_pm_suspend() argument
1243 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_suspend()
1244 radeon_pm_suspend_dpm(rdev); in radeon_pm_suspend()
1246 radeon_pm_suspend_old(rdev); in radeon_pm_suspend()
1249 static void radeon_pm_resume_old(struct radeon_device *rdev) in radeon_pm_resume_old() argument
1252 if ((rdev->family >= CHIP_BARTS) && in radeon_pm_resume_old()
1253 (rdev->family <= CHIP_CAYMAN) && in radeon_pm_resume_old()
1254 rdev->mc_fw) { in radeon_pm_resume_old()
1255 if (rdev->pm.default_vddc) in radeon_pm_resume_old()
1256 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_resume_old()
1258 if (rdev->pm.default_vddci) in radeon_pm_resume_old()
1259 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_resume_old()
1261 if (rdev->pm.default_sclk) in radeon_pm_resume_old()
1262 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_resume_old()
1263 if (rdev->pm.default_mclk) in radeon_pm_resume_old()
1264 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_resume_old()
1267 mutex_lock(&rdev->pm.mutex); in radeon_pm_resume_old()
1268 rdev->pm.current_power_state_index = rdev->pm.default_power_state_index; in radeon_pm_resume_old()
1269 rdev->pm.current_clock_mode_index = 0; in radeon_pm_resume_old()
1270 rdev->pm.current_sclk = rdev->pm.default_sclk; in radeon_pm_resume_old()
1271 rdev->pm.current_mclk = rdev->pm.default_mclk; in radeon_pm_resume_old()
1272 if (rdev->pm.power_state) { in radeon_pm_resume_old()
1273 …rdev->pm.current_vddc = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].vol… in radeon_pm_resume_old()
1274 …rdev->pm.current_vddci = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].vo… in radeon_pm_resume_old()
1276 if (rdev->pm.pm_method == PM_METHOD_DYNPM in radeon_pm_resume_old()
1277 && rdev->pm.dynpm_state == DYNPM_STATE_SUSPENDED) { in radeon_pm_resume_old()
1278 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; in radeon_pm_resume_old()
1279 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_pm_resume_old()
1282 mutex_unlock(&rdev->pm.mutex); in radeon_pm_resume_old()
1283 radeon_pm_compute_clocks(rdev); in radeon_pm_resume_old()
1286 static void radeon_pm_resume_dpm(struct radeon_device *rdev) in radeon_pm_resume_dpm() argument
1291 mutex_lock(&rdev->pm.mutex); in radeon_pm_resume_dpm()
1292 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_resume_dpm()
1293 radeon_dpm_setup_asic(rdev); in radeon_pm_resume_dpm()
1294 ret = radeon_dpm_enable(rdev); in radeon_pm_resume_dpm()
1295 mutex_unlock(&rdev->pm.mutex); in radeon_pm_resume_dpm()
1298 rdev->pm.dpm_enabled = true; in radeon_pm_resume_dpm()
1303 if ((rdev->family >= CHIP_BARTS) && in radeon_pm_resume_dpm()
1304 (rdev->family <= CHIP_CAYMAN) && in radeon_pm_resume_dpm()
1305 rdev->mc_fw) { in radeon_pm_resume_dpm()
1306 if (rdev->pm.default_vddc) in radeon_pm_resume_dpm()
1307 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_resume_dpm()
1309 if (rdev->pm.default_vddci) in radeon_pm_resume_dpm()
1310 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_resume_dpm()
1312 if (rdev->pm.default_sclk) in radeon_pm_resume_dpm()
1313 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_resume_dpm()
1314 if (rdev->pm.default_mclk) in radeon_pm_resume_dpm()
1315 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_resume_dpm()
1319 void radeon_pm_resume(struct radeon_device *rdev) in radeon_pm_resume() argument
1321 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_resume()
1322 radeon_pm_resume_dpm(rdev); in radeon_pm_resume()
1324 radeon_pm_resume_old(rdev); in radeon_pm_resume()
1327 static int radeon_pm_init_old(struct radeon_device *rdev) in radeon_pm_init_old() argument
1331 rdev->pm.profile = PM_PROFILE_DEFAULT; in radeon_pm_init_old()
1332 rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; in radeon_pm_init_old()
1333 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_pm_init_old()
1334 rdev->pm.dynpm_can_upclock = true; in radeon_pm_init_old()
1335 rdev->pm.dynpm_can_downclock = true; in radeon_pm_init_old()
1336 rdev->pm.default_sclk = rdev->clock.default_sclk; in radeon_pm_init_old()
1337 rdev->pm.default_mclk = rdev->clock.default_mclk; in radeon_pm_init_old()
1338 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_pm_init_old()
1339 rdev->pm.current_mclk = rdev->clock.default_mclk; in radeon_pm_init_old()
1340 rdev->pm.int_thermal_type = THERMAL_TYPE_NONE; in radeon_pm_init_old()
1342 if (rdev->bios) { in radeon_pm_init_old()
1343 if (rdev->is_atom_bios) in radeon_pm_init_old()
1344 radeon_atombios_get_power_modes(rdev); in radeon_pm_init_old()
1346 radeon_combios_get_power_modes(rdev); in radeon_pm_init_old()
1347 radeon_pm_print_states(rdev); in radeon_pm_init_old()
1348 radeon_pm_init_profile(rdev); in radeon_pm_init_old()
1350 if ((rdev->family >= CHIP_BARTS) && in radeon_pm_init_old()
1351 (rdev->family <= CHIP_CAYMAN) && in radeon_pm_init_old()
1352 rdev->mc_fw) { in radeon_pm_init_old()
1353 if (rdev->pm.default_vddc) in radeon_pm_init_old()
1354 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_init_old()
1356 if (rdev->pm.default_vddci) in radeon_pm_init_old()
1357 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_init_old()
1359 if (rdev->pm.default_sclk) in radeon_pm_init_old()
1360 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_init_old()
1361 if (rdev->pm.default_mclk) in radeon_pm_init_old()
1362 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_init_old()
1367 ret = radeon_hwmon_init(rdev); in radeon_pm_init_old()
1371 INIT_DELAYED_WORK(&rdev->pm.dynpm_idle_work, radeon_dynpm_idle_work_handler); in radeon_pm_init_old()
1373 if (rdev->pm.num_power_states > 1) { in radeon_pm_init_old()
1374 if (radeon_debugfs_pm_init(rdev)) { in radeon_pm_init_old()
1384 static void radeon_dpm_print_power_states(struct radeon_device *rdev) in radeon_dpm_print_power_states() argument
1388 for (i = 0; i < rdev->pm.dpm.num_ps; i++) { in radeon_dpm_print_power_states()
1390 radeon_dpm_print_power_state(rdev, &rdev->pm.dpm.ps[i]); in radeon_dpm_print_power_states()
1394 static int radeon_pm_init_dpm(struct radeon_device *rdev) in radeon_pm_init_dpm() argument
1399 rdev->pm.dpm.state = POWER_STATE_TYPE_BALANCED; in radeon_pm_init_dpm()
1400 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; in radeon_pm_init_dpm()
1401 rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO; in radeon_pm_init_dpm()
1402 rdev->pm.default_sclk = rdev->clock.default_sclk; in radeon_pm_init_dpm()
1403 rdev->pm.default_mclk = rdev->clock.default_mclk; in radeon_pm_init_dpm()
1404 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_pm_init_dpm()
1405 rdev->pm.current_mclk = rdev->clock.default_mclk; in radeon_pm_init_dpm()
1406 rdev->pm.int_thermal_type = THERMAL_TYPE_NONE; in radeon_pm_init_dpm()
1408 if (rdev->bios && rdev->is_atom_bios) in radeon_pm_init_dpm()
1409 radeon_atombios_get_power_modes(rdev); in radeon_pm_init_dpm()
1414 ret = radeon_hwmon_init(rdev); in radeon_pm_init_dpm()
1418 INIT_WORK(&rdev->pm.dpm.thermal.work, radeon_dpm_thermal_work_handler); in radeon_pm_init_dpm()
1419 mutex_lock(&rdev->pm.mutex); in radeon_pm_init_dpm()
1420 radeon_dpm_init(rdev); in radeon_pm_init_dpm()
1421 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_init_dpm()
1423 radeon_dpm_print_power_states(rdev); in radeon_pm_init_dpm()
1424 radeon_dpm_setup_asic(rdev); in radeon_pm_init_dpm()
1425 ret = radeon_dpm_enable(rdev); in radeon_pm_init_dpm()
1426 mutex_unlock(&rdev->pm.mutex); in radeon_pm_init_dpm()
1429 rdev->pm.dpm_enabled = true; in radeon_pm_init_dpm()
1431 if (radeon_debugfs_pm_init(rdev)) { in radeon_pm_init_dpm()
1440 rdev->pm.dpm_enabled = false; in radeon_pm_init_dpm()
1441 if ((rdev->family >= CHIP_BARTS) && in radeon_pm_init_dpm()
1442 (rdev->family <= CHIP_CAYMAN) && in radeon_pm_init_dpm()
1443 rdev->mc_fw) { in radeon_pm_init_dpm()
1444 if (rdev->pm.default_vddc) in radeon_pm_init_dpm()
1445 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_init_dpm()
1447 if (rdev->pm.default_vddci) in radeon_pm_init_dpm()
1448 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_init_dpm()
1450 if (rdev->pm.default_sclk) in radeon_pm_init_dpm()
1451 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_init_dpm()
1452 if (rdev->pm.default_mclk) in radeon_pm_init_dpm()
1453 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_init_dpm()
1475 int radeon_pm_init(struct radeon_device *rdev) in radeon_pm_init() argument
1482 if (rdev->pdev->vendor == p->chip_vendor && in radeon_pm_init()
1483 rdev->pdev->device == p->chip_device && in radeon_pm_init()
1484 rdev->pdev->subsystem_vendor == p->subsys_vendor && in radeon_pm_init()
1485 rdev->pdev->subsystem_device == p->subsys_device) { in radeon_pm_init()
1493 switch (rdev->family) { in radeon_pm_init()
1503 if (!rdev->rlc_fw) in radeon_pm_init()
1504 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1505 else if ((rdev->family >= CHIP_RV770) && in radeon_pm_init()
1506 (!(rdev->flags & RADEON_IS_IGP)) && in radeon_pm_init()
1507 (!rdev->smc_fw)) in radeon_pm_init()
1508 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1510 rdev->pm.pm_method = PM_METHOD_DPM; in radeon_pm_init()
1512 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1541 if (!rdev->rlc_fw) in radeon_pm_init()
1542 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1543 else if ((rdev->family >= CHIP_RV770) && in radeon_pm_init()
1544 (!(rdev->flags & RADEON_IS_IGP)) && in radeon_pm_init()
1545 (!rdev->smc_fw)) in radeon_pm_init()
1546 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1548 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1550 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1552 rdev->pm.pm_method = PM_METHOD_DPM; in radeon_pm_init()
1556 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1560 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_init()
1561 return radeon_pm_init_dpm(rdev); in radeon_pm_init()
1563 return radeon_pm_init_old(rdev); in radeon_pm_init()
1566 int radeon_pm_late_init(struct radeon_device *rdev) in radeon_pm_late_init() argument
1570 if (rdev->pm.pm_method == PM_METHOD_DPM) { in radeon_pm_late_init()
1571 if (rdev->pm.dpm_enabled) { in radeon_pm_late_init()
1572 if (!rdev->pm.sysfs_initialized) { in radeon_pm_late_init()
1573 ret = device_create_file(rdev->dev, &dev_attr_power_dpm_state); in radeon_pm_late_init()
1576 ret = device_create_file(rdev->dev, &dev_attr_power_dpm_force_performance_level); in radeon_pm_late_init()
1580 ret = device_create_file(rdev->dev, &dev_attr_power_profile); in radeon_pm_late_init()
1583 ret = device_create_file(rdev->dev, &dev_attr_power_method); in radeon_pm_late_init()
1586 rdev->pm.sysfs_initialized = true; in radeon_pm_late_init()
1589 mutex_lock(&rdev->pm.mutex); in radeon_pm_late_init()
1590 ret = radeon_dpm_late_enable(rdev); in radeon_pm_late_init()
1591 mutex_unlock(&rdev->pm.mutex); in radeon_pm_late_init()
1593 rdev->pm.dpm_enabled = false; in radeon_pm_late_init()
1599 radeon_pm_compute_clocks(rdev); in radeon_pm_late_init()
1603 if ((rdev->pm.num_power_states > 1) && in radeon_pm_late_init()
1604 (!rdev->pm.sysfs_initialized)) { in radeon_pm_late_init()
1606 ret = device_create_file(rdev->dev, &dev_attr_power_profile); in radeon_pm_late_init()
1609 ret = device_create_file(rdev->dev, &dev_attr_power_method); in radeon_pm_late_init()
1613 rdev->pm.sysfs_initialized = true; in radeon_pm_late_init()
1619 static void radeon_pm_fini_old(struct radeon_device *rdev) in radeon_pm_fini_old() argument
1621 if (rdev->pm.num_power_states > 1) { in radeon_pm_fini_old()
1622 mutex_lock(&rdev->pm.mutex); in radeon_pm_fini_old()
1623 if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_pm_fini_old()
1624 rdev->pm.profile = PM_PROFILE_DEFAULT; in radeon_pm_fini_old()
1625 radeon_pm_update_profile(rdev); in radeon_pm_fini_old()
1626 radeon_pm_set_clocks(rdev); in radeon_pm_fini_old()
1627 } else if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_pm_fini_old()
1629 rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; in radeon_pm_fini_old()
1630 rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; in radeon_pm_fini_old()
1631 radeon_pm_set_clocks(rdev); in radeon_pm_fini_old()
1633 mutex_unlock(&rdev->pm.mutex); in radeon_pm_fini_old()
1635 cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); in radeon_pm_fini_old()
1637 device_remove_file(rdev->dev, &dev_attr_power_profile); in radeon_pm_fini_old()
1638 device_remove_file(rdev->dev, &dev_attr_power_method); in radeon_pm_fini_old()
1641 radeon_hwmon_fini(rdev); in radeon_pm_fini_old()
1642 kfree(rdev->pm.power_state); in radeon_pm_fini_old()
1645 static void radeon_pm_fini_dpm(struct radeon_device *rdev) in radeon_pm_fini_dpm() argument
1647 if (rdev->pm.num_power_states > 1) { in radeon_pm_fini_dpm()
1648 mutex_lock(&rdev->pm.mutex); in radeon_pm_fini_dpm()
1649 radeon_dpm_disable(rdev); in radeon_pm_fini_dpm()
1650 mutex_unlock(&rdev->pm.mutex); in radeon_pm_fini_dpm()
1652 device_remove_file(rdev->dev, &dev_attr_power_dpm_state); in radeon_pm_fini_dpm()
1653 device_remove_file(rdev->dev, &dev_attr_power_dpm_force_performance_level); in radeon_pm_fini_dpm()
1655 device_remove_file(rdev->dev, &dev_attr_power_profile); in radeon_pm_fini_dpm()
1656 device_remove_file(rdev->dev, &dev_attr_power_method); in radeon_pm_fini_dpm()
1658 radeon_dpm_fini(rdev); in radeon_pm_fini_dpm()
1660 radeon_hwmon_fini(rdev); in radeon_pm_fini_dpm()
1661 kfree(rdev->pm.power_state); in radeon_pm_fini_dpm()
1664 void radeon_pm_fini(struct radeon_device *rdev) in radeon_pm_fini() argument
1666 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_fini()
1667 radeon_pm_fini_dpm(rdev); in radeon_pm_fini()
1669 radeon_pm_fini_old(rdev); in radeon_pm_fini()
1672 static void radeon_pm_compute_clocks_old(struct radeon_device *rdev) in radeon_pm_compute_clocks_old() argument
1674 struct drm_device *ddev = rdev->ddev; in radeon_pm_compute_clocks_old()
1678 if (rdev->pm.num_power_states < 2) in radeon_pm_compute_clocks_old()
1681 mutex_lock(&rdev->pm.mutex); in radeon_pm_compute_clocks_old()
1683 rdev->pm.active_crtcs = 0; in radeon_pm_compute_clocks_old()
1684 rdev->pm.active_crtc_count = 0; in radeon_pm_compute_clocks_old()
1685 if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) { in radeon_pm_compute_clocks_old()
1690 rdev->pm.active_crtcs |= (1 << radeon_crtc->crtc_id); in radeon_pm_compute_clocks_old()
1691 rdev->pm.active_crtc_count++; in radeon_pm_compute_clocks_old()
1696 if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_pm_compute_clocks_old()
1697 radeon_pm_update_profile(rdev); in radeon_pm_compute_clocks_old()
1698 radeon_pm_set_clocks(rdev); in radeon_pm_compute_clocks_old()
1699 } else if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_pm_compute_clocks_old()
1700 if (rdev->pm.dynpm_state != DYNPM_STATE_DISABLED) { in radeon_pm_compute_clocks_old()
1701 if (rdev->pm.active_crtc_count > 1) { in radeon_pm_compute_clocks_old()
1702 if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) { in radeon_pm_compute_clocks_old()
1703 cancel_delayed_work(&rdev->pm.dynpm_idle_work); in radeon_pm_compute_clocks_old()
1705 rdev->pm.dynpm_state = DYNPM_STATE_PAUSED; in radeon_pm_compute_clocks_old()
1706 rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; in radeon_pm_compute_clocks_old()
1707 radeon_pm_get_dynpm_state(rdev); in radeon_pm_compute_clocks_old()
1708 radeon_pm_set_clocks(rdev); in radeon_pm_compute_clocks_old()
1712 } else if (rdev->pm.active_crtc_count == 1) { in radeon_pm_compute_clocks_old()
1715 if (rdev->pm.dynpm_state == DYNPM_STATE_MINIMUM) { in radeon_pm_compute_clocks_old()
1716 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; in radeon_pm_compute_clocks_old()
1717 rdev->pm.dynpm_planned_action = DYNPM_ACTION_UPCLOCK; in radeon_pm_compute_clocks_old()
1718 radeon_pm_get_dynpm_state(rdev); in radeon_pm_compute_clocks_old()
1719 radeon_pm_set_clocks(rdev); in radeon_pm_compute_clocks_old()
1721 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_pm_compute_clocks_old()
1723 } else if (rdev->pm.dynpm_state == DYNPM_STATE_PAUSED) { in radeon_pm_compute_clocks_old()
1724 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; in radeon_pm_compute_clocks_old()
1725 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_pm_compute_clocks_old()
1730 if (rdev->pm.dynpm_state != DYNPM_STATE_MINIMUM) { in radeon_pm_compute_clocks_old()
1731 cancel_delayed_work(&rdev->pm.dynpm_idle_work); in radeon_pm_compute_clocks_old()
1733 rdev->pm.dynpm_state = DYNPM_STATE_MINIMUM; in radeon_pm_compute_clocks_old()
1734 rdev->pm.dynpm_planned_action = DYNPM_ACTION_MINIMUM; in radeon_pm_compute_clocks_old()
1735 radeon_pm_get_dynpm_state(rdev); in radeon_pm_compute_clocks_old()
1736 radeon_pm_set_clocks(rdev); in radeon_pm_compute_clocks_old()
1742 mutex_unlock(&rdev->pm.mutex); in radeon_pm_compute_clocks_old()
1745 static void radeon_pm_compute_clocks_dpm(struct radeon_device *rdev) in radeon_pm_compute_clocks_dpm() argument
1747 struct drm_device *ddev = rdev->ddev; in radeon_pm_compute_clocks_dpm()
1752 if (!rdev->pm.dpm_enabled) in radeon_pm_compute_clocks_dpm()
1755 mutex_lock(&rdev->pm.mutex); in radeon_pm_compute_clocks_dpm()
1758 rdev->pm.dpm.new_active_crtcs = 0; in radeon_pm_compute_clocks_dpm()
1759 rdev->pm.dpm.new_active_crtc_count = 0; in radeon_pm_compute_clocks_dpm()
1760 rdev->pm.dpm.high_pixelclock_count = 0; in radeon_pm_compute_clocks_dpm()
1761 if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) { in radeon_pm_compute_clocks_dpm()
1766 rdev->pm.dpm.new_active_crtcs |= (1 << radeon_crtc->crtc_id); in radeon_pm_compute_clocks_dpm()
1767 rdev->pm.dpm.new_active_crtc_count++; in radeon_pm_compute_clocks_dpm()
1773 rdev->pm.dpm.high_pixelclock_count++; in radeon_pm_compute_clocks_dpm()
1780 rdev->pm.dpm.ac_power = true; in radeon_pm_compute_clocks_dpm()
1782 rdev->pm.dpm.ac_power = false; in radeon_pm_compute_clocks_dpm()
1784 radeon_dpm_change_power_state_locked(rdev); in radeon_pm_compute_clocks_dpm()
1786 mutex_unlock(&rdev->pm.mutex); in radeon_pm_compute_clocks_dpm()
1790 void radeon_pm_compute_clocks(struct radeon_device *rdev) in radeon_pm_compute_clocks() argument
1792 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_compute_clocks()
1793 radeon_pm_compute_clocks_dpm(rdev); in radeon_pm_compute_clocks()
1795 radeon_pm_compute_clocks_old(rdev); in radeon_pm_compute_clocks()
1798 static bool radeon_pm_in_vbl(struct radeon_device *rdev) in radeon_pm_in_vbl() argument
1806 for (crtc = 0; (crtc < rdev->num_crtc) && in_vbl; crtc++) { in radeon_pm_in_vbl()
1807 if (rdev->pm.active_crtcs & (1 << crtc)) { in radeon_pm_in_vbl()
1808 vbl_status = radeon_get_crtc_scanoutpos(rdev->ddev, in radeon_pm_in_vbl()
1812 &rdev->mode_info.crtcs[crtc]->base.hwmode); in radeon_pm_in_vbl()
1822 static bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish) in radeon_pm_debug_check_in_vbl() argument
1825 bool in_vbl = radeon_pm_in_vbl(rdev); in radeon_pm_debug_check_in_vbl()
1835 struct radeon_device *rdev; in radeon_dynpm_idle_work_handler() local
1837 rdev = container_of(work, struct radeon_device, in radeon_dynpm_idle_work_handler()
1840 resched = ttm_bo_lock_delayed_workqueue(&rdev->mman.bdev); in radeon_dynpm_idle_work_handler()
1841 mutex_lock(&rdev->pm.mutex); in radeon_dynpm_idle_work_handler()
1842 if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) { in radeon_dynpm_idle_work_handler()
1847 struct radeon_ring *ring = &rdev->ring[i]; in radeon_dynpm_idle_work_handler()
1850 not_processed += radeon_fence_count_emitted(rdev, i); in radeon_dynpm_idle_work_handler()
1857 if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_DOWNCLOCK) { in radeon_dynpm_idle_work_handler()
1858 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_dynpm_idle_work_handler()
1859 } else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE && in radeon_dynpm_idle_work_handler()
1860 rdev->pm.dynpm_can_upclock) { in radeon_dynpm_idle_work_handler()
1861 rdev->pm.dynpm_planned_action = in radeon_dynpm_idle_work_handler()
1863 rdev->pm.dynpm_action_timeout = jiffies + in radeon_dynpm_idle_work_handler()
1867 if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_UPCLOCK) { in radeon_dynpm_idle_work_handler()
1868 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_dynpm_idle_work_handler()
1869 } else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE && in radeon_dynpm_idle_work_handler()
1870 rdev->pm.dynpm_can_downclock) { in radeon_dynpm_idle_work_handler()
1871 rdev->pm.dynpm_planned_action = in radeon_dynpm_idle_work_handler()
1873 rdev->pm.dynpm_action_timeout = jiffies + in radeon_dynpm_idle_work_handler()
1881 if (rdev->pm.dynpm_planned_action != DYNPM_ACTION_NONE && in radeon_dynpm_idle_work_handler()
1882 jiffies > rdev->pm.dynpm_action_timeout) { in radeon_dynpm_idle_work_handler()
1883 radeon_pm_get_dynpm_state(rdev); in radeon_dynpm_idle_work_handler()
1884 radeon_pm_set_clocks(rdev); in radeon_dynpm_idle_work_handler()
1887 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_dynpm_idle_work_handler()
1890 mutex_unlock(&rdev->pm.mutex); in radeon_dynpm_idle_work_handler()
1891 ttm_bo_unlock_delayed_workqueue(&rdev->mman.bdev, resched); in radeon_dynpm_idle_work_handler()
1903 struct radeon_device *rdev = dev->dev_private; in radeon_debugfs_pm_info() local
1904 struct drm_device *ddev = rdev->ddev; in radeon_debugfs_pm_info()
1906 if ((rdev->flags & RADEON_IS_PX) && in radeon_debugfs_pm_info()
1909 } else if (rdev->pm.dpm_enabled) { in radeon_debugfs_pm_info()
1910 mutex_lock(&rdev->pm.mutex); in radeon_debugfs_pm_info()
1911 if (rdev->asic->dpm.debugfs_print_current_performance_level) in radeon_debugfs_pm_info()
1912 radeon_dpm_debugfs_print_current_performance_level(rdev, m); in radeon_debugfs_pm_info()
1915 mutex_unlock(&rdev->pm.mutex); in radeon_debugfs_pm_info()
1917 seq_printf(m, "default engine clock: %u0 kHz\n", rdev->pm.default_sclk); in radeon_debugfs_pm_info()
1919 if ((rdev->family >= CHIP_PALM) && (rdev->flags & RADEON_IS_IGP)) in radeon_debugfs_pm_info()
1920 seq_printf(m, "current engine clock: %u0 kHz\n", rdev->pm.current_sclk); in radeon_debugfs_pm_info()
1922 seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev)); in radeon_debugfs_pm_info()
1923 seq_printf(m, "default memory clock: %u0 kHz\n", rdev->pm.default_mclk); in radeon_debugfs_pm_info()
1924 if (rdev->asic->pm.get_memory_clock) in radeon_debugfs_pm_info()
1925 seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev)); in radeon_debugfs_pm_info()
1926 if (rdev->pm.current_vddc) in radeon_debugfs_pm_info()
1927 seq_printf(m, "voltage: %u mV\n", rdev->pm.current_vddc); in radeon_debugfs_pm_info()
1928 if (rdev->asic->pm.get_pcie_lanes) in radeon_debugfs_pm_info()
1929 seq_printf(m, "PCIE lanes: %d\n", radeon_get_pcie_lanes(rdev)); in radeon_debugfs_pm_info()
1940 static int radeon_debugfs_pm_init(struct radeon_device *rdev) in radeon_debugfs_pm_init() argument
1943 return radeon_debugfs_add_files(rdev, radeon_pm_info_list, ARRAY_SIZE(radeon_pm_info_list)); in radeon_debugfs_pm_init()