57 	u64 size = (u64)bo->tbo.num_pages << PAGE_SHIFT;  in radeon_update_memory_usage()
75 static void radeon_ttm_bo_destroy(struct ttm_buffer_object *tbo)  in radeon_ttm_bo_destroy()  argument
79 	bo = container_of(tbo, struct radeon_bo, tbo);  in radeon_ttm_bo_destroy()
81 	radeon_update_memory_usage(bo, bo->tbo.mem.mem_type, -1);  in radeon_ttm_bo_destroy()
88 	if (bo->tbo.base.import_attach)  in radeon_ttm_bo_destroy()
89 		drm_prime_gem_destroy(&bo->tbo.base, bo->tbo.sg);  in radeon_ttm_bo_destroy()
90 	drm_gem_object_release(&bo->tbo.base);  in radeon_ttm_bo_destroy()
212 	drm_gem_private_object_init(rdev->ddev, &bo->tbo.base, size);  in radeon_bo_create()
262 	r = ttm_bo_init(&rdev->mman.bdev, &bo->tbo, size, type,  in radeon_bo_create()
287 	r = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages, &bo->kmap);  in radeon_bo_kmap()
313 	ttm_bo_get(&bo->tbo);  in radeon_bo_ref()
319 	struct ttm_buffer_object *tbo;  in radeon_bo_unref()  local
323 	tbo = &((*bo)->tbo);  in radeon_bo_unref()
324 	ttm_bo_put(tbo);  in radeon_bo_unref()
334 	if (radeon_ttm_tt_has_userptr(bo->rdev, bo->tbo.ttm))  in radeon_bo_pin_restricted()
374 	r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);  in radeon_bo_pin_restricted()
410 	r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);  in radeon_bo_unpin()
412 		if (bo->tbo.mem.mem_type == TTM_PL_VRAM)  in radeon_bo_unpin()
445 			&bo->tbo.base, bo, (unsigned long)bo->tbo.base.size,  in radeon_bo_force_delete()
446 			*((unsigned long *)&bo->tbo.base.refcount));  in radeon_bo_force_delete()
451 		drm_gem_object_put(&bo->tbo.base);  in radeon_bo_force_delete()
556 				radeon_mem_type_to_domain(bo->tbo.mem.mem_type);  in radeon_bo_list_validate()
579 			r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);  in radeon_bo_list_validate()
613 	dma_resv_assert_held(bo->tbo.base.resv);  in radeon_bo_get_surface_reg()
645 		ttm_bo_unmap_virtual(&old_object->tbo);  in radeon_bo_get_surface_reg()
655 			       bo->tbo.mem.start << PAGE_SHIFT,  in radeon_bo_get_surface_reg()
656 			       bo->tbo.num_pages << PAGE_SHIFT);  in radeon_bo_get_surface_reg()
739 	dma_resv_assert_held(bo->tbo.base.resv);  in radeon_bo_get_tiling_flags()
751 		dma_resv_assert_held(bo->tbo.base.resv);  in radeon_bo_check_tiling()
761 	if (bo->tbo.mem.mem_type != TTM_PL_VRAM) {  in radeon_bo_check_tiling()
785 	rbo = container_of(bo, struct radeon_bo, tbo);  in radeon_bo_move_notify()
807 	rbo = container_of(bo, struct radeon_bo, tbo);  in radeon_bo_fault_reserve_notify()
851 	r = ttm_bo_reserve(&bo->tbo, true, no_wait, NULL);  in radeon_bo_wait()
855 		*mem_type = bo->tbo.mem.mem_type;  in radeon_bo_wait()
857 	r = ttm_bo_wait(&bo->tbo, true, no_wait);  in radeon_bo_wait()
858 	ttm_bo_unreserve(&bo->tbo);  in radeon_bo_wait()
873 	struct dma_resv *resv = bo->tbo.base.resv;  in radeon_bo_fence()