Lines Matching full:levels
1691 table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL = in ni_populate_smc_initial_state()
1693 table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL_2 = in ni_populate_smc_initial_state()
1695 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL = in ni_populate_smc_initial_state()
1697 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL_2 = in ni_populate_smc_initial_state()
1699 table->initialState.levels[0].mclk.vMCLK_PWRMGT_CNTL = in ni_populate_smc_initial_state()
1701 table->initialState.levels[0].mclk.vDLL_CNTL = in ni_populate_smc_initial_state()
1703 table->initialState.levels[0].mclk.vMPLL_SS = in ni_populate_smc_initial_state()
1705 table->initialState.levels[0].mclk.vMPLL_SS2 = in ni_populate_smc_initial_state()
1707 table->initialState.levels[0].mclk.mclk_value = in ni_populate_smc_initial_state()
1710 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = in ni_populate_smc_initial_state()
1712 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = in ni_populate_smc_initial_state()
1714 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = in ni_populate_smc_initial_state()
1716 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_4 = in ni_populate_smc_initial_state()
1718 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM = in ni_populate_smc_initial_state()
1720 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM_2 = in ni_populate_smc_initial_state()
1722 table->initialState.levels[0].sclk.sclk_value = in ni_populate_smc_initial_state()
1724 table->initialState.levels[0].arbRefreshState = in ni_populate_smc_initial_state()
1727 table->initialState.levels[0].ACIndex = 0; in ni_populate_smc_initial_state()
1731 &table->initialState.levels[0].vddc); in ni_populate_smc_initial_state()
1736 &table->initialState.levels[0].vddc, in ni_populate_smc_initial_state()
1740 table->initialState.levels[0].vddc.index, in ni_populate_smc_initial_state()
1741 &table->initialState.levels[0].std_vddc); in ni_populate_smc_initial_state()
1748 &table->initialState.levels[0].vddci); in ni_populate_smc_initial_state()
1750 ni_populate_initial_mvdd_value(rdev, &table->initialState.levels[0].mvdd); in ni_populate_smc_initial_state()
1753 table->initialState.levels[0].aT = cpu_to_be32(reg); in ni_populate_smc_initial_state()
1755 table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp); in ni_populate_smc_initial_state()
1758 table->initialState.levels[0].gen2PCIE = 1; in ni_populate_smc_initial_state()
1760 table->initialState.levels[0].gen2PCIE = 0; in ni_populate_smc_initial_state()
1763 table->initialState.levels[0].strobeMode = in ni_populate_smc_initial_state()
1768 … table->initialState.levels[0].mcFlags = NISLANDS_SMC_MC_EDC_RD_FLAG | NISLANDS_SMC_MC_EDC_WR_FLAG; in ni_populate_smc_initial_state()
1770 table->initialState.levels[0].mcFlags = 0; in ni_populate_smc_initial_state()
1777 table->initialState.levels[0].dpm2.MaxPS = 0; in ni_populate_smc_initial_state()
1778 table->initialState.levels[0].dpm2.NearTDPDec = 0; in ni_populate_smc_initial_state()
1779 table->initialState.levels[0].dpm2.AboveSafeInc = 0; in ni_populate_smc_initial_state()
1780 table->initialState.levels[0].dpm2.BelowSafeInc = 0; in ni_populate_smc_initial_state()
1783 table->initialState.levels[0].SQPowerThrottle = cpu_to_be32(reg); in ni_populate_smc_initial_state()
1786 table->initialState.levels[0].SQPowerThrottle_2 = cpu_to_be32(reg); in ni_populate_smc_initial_state()
1817 pi->acpi_vddc, &table->ACPIState.levels[0].vddc); in ni_populate_smc_acpi_state()
1822 &table->ACPIState.levels[0].vddc, &std_vddc); in ni_populate_smc_acpi_state()
1825 table->ACPIState.levels[0].vddc.index, in ni_populate_smc_acpi_state()
1826 &table->ACPIState.levels[0].std_vddc); in ni_populate_smc_acpi_state()
1831 table->ACPIState.levels[0].gen2PCIE = 1; in ni_populate_smc_acpi_state()
1833 table->ACPIState.levels[0].gen2PCIE = 0; in ni_populate_smc_acpi_state()
1835 table->ACPIState.levels[0].gen2PCIE = 0; in ni_populate_smc_acpi_state()
1841 &table->ACPIState.levels[0].vddc); in ni_populate_smc_acpi_state()
1846 &table->ACPIState.levels[0].vddc, in ni_populate_smc_acpi_state()
1850 table->ACPIState.levels[0].vddc.index, in ni_populate_smc_acpi_state()
1851 &table->ACPIState.levels[0].std_vddc); in ni_populate_smc_acpi_state()
1853 table->ACPIState.levels[0].gen2PCIE = 0; in ni_populate_smc_acpi_state()
1861 &table->ACPIState.levels[0].vddci); in ni_populate_smc_acpi_state()
1904 table->ACPIState.levels[0].mclk.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in ni_populate_smc_acpi_state()
1905 table->ACPIState.levels[0].mclk.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in ni_populate_smc_acpi_state()
1906 table->ACPIState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in ni_populate_smc_acpi_state()
1907 table->ACPIState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in ni_populate_smc_acpi_state()
1908 table->ACPIState.levels[0].mclk.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in ni_populate_smc_acpi_state()
1909 table->ACPIState.levels[0].mclk.vDLL_CNTL = cpu_to_be32(dll_cntl); in ni_populate_smc_acpi_state()
1911 table->ACPIState.levels[0].mclk.mclk_value = 0; in ni_populate_smc_acpi_state()
1913 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl); in ni_populate_smc_acpi_state()
1914 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2); in ni_populate_smc_acpi_state()
1915 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3); in ni_populate_smc_acpi_state()
1916 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_4 = cpu_to_be32(spll_func_cntl_4); in ni_populate_smc_acpi_state()
1918 table->ACPIState.levels[0].sclk.sclk_value = 0; in ni_populate_smc_acpi_state()
1920 ni_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); in ni_populate_smc_acpi_state()
1923 table->ACPIState.levels[0].ACIndex = 1; in ni_populate_smc_acpi_state()
1925 table->ACPIState.levels[0].dpm2.MaxPS = 0; in ni_populate_smc_acpi_state()
1926 table->ACPIState.levels[0].dpm2.NearTDPDec = 0; in ni_populate_smc_acpi_state()
1927 table->ACPIState.levels[0].dpm2.AboveSafeInc = 0; in ni_populate_smc_acpi_state()
1928 table->ACPIState.levels[0].dpm2.BelowSafeInc = 0; in ni_populate_smc_acpi_state()
1931 table->ACPIState.levels[0].SQPowerThrottle = cpu_to_be32(reg); in ni_populate_smc_acpi_state()
1934 table->ACPIState.levels[0].SQPowerThrottle_2 = cpu_to_be32(reg); in ni_populate_smc_acpi_state()
2302 smc_state->levels[i].bSP = cpu_to_be32(pi->dsp); in ni_populate_smc_sp()
2304 smc_state->levels[ps->performance_level_count - 1].bSP = in ni_populate_smc_sp()
2406 smc_state->levels[0].aT = cpu_to_be32(a_t); in ni_populate_smc_t()
2410 smc_state->levels[0].aT = cpu_to_be32(0); in ni_populate_smc_t()
2435 a_t = be32_to_cpu(smc_state->levels[i].aT) & ~CG_R_MASK; in ni_populate_smc_t()
2437 smc_state->levels[i].aT = cpu_to_be32(a_t); in ni_populate_smc_t()
2443 smc_state->levels[i + 1].aT = cpu_to_be32(a_t); in ni_populate_smc_t()
2494 smc_state->levels[0].dpm2.MaxPS = 0; in ni_populate_power_containment_values()
2495 smc_state->levels[0].dpm2.NearTDPDec = 0; in ni_populate_power_containment_values()
2496 smc_state->levels[0].dpm2.AboveSafeInc = 0; in ni_populate_power_containment_values()
2497 smc_state->levels[0].dpm2.BelowSafeInc = 0; in ni_populate_power_containment_values()
2498 smc_state->levels[0].stateFlags |= power_boost_limit ? PPSMC_STATEFLAG_POWERBOOST : 0; in ni_populate_power_containment_values()
2522 smc_state->levels[i].dpm2.MaxPS = in ni_populate_power_containment_values()
2524 smc_state->levels[i].dpm2.NearTDPDec = NISLANDS_DPM2_NEAR_TDP_DEC; in ni_populate_power_containment_values()
2525 smc_state->levels[i].dpm2.AboveSafeInc = NISLANDS_DPM2_ABOVE_SAFE_INC; in ni_populate_power_containment_values()
2526 smc_state->levels[i].dpm2.BelowSafeInc = NISLANDS_DPM2_BELOW_SAFE_INC; in ni_populate_power_containment_values()
2527 smc_state->levels[i].stateFlags |= in ni_populate_power_containment_values()
2586 smc_state->levels[i].SQPowerThrottle = cpu_to_be32(sq_power_throttle); in ni_populate_sq_ramping_values()
2587 smc_state->levels[i].SQPowerThrottle_2 = cpu_to_be32(sq_power_throttle2); in ni_populate_sq_ramping_values()
2643 &smc_state->levels[i]); in ni_convert_power_state_to_smc()
2644 smc_state->levels[i].arbRefreshState = in ni_convert_power_state_to_smc()
2651 smc_state->levels[i].displayWatermark = in ni_convert_power_state_to_smc()
2655 smc_state->levels[i].displayWatermark = (i < 2) ? in ni_convert_power_state_to_smc()
2659 smc_state->levels[i].ACIndex = NISLANDS_MCREGISTERTABLE_FIRST_DRIVERSTATE_SLOT + i; in ni_convert_power_state_to_smc()
2661 smc_state->levels[i].ACIndex = 0; in ni_convert_power_state_to_smc()
2689 size_t state_size = struct_size(smc_state, levels, in ni_upload_sw_state()