1873 	u32 running, tmp;  in ci_mc_load_microcode()  local
3183 	u32 tmp;  in cik_gpu_init()  local
3458 	uint32_t tmp = 0;  in cik_ring_test()  local
3783 	uint32_t tmp = 0;  in cik_ib_test()  local
4059 	u32 tmp;  in cik_cp_gfx_resume()  local
4197 	u32 j, tmp;  in cik_compute_stop()  local
4521 	u32 tmp;  in cik_cp_compute_resume()  local
4855 	u32 tmp;  in cik_gpu_check_soft_reset()  local
4936 	u32 tmp;  in cik_gpu_soft_reset()  local
5150 	u32 tmp, i;  in cik_gpu_pci_config_reset()  local
5284 	u32 tmp;  in cik_mc_program()  local
5340 	u32 tmp;  in cik_mc_init()  local
5506 		u32 tmp = RREG32(CHUB_CONTROL);  in cik_pcie_gart_enable()  local
5631 		u64 tmp = RREG32(MC_VM_FB_OFFSET);  in cik_vm_init()  local
5771 	u32 tmp = RREG32(CP_INT_CNTL_RING0);  in cik_enable_gui_idle_interrupt()  local
5782 	u32 tmp;  in cik_enable_lbpw()  local
5819 	u32 tmp;  in cik_update_rlc()  local
5852 	u32 tmp, i, mask;  in cik_enter_rlc_safe_mode()  local
5873 	u32 tmp;  in cik_exit_rlc_safe_mode()  local
5922 	u32 i, size, tmp;  in cik_rlc_resume()  local
6003 	u32 data, orig, tmp, tmp2;  in cik_enable_cgcg()  local
6039 	u32 data, orig, tmp = 0;  in cik_enable_mgcg()  local
6537 	u32 mask = 0, tmp, tmp1;  in cik_get_cu_active_bitmap()  local
6562 	u32 tmp = 0;  in cik_init_ao_cu_mask()  local
6867 	u32 tmp;  in cik_disable_interrupt_state()  local
7298 	u32 tmp;  in cik_irq_ack()  local
7494 	u32 wptr, tmp;  in cik_get_ih_wptr()  local
8748 	u32 tmp = 0;  in dce8_program_fmt()  local
8821 	u32 tmp, buffer_alloc, i;  in dce8_line_buffer_adjust()  local
8890 	u32 tmp = RREG32(MC_SHARED_CHMAP);  in cik_get_number_of_dram_channels()  local
9122 	u32 tmp, dmif_size = 12288;  in dce8_latency_watermark()  local
9255 	u32 tmp, wm_mask;  in dce8_program_watermarks()  local
9429 	uint32_t tmp;  in cik_set_uvd_clock()  local
9468 	u32 tmp;  in cik_set_vce_clocks()  local
9552 			u32 max_lw, current_lw, tmp;  in cik_pcie_gen3_enable()  local