Lines Matching full:avdd
80 #define NT35510_P0_SDVPCTR_AVDD 0 /* source driver output = AVDD */
112 /* AVDD and AVEE setting 3 bytes */
175 * @avdd: setting for AVDD ranging from 0x00 = 6.5V to 0x14 = 4.5V
178 u8 avdd[NT35510_P1_AVDD_LEN]; member
180 * @bt1ctr: setting for boost power control for the AVDD step-up
235 * 0 = AVDD + VDDB
236 * 1 = AVDD - AVEE
237 * 2 = AVDD - AVEE + VDDB
238 * 3 = AVDD x 2 - AVEE
255 * 1 = AVEE - AVDD
256 * 2 = AVEE + VCL - AVDD
257 * 3 = AVEE x 2 - AVDD
471 nt->conf->avdd); in nt35510_setup_power()
1032 /* 0x09: AVDD = 5.6V */
1033 .avdd = { 0x09, 0x09, 0x09 },
1042 /* 0x24: NCKA = Hsync/2, VGH = 2 x AVDD - AVEE */
1046 /* 0x24: LCKA = Hsync, VGL = AVDD + VCL - AVDD */