Lines Matching refs:i0
1068 static inline uint32_t REG_A6XX_CP_SCRATCH(uint32_t i0) { return 0x00000883 + 0x1*i0; } in REG_A6XX_CP_SCRATCH() argument
1070 static inline uint32_t REG_A6XX_CP_SCRATCH_REG(uint32_t i0) { return 0x00000883 + 0x1*i0; } in REG_A6XX_CP_SCRATCH_REG() argument
1072 static inline uint32_t REG_A6XX_CP_PROTECT(uint32_t i0) { return 0x00000850 + 0x1*i0; } in REG_A6XX_CP_PROTECT() argument
1074 static inline uint32_t REG_A6XX_CP_PROTECT_REG(uint32_t i0) { return 0x00000850 + 0x1*i0; } in REG_A6XX_CP_PROTECT_REG() argument
2622 static inline uint32_t REG_A6XX_VSC_PIPE_CONFIG(uint32_t i0) { return 0x00000c10 + 0x1*i0; } in REG_A6XX_VSC_PIPE_CONFIG() argument
2624 static inline uint32_t REG_A6XX_VSC_PIPE_CONFIG_REG(uint32_t i0) { return 0x00000c10 + 0x1*i0; } in REG_A6XX_VSC_PIPE_CONFIG_REG() argument
2670 static inline uint32_t REG_A6XX_VSC_STATE(uint32_t i0) { return 0x00000c38 + 0x1*i0; } in REG_A6XX_VSC_STATE() argument
2672 static inline uint32_t REG_A6XX_VSC_STATE_REG(uint32_t i0) { return 0x00000c38 + 0x1*i0; } in REG_A6XX_VSC_STATE_REG() argument
2674 static inline uint32_t REG_A6XX_VSC_PRIM_STRM_SIZE(uint32_t i0) { return 0x00000c58 + 0x1*i0; } in REG_A6XX_VSC_PRIM_STRM_SIZE() argument
2676 static inline uint32_t REG_A6XX_VSC_PRIM_STRM_SIZE_REG(uint32_t i0) { return 0x00000c58 + 0x1*i0; } in REG_A6XX_VSC_PRIM_STRM_SIZE_REG() argument
2678 static inline uint32_t REG_A6XX_VSC_DRAW_STRM_SIZE(uint32_t i0) { return 0x00000c78 + 0x1*i0; } in REG_A6XX_VSC_DRAW_STRM_SIZE() argument
2680 static inline uint32_t REG_A6XX_VSC_DRAW_STRM_SIZE_REG(uint32_t i0) { return 0x00000c78 + 0x1*i0; } in REG_A6XX_VSC_DRAW_STRM_SIZE_REG() argument
2766 static inline uint32_t REG_A6XX_GRAS_CL_VPORT(uint32_t i0) { return 0x00008010 + 0x6*i0; } in REG_A6XX_GRAS_CL_VPORT() argument
2768 static inline uint32_t REG_A6XX_GRAS_CL_VPORT_XOFFSET(uint32_t i0) { return 0x00008010 + 0x6*i0; } in REG_A6XX_GRAS_CL_VPORT_XOFFSET() argument
2776 static inline uint32_t REG_A6XX_GRAS_CL_VPORT_XSCALE(uint32_t i0) { return 0x00008011 + 0x6*i0; } in REG_A6XX_GRAS_CL_VPORT_XSCALE() argument
2784 static inline uint32_t REG_A6XX_GRAS_CL_VPORT_YOFFSET(uint32_t i0) { return 0x00008012 + 0x6*i0; } in REG_A6XX_GRAS_CL_VPORT_YOFFSET() argument
2792 static inline uint32_t REG_A6XX_GRAS_CL_VPORT_YSCALE(uint32_t i0) { return 0x00008013 + 0x6*i0; } in REG_A6XX_GRAS_CL_VPORT_YSCALE() argument
2800 static inline uint32_t REG_A6XX_GRAS_CL_VPORT_ZOFFSET(uint32_t i0) { return 0x00008014 + 0x6*i0; } in REG_A6XX_GRAS_CL_VPORT_ZOFFSET() argument
2808 static inline uint32_t REG_A6XX_GRAS_CL_VPORT_ZSCALE(uint32_t i0) { return 0x00008015 + 0x6*i0; } in REG_A6XX_GRAS_CL_VPORT_ZSCALE() argument
2816 static inline uint32_t REG_A6XX_GRAS_CL_Z_CLAMP(uint32_t i0) { return 0x00008070 + 0x2*i0; } in REG_A6XX_GRAS_CL_Z_CLAMP() argument
2818 static inline uint32_t REG_A6XX_GRAS_CL_Z_CLAMP_MIN(uint32_t i0) { return 0x00008070 + 0x2*i0; } in REG_A6XX_GRAS_CL_Z_CLAMP_MIN() argument
2826 static inline uint32_t REG_A6XX_GRAS_CL_Z_CLAMP_MAX(uint32_t i0) { return 0x00008071 + 0x2*i0; } in REG_A6XX_GRAS_CL_Z_CLAMP_MAX() argument
3114 static inline uint32_t REG_A6XX_GRAS_SC_SCREEN_SCISSOR(uint32_t i0) { return 0x000080b0 + 0x2*i0; } in REG_A6XX_GRAS_SC_SCREEN_SCISSOR() argument
3116 static inline uint32_t REG_A6XX_GRAS_SC_SCREEN_SCISSOR_TL(uint32_t i0) { return 0x000080b0 + 0x2*i0… in REG_A6XX_GRAS_SC_SCREEN_SCISSOR_TL() argument
3130 static inline uint32_t REG_A6XX_GRAS_SC_SCREEN_SCISSOR_BR(uint32_t i0) { return 0x000080b1 + 0x2*i0… in REG_A6XX_GRAS_SC_SCREEN_SCISSOR_BR() argument
3144 static inline uint32_t REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR(uint32_t i0) { return 0x000080d0 + 0x2*i0;… in REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR() argument
3146 …c inline uint32_t REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR_TL(uint32_t i0) { return 0x000080d0 + 0x2*i0; } in REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR_TL() argument
3160 …c inline uint32_t REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR_BR(uint32_t i0) { return 0x000080d1 + 0x2*i0; } in REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR_BR() argument
3793 static inline uint32_t REG_A6XX_RB_MRT(uint32_t i0) { return 0x00008820 + 0x8*i0; } in REG_A6XX_RB_MRT() argument
3795 static inline uint32_t REG_A6XX_RB_MRT_CONTROL(uint32_t i0) { return 0x00008820 + 0x8*i0; } in REG_A6XX_RB_MRT_CONTROL() argument
3812 static inline uint32_t REG_A6XX_RB_MRT_BLEND_CONTROL(uint32_t i0) { return 0x00008821 + 0x8*i0; } in REG_A6XX_RB_MRT_BLEND_CONTROL() argument
3850 static inline uint32_t REG_A6XX_RB_MRT_BUF_INFO(uint32_t i0) { return 0x00008822 + 0x8*i0; } in REG_A6XX_RB_MRT_BUF_INFO() argument
3876 static inline uint32_t REG_A6XX_RB_MRT_PITCH(uint32_t i0) { return 0x00008823 + 0x8*i0; } in REG_A6XX_RB_MRT_PITCH() argument
3884 static inline uint32_t REG_A6XX_RB_MRT_ARRAY_PITCH(uint32_t i0) { return 0x00008824 + 0x8*i0; } in REG_A6XX_RB_MRT_ARRAY_PITCH() argument
3892 static inline uint32_t REG_A6XX_RB_MRT_BASE_LO(uint32_t i0) { return 0x00008825 + 0x8*i0; } in REG_A6XX_RB_MRT_BASE_LO() argument
3894 static inline uint32_t REG_A6XX_RB_MRT_BASE_HI(uint32_t i0) { return 0x00008826 + 0x8*i0; } in REG_A6XX_RB_MRT_BASE_HI() argument
3896 static inline uint32_t REG_A6XX_RB_MRT_BASE(uint32_t i0) { return 0x00008825 + 0x8*i0; } in REG_A6XX_RB_MRT_BASE() argument
3904 static inline uint32_t REG_A6XX_RB_MRT_BASE_GMEM(uint32_t i0) { return 0x00008827 + 0x8*i0; } in REG_A6XX_RB_MRT_BASE_GMEM() argument
4494 static inline uint32_t REG_A6XX_RB_MRT_FLAG_BUFFER(uint32_t i0) { return 0x00008903 + 0x3*i0; } in REG_A6XX_RB_MRT_FLAG_BUFFER() argument
4496 …ic inline uint32_t REG_A6XX_RB_MRT_FLAG_BUFFER_ADDR_LO(uint32_t i0) { return 0x00008903 + 0x3*i0; } in REG_A6XX_RB_MRT_FLAG_BUFFER_ADDR_LO() argument
4498 …ic inline uint32_t REG_A6XX_RB_MRT_FLAG_BUFFER_ADDR_HI(uint32_t i0) { return 0x00008904 + 0x3*i0; } in REG_A6XX_RB_MRT_FLAG_BUFFER_ADDR_HI() argument
4500 static inline uint32_t REG_A6XX_RB_MRT_FLAG_BUFFER_ADDR(uint32_t i0) { return 0x00008903 + 0x3*i0; } in REG_A6XX_RB_MRT_FLAG_BUFFER_ADDR() argument
4508 static inline uint32_t REG_A6XX_RB_MRT_FLAG_BUFFER_PITCH(uint32_t i0) { return 0x00008905 + 0x3*i0;… in REG_A6XX_RB_MRT_FLAG_BUFFER_PITCH() argument
4907 static inline uint32_t REG_A6XX_VPC_VARYING_INTERP(uint32_t i0) { return 0x00009200 + 0x1*i0; } in REG_A6XX_VPC_VARYING_INTERP() argument
4909 static inline uint32_t REG_A6XX_VPC_VARYING_INTERP_MODE(uint32_t i0) { return 0x00009200 + 0x1*i0; } in REG_A6XX_VPC_VARYING_INTERP_MODE() argument
4911 static inline uint32_t REG_A6XX_VPC_VARYING_PS_REPL(uint32_t i0) { return 0x00009208 + 0x1*i0; } in REG_A6XX_VPC_VARYING_PS_REPL() argument
4913 static inline uint32_t REG_A6XX_VPC_VARYING_PS_REPL_MODE(uint32_t i0) { return 0x00009208 + 0x1*i0;… in REG_A6XX_VPC_VARYING_PS_REPL_MODE() argument
4919 static inline uint32_t REG_A6XX_VPC_VAR(uint32_t i0) { return 0x00009212 + 0x1*i0; } in REG_A6XX_VPC_VAR() argument
4921 static inline uint32_t REG_A6XX_VPC_VAR_DISABLE(uint32_t i0) { return 0x00009212 + 0x1*i0; } in REG_A6XX_VPC_VAR_DISABLE() argument
4972 static inline uint32_t REG_A6XX_VPC_SO(uint32_t i0) { return 0x0000921a + 0x7*i0; } in REG_A6XX_VPC_SO() argument
4974 static inline uint32_t REG_A6XX_VPC_SO_BUFFER_BASE(uint32_t i0) { return 0x0000921a + 0x7*i0; } in REG_A6XX_VPC_SO_BUFFER_BASE() argument
4982 static inline uint32_t REG_A6XX_VPC_SO_BUFFER_BASE_LO(uint32_t i0) { return 0x0000921a + 0x7*i0; } in REG_A6XX_VPC_SO_BUFFER_BASE_LO() argument
4984 static inline uint32_t REG_A6XX_VPC_SO_BUFFER_BASE_HI(uint32_t i0) { return 0x0000921b + 0x7*i0; } in REG_A6XX_VPC_SO_BUFFER_BASE_HI() argument
4986 static inline uint32_t REG_A6XX_VPC_SO_BUFFER_SIZE(uint32_t i0) { return 0x0000921c + 0x7*i0; } in REG_A6XX_VPC_SO_BUFFER_SIZE() argument
4994 static inline uint32_t REG_A6XX_VPC_SO_NCOMP(uint32_t i0) { return 0x0000921d + 0x7*i0; } in REG_A6XX_VPC_SO_NCOMP() argument
4996 static inline uint32_t REG_A6XX_VPC_SO_BUFFER_OFFSET(uint32_t i0) { return 0x0000921e + 0x7*i0; } in REG_A6XX_VPC_SO_BUFFER_OFFSET() argument
5004 static inline uint32_t REG_A6XX_VPC_SO_FLUSH_BASE(uint32_t i0) { return 0x0000921f + 0x7*i0; } in REG_A6XX_VPC_SO_FLUSH_BASE() argument
5012 static inline uint32_t REG_A6XX_VPC_SO_FLUSH_BASE_LO(uint32_t i0) { return 0x0000921f + 0x7*i0; } in REG_A6XX_VPC_SO_FLUSH_BASE_LO() argument
5014 static inline uint32_t REG_A6XX_VPC_SO_FLUSH_BASE_HI(uint32_t i0) { return 0x00009220 + 0x7*i0; } in REG_A6XX_VPC_SO_FLUSH_BASE_HI() argument
5512 static inline uint32_t REG_A6XX_VFD_FETCH(uint32_t i0) { return 0x0000a010 + 0x4*i0; } in REG_A6XX_VFD_FETCH() argument
5514 static inline uint32_t REG_A6XX_VFD_FETCH_BASE(uint32_t i0) { return 0x0000a010 + 0x4*i0; } in REG_A6XX_VFD_FETCH_BASE() argument
5516 static inline uint32_t REG_A6XX_VFD_FETCH_BASE_LO(uint32_t i0) { return 0x0000a010 + 0x4*i0; } in REG_A6XX_VFD_FETCH_BASE_LO() argument
5518 static inline uint32_t REG_A6XX_VFD_FETCH_BASE_HI(uint32_t i0) { return 0x0000a011 + 0x4*i0; } in REG_A6XX_VFD_FETCH_BASE_HI() argument
5520 static inline uint32_t REG_A6XX_VFD_FETCH_SIZE(uint32_t i0) { return 0x0000a012 + 0x4*i0; } in REG_A6XX_VFD_FETCH_SIZE() argument
5522 static inline uint32_t REG_A6XX_VFD_FETCH_STRIDE(uint32_t i0) { return 0x0000a013 + 0x4*i0; } in REG_A6XX_VFD_FETCH_STRIDE() argument
5524 static inline uint32_t REG_A6XX_VFD_DECODE(uint32_t i0) { return 0x0000a090 + 0x2*i0; } in REG_A6XX_VFD_DECODE() argument
5526 static inline uint32_t REG_A6XX_VFD_DECODE_INSTR(uint32_t i0) { return 0x0000a090 + 0x2*i0; } in REG_A6XX_VFD_DECODE_INSTR() argument
5555 static inline uint32_t REG_A6XX_VFD_DECODE_STEP_RATE(uint32_t i0) { return 0x0000a091 + 0x2*i0; } in REG_A6XX_VFD_DECODE_STEP_RATE() argument
5557 static inline uint32_t REG_A6XX_VFD_DEST_CNTL(uint32_t i0) { return 0x0000a0d0 + 0x1*i0; } in REG_A6XX_VFD_DEST_CNTL() argument
5559 static inline uint32_t REG_A6XX_VFD_DEST_CNTL_INSTR(uint32_t i0) { return 0x0000a0d0 + 0x1*i0; } in REG_A6XX_VFD_DEST_CNTL_INSTR() argument
5615 static inline uint32_t REG_A6XX_SP_VS_OUT(uint32_t i0) { return 0x0000a803 + 0x1*i0; } in REG_A6XX_SP_VS_OUT() argument
5617 static inline uint32_t REG_A6XX_SP_VS_OUT_REG(uint32_t i0) { return 0x0000a803 + 0x1*i0; } in REG_A6XX_SP_VS_OUT_REG() argument
5643 static inline uint32_t REG_A6XX_SP_VS_VPC_DST(uint32_t i0) { return 0x0000a813 + 0x1*i0; } in REG_A6XX_SP_VS_VPC_DST() argument
5645 static inline uint32_t REG_A6XX_SP_VS_VPC_DST_REG(uint32_t i0) { return 0x0000a813 + 0x1*i0; } in REG_A6XX_SP_VS_VPC_DST_REG() argument
5811 static inline uint32_t REG_A6XX_SP_DS_OUT(uint32_t i0) { return 0x0000a843 + 0x1*i0; } in REG_A6XX_SP_DS_OUT() argument
5813 static inline uint32_t REG_A6XX_SP_DS_OUT_REG(uint32_t i0) { return 0x0000a843 + 0x1*i0; } in REG_A6XX_SP_DS_OUT_REG() argument
5839 static inline uint32_t REG_A6XX_SP_DS_VPC_DST(uint32_t i0) { return 0x0000a853 + 0x1*i0; } in REG_A6XX_SP_DS_VPC_DST() argument
5841 static inline uint32_t REG_A6XX_SP_DS_VPC_DST_REG(uint32_t i0) { return 0x0000a853 + 0x1*i0; } in REG_A6XX_SP_DS_VPC_DST_REG() argument
5950 static inline uint32_t REG_A6XX_SP_GS_OUT(uint32_t i0) { return 0x0000a874 + 0x1*i0; } in REG_A6XX_SP_GS_OUT() argument
5952 static inline uint32_t REG_A6XX_SP_GS_OUT_REG(uint32_t i0) { return 0x0000a874 + 0x1*i0; } in REG_A6XX_SP_GS_OUT_REG() argument
5978 static inline uint32_t REG_A6XX_SP_GS_VPC_DST(uint32_t i0) { return 0x0000a884 + 0x1*i0; } in REG_A6XX_SP_GS_VPC_DST() argument
5980 static inline uint32_t REG_A6XX_SP_GS_VPC_DST_REG(uint32_t i0) { return 0x0000a884 + 0x1*i0; } in REG_A6XX_SP_GS_VPC_DST_REG() argument
6204 static inline uint32_t REG_A6XX_SP_FS_MRT(uint32_t i0) { return 0x0000a996 + 0x1*i0; } in REG_A6XX_SP_FS_MRT() argument
6206 static inline uint32_t REG_A6XX_SP_FS_MRT_REG(uint32_t i0) { return 0x0000a996 + 0x1*i0; } in REG_A6XX_SP_FS_MRT_REG() argument
6231 static inline uint32_t REG_A6XX_SP_FS_PREFETCH(uint32_t i0) { return 0x0000a99f + 0x1*i0; } in REG_A6XX_SP_FS_PREFETCH() argument
6233 static inline uint32_t REG_A6XX_SP_FS_PREFETCH_CMD(uint32_t i0) { return 0x0000a99f + 0x1*i0; } in REG_A6XX_SP_FS_PREFETCH_CMD() argument
6272 static inline uint32_t REG_A6XX_SP_FS_BINDLESS_PREFETCH(uint32_t i0) { return 0x0000a9a3 + 0x1*i0; } in REG_A6XX_SP_FS_BINDLESS_PREFETCH() argument
6274 …c inline uint32_t REG_A6XX_SP_FS_BINDLESS_PREFETCH_CMD(uint32_t i0) { return 0x0000a9a3 + 0x1*i0; } in REG_A6XX_SP_FS_BINDLESS_PREFETCH_CMD() argument
6320 static inline uint32_t REG_A6XX_SP_CS_BINDLESS_BASE(uint32_t i0) { return 0x0000a9e8 + 0x2*i0; } in REG_A6XX_SP_CS_BINDLESS_BASE() argument
6322 static inline uint32_t REG_A6XX_SP_CS_BINDLESS_BASE_ADDR(uint32_t i0) { return 0x0000a9e8 + 0x2*i0;… in REG_A6XX_SP_CS_BINDLESS_BASE_ADDR() argument
6324 static inline uint32_t REG_A6XX_SP_FS_OUTPUT(uint32_t i0) { return 0x0000a98e + 0x1*i0; } in REG_A6XX_SP_FS_OUTPUT() argument
6326 static inline uint32_t REG_A6XX_SP_FS_OUTPUT_REG(uint32_t i0) { return 0x0000a98e + 0x1*i0; } in REG_A6XX_SP_FS_OUTPUT_REG() argument
6431 static inline uint32_t REG_A6XX_SP_BINDLESS_BASE(uint32_t i0) { return 0x0000ab10 + 0x2*i0; } in REG_A6XX_SP_BINDLESS_BASE() argument
6433 static inline uint32_t REG_A6XX_SP_BINDLESS_BASE_ADDR(uint32_t i0) { return 0x0000ab10 + 0x2*i0; } in REG_A6XX_SP_BINDLESS_BASE_ADDR() argument
6935 static inline uint32_t REG_A6XX_HLSQ_CS_BINDLESS_BASE(uint32_t i0) { return 0x0000b9c0 + 0x2*i0; } in REG_A6XX_HLSQ_CS_BINDLESS_BASE() argument
6937 …ic inline uint32_t REG_A6XX_HLSQ_CS_BINDLESS_BASE_ADDR(uint32_t i0) { return 0x0000b9c0 + 0x2*i0; } in REG_A6XX_HLSQ_CS_BINDLESS_BASE_ADDR() argument
7005 static inline uint32_t REG_A6XX_HLSQ_BINDLESS_BASE(uint32_t i0) { return 0x0000bb20 + 0x2*i0; } in REG_A6XX_HLSQ_BINDLESS_BASE() argument
7007 static inline uint32_t REG_A6XX_HLSQ_BINDLESS_BASE_ADDR(uint32_t i0) { return 0x0000bb20 + 0x2*i0; } in REG_A6XX_HLSQ_BINDLESS_BASE_ADDR() argument