1042 static inline uint32_t A5XX_CP_PROTECT_REG_BASE_ADDR(uint32_t val)  in A5XX_CP_PROTECT_REG_BASE_ADDR()  argument
1044 	return ((val) << A5XX_CP_PROTECT_REG_BASE_ADDR__SHIFT) & A5XX_CP_PROTECT_REG_BASE_ADDR__MASK;  in A5XX_CP_PROTECT_REG_BASE_ADDR()
1048 static inline uint32_t A5XX_CP_PROTECT_REG_MASK_LEN(uint32_t val)  in A5XX_CP_PROTECT_REG_MASK_LEN()  argument
1050 	return ((val) << A5XX_CP_PROTECT_REG_MASK_LEN__SHIFT) & A5XX_CP_PROTECT_REG_MASK_LEN__MASK;  in A5XX_CP_PROTECT_REG_MASK_LEN()
1054 static inline uint32_t A5XX_CP_PROTECT_REG_TRAP_WRITE(uint32_t val)  in A5XX_CP_PROTECT_REG_TRAP_WRITE()  argument
1056 	return ((val) << A5XX_CP_PROTECT_REG_TRAP_WRITE__SHIFT) & A5XX_CP_PROTECT_REG_TRAP_WRITE__MASK;  in A5XX_CP_PROTECT_REG_TRAP_WRITE()
1060 static inline uint32_t A5XX_CP_PROTECT_REG_TRAP_READ(uint32_t val)  in A5XX_CP_PROTECT_REG_TRAP_READ()  argument
1062 	return ((val) << A5XX_CP_PROTECT_REG_TRAP_READ__SHIFT) & A5XX_CP_PROTECT_REG_TRAP_READ__MASK;  in A5XX_CP_PROTECT_REG_TRAP_READ()
1837 static inline uint32_t A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB(uint32_t val)  in A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB()  argument
1839 …return ((val) << A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB__SHIFT) & A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB__MA…  in A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB()
1843 static inline uint32_t A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB_CP(uint32_t val)  in A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB_CP()  argument
1845 …return ((val) << A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB_CP__SHIFT) & A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB_…  in A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB_CP()
1849 static inline uint32_t A5XX_RBBM_STATUS_HLSQ_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_HLSQ_BUSY()  argument
1851 	return ((val) << A5XX_RBBM_STATUS_HLSQ_BUSY__SHIFT) & A5XX_RBBM_STATUS_HLSQ_BUSY__MASK;  in A5XX_RBBM_STATUS_HLSQ_BUSY()
1855 static inline uint32_t A5XX_RBBM_STATUS_VSC_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_VSC_BUSY()  argument
1857 	return ((val) << A5XX_RBBM_STATUS_VSC_BUSY__SHIFT) & A5XX_RBBM_STATUS_VSC_BUSY__MASK;  in A5XX_RBBM_STATUS_VSC_BUSY()
1861 static inline uint32_t A5XX_RBBM_STATUS_TPL1_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_TPL1_BUSY()  argument
1863 	return ((val) << A5XX_RBBM_STATUS_TPL1_BUSY__SHIFT) & A5XX_RBBM_STATUS_TPL1_BUSY__MASK;  in A5XX_RBBM_STATUS_TPL1_BUSY()
1867 static inline uint32_t A5XX_RBBM_STATUS_SP_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_SP_BUSY()  argument
1869 	return ((val) << A5XX_RBBM_STATUS_SP_BUSY__SHIFT) & A5XX_RBBM_STATUS_SP_BUSY__MASK;  in A5XX_RBBM_STATUS_SP_BUSY()
1873 static inline uint32_t A5XX_RBBM_STATUS_UCHE_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_UCHE_BUSY()  argument
1875 	return ((val) << A5XX_RBBM_STATUS_UCHE_BUSY__SHIFT) & A5XX_RBBM_STATUS_UCHE_BUSY__MASK;  in A5XX_RBBM_STATUS_UCHE_BUSY()
1879 static inline uint32_t A5XX_RBBM_STATUS_VPC_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_VPC_BUSY()  argument
1881 	return ((val) << A5XX_RBBM_STATUS_VPC_BUSY__SHIFT) & A5XX_RBBM_STATUS_VPC_BUSY__MASK;  in A5XX_RBBM_STATUS_VPC_BUSY()
1885 static inline uint32_t A5XX_RBBM_STATUS_VFDP_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_VFDP_BUSY()  argument
1887 	return ((val) << A5XX_RBBM_STATUS_VFDP_BUSY__SHIFT) & A5XX_RBBM_STATUS_VFDP_BUSY__MASK;  in A5XX_RBBM_STATUS_VFDP_BUSY()
1891 static inline uint32_t A5XX_RBBM_STATUS_VFD_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_VFD_BUSY()  argument
1893 	return ((val) << A5XX_RBBM_STATUS_VFD_BUSY__SHIFT) & A5XX_RBBM_STATUS_VFD_BUSY__MASK;  in A5XX_RBBM_STATUS_VFD_BUSY()
1897 static inline uint32_t A5XX_RBBM_STATUS_TESS_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_TESS_BUSY()  argument
1899 	return ((val) << A5XX_RBBM_STATUS_TESS_BUSY__SHIFT) & A5XX_RBBM_STATUS_TESS_BUSY__MASK;  in A5XX_RBBM_STATUS_TESS_BUSY()
1903 static inline uint32_t A5XX_RBBM_STATUS_PC_VSD_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_PC_VSD_BUSY()  argument
1905 	return ((val) << A5XX_RBBM_STATUS_PC_VSD_BUSY__SHIFT) & A5XX_RBBM_STATUS_PC_VSD_BUSY__MASK;  in A5XX_RBBM_STATUS_PC_VSD_BUSY()
1909 static inline uint32_t A5XX_RBBM_STATUS_PC_DCALL_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_PC_DCALL_BUSY()  argument
1911 	return ((val) << A5XX_RBBM_STATUS_PC_DCALL_BUSY__SHIFT) & A5XX_RBBM_STATUS_PC_DCALL_BUSY__MASK;  in A5XX_RBBM_STATUS_PC_DCALL_BUSY()
1915 static inline uint32_t A5XX_RBBM_STATUS_GPMU_SLAVE_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_GPMU_SLAVE_BUSY()  argument
1917 	return ((val) << A5XX_RBBM_STATUS_GPMU_SLAVE_BUSY__SHIFT) & A5XX_RBBM_STATUS_GPMU_SLAVE_BUSY__MASK;  in A5XX_RBBM_STATUS_GPMU_SLAVE_BUSY()
1921 static inline uint32_t A5XX_RBBM_STATUS_DCOM_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_DCOM_BUSY()  argument
1923 	return ((val) << A5XX_RBBM_STATUS_DCOM_BUSY__SHIFT) & A5XX_RBBM_STATUS_DCOM_BUSY__MASK;  in A5XX_RBBM_STATUS_DCOM_BUSY()
1927 static inline uint32_t A5XX_RBBM_STATUS_COM_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_COM_BUSY()  argument
1929 	return ((val) << A5XX_RBBM_STATUS_COM_BUSY__SHIFT) & A5XX_RBBM_STATUS_COM_BUSY__MASK;  in A5XX_RBBM_STATUS_COM_BUSY()
1933 static inline uint32_t A5XX_RBBM_STATUS_LRZ_BUZY(uint32_t val)  in A5XX_RBBM_STATUS_LRZ_BUZY()  argument
1935 	return ((val) << A5XX_RBBM_STATUS_LRZ_BUZY__SHIFT) & A5XX_RBBM_STATUS_LRZ_BUZY__MASK;  in A5XX_RBBM_STATUS_LRZ_BUZY()
1939 static inline uint32_t A5XX_RBBM_STATUS_A2D_DSP_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_A2D_DSP_BUSY()  argument
1941 	return ((val) << A5XX_RBBM_STATUS_A2D_DSP_BUSY__SHIFT) & A5XX_RBBM_STATUS_A2D_DSP_BUSY__MASK;  in A5XX_RBBM_STATUS_A2D_DSP_BUSY()
1945 static inline uint32_t A5XX_RBBM_STATUS_CCUFCHE_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_CCUFCHE_BUSY()  argument
1947 	return ((val) << A5XX_RBBM_STATUS_CCUFCHE_BUSY__SHIFT) & A5XX_RBBM_STATUS_CCUFCHE_BUSY__MASK;  in A5XX_RBBM_STATUS_CCUFCHE_BUSY()
1951 static inline uint32_t A5XX_RBBM_STATUS_RB_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_RB_BUSY()  argument
1953 	return ((val) << A5XX_RBBM_STATUS_RB_BUSY__SHIFT) & A5XX_RBBM_STATUS_RB_BUSY__MASK;  in A5XX_RBBM_STATUS_RB_BUSY()
1957 static inline uint32_t A5XX_RBBM_STATUS_RAS_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_RAS_BUSY()  argument
1959 	return ((val) << A5XX_RBBM_STATUS_RAS_BUSY__SHIFT) & A5XX_RBBM_STATUS_RAS_BUSY__MASK;  in A5XX_RBBM_STATUS_RAS_BUSY()
1963 static inline uint32_t A5XX_RBBM_STATUS_TSE_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_TSE_BUSY()  argument
1965 	return ((val) << A5XX_RBBM_STATUS_TSE_BUSY__SHIFT) & A5XX_RBBM_STATUS_TSE_BUSY__MASK;  in A5XX_RBBM_STATUS_TSE_BUSY()
1969 static inline uint32_t A5XX_RBBM_STATUS_VBIF_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_VBIF_BUSY()  argument
1971 	return ((val) << A5XX_RBBM_STATUS_VBIF_BUSY__SHIFT) & A5XX_RBBM_STATUS_VBIF_BUSY__MASK;  in A5XX_RBBM_STATUS_VBIF_BUSY()
1975 static inline uint32_t A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB_HYST(uint32_t val)  in A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB_HYST()  argument
1977 …return ((val) << A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB_HYST__SHIFT) & A5XX_RBBM_STATUS_GPU_BUSY_IGN_AH…  in A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB_HYST()
1981 static inline uint32_t A5XX_RBBM_STATUS_CP_BUSY_IGN_HYST(uint32_t val)  in A5XX_RBBM_STATUS_CP_BUSY_IGN_HYST()  argument
1983 …return ((val) << A5XX_RBBM_STATUS_CP_BUSY_IGN_HYST__SHIFT) & A5XX_RBBM_STATUS_CP_BUSY_IGN_HYST__MA…  in A5XX_RBBM_STATUS_CP_BUSY_IGN_HYST()
1987 static inline uint32_t A5XX_RBBM_STATUS_CP_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_CP_BUSY()  argument
1989 	return ((val) << A5XX_RBBM_STATUS_CP_BUSY__SHIFT) & A5XX_RBBM_STATUS_CP_BUSY__MASK;  in A5XX_RBBM_STATUS_CP_BUSY()
1993 static inline uint32_t A5XX_RBBM_STATUS_GPMU_MASTER_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_GPMU_MASTER_BUSY()  argument
1995 …return ((val) << A5XX_RBBM_STATUS_GPMU_MASTER_BUSY__SHIFT) & A5XX_RBBM_STATUS_GPMU_MASTER_BUSY__MA…  in A5XX_RBBM_STATUS_GPMU_MASTER_BUSY()
1999 static inline uint32_t A5XX_RBBM_STATUS_CP_CRASH_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_CP_CRASH_BUSY()  argument
2001 	return ((val) << A5XX_RBBM_STATUS_CP_CRASH_BUSY__SHIFT) & A5XX_RBBM_STATUS_CP_CRASH_BUSY__MASK;  in A5XX_RBBM_STATUS_CP_CRASH_BUSY()
2005 static inline uint32_t A5XX_RBBM_STATUS_CP_ETS_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_CP_ETS_BUSY()  argument
2007 	return ((val) << A5XX_RBBM_STATUS_CP_ETS_BUSY__SHIFT) & A5XX_RBBM_STATUS_CP_ETS_BUSY__MASK;  in A5XX_RBBM_STATUS_CP_ETS_BUSY()
2011 static inline uint32_t A5XX_RBBM_STATUS_CP_PFP_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_CP_PFP_BUSY()  argument
2013 	return ((val) << A5XX_RBBM_STATUS_CP_PFP_BUSY__SHIFT) & A5XX_RBBM_STATUS_CP_PFP_BUSY__MASK;  in A5XX_RBBM_STATUS_CP_PFP_BUSY()
2017 static inline uint32_t A5XX_RBBM_STATUS_CP_ME_BUSY(uint32_t val)  in A5XX_RBBM_STATUS_CP_ME_BUSY()  argument
2019 	return ((val) << A5XX_RBBM_STATUS_CP_ME_BUSY__SHIFT) & A5XX_RBBM_STATUS_CP_ME_BUSY__MASK;  in A5XX_RBBM_STATUS_CP_ME_BUSY()
2112 static inline uint32_t A5XX_VSC_BIN_SIZE_WIDTH(uint32_t val)  in A5XX_VSC_BIN_SIZE_WIDTH()  argument
2114 	return ((val >> 5) << A5XX_VSC_BIN_SIZE_WIDTH__SHIFT) & A5XX_VSC_BIN_SIZE_WIDTH__MASK;  in A5XX_VSC_BIN_SIZE_WIDTH()
2118 static inline uint32_t A5XX_VSC_BIN_SIZE_HEIGHT(uint32_t val)  in A5XX_VSC_BIN_SIZE_HEIGHT()  argument
2120 	return ((val >> 5) << A5XX_VSC_BIN_SIZE_HEIGHT__SHIFT) & A5XX_VSC_BIN_SIZE_HEIGHT__MASK;  in A5XX_VSC_BIN_SIZE_HEIGHT()
2136 static inline uint32_t A5XX_VSC_PIPE_CONFIG_REG_X(uint32_t val)  in A5XX_VSC_PIPE_CONFIG_REG_X()  argument
2138 	return ((val) << A5XX_VSC_PIPE_CONFIG_REG_X__SHIFT) & A5XX_VSC_PIPE_CONFIG_REG_X__MASK;  in A5XX_VSC_PIPE_CONFIG_REG_X()
2142 static inline uint32_t A5XX_VSC_PIPE_CONFIG_REG_Y(uint32_t val)  in A5XX_VSC_PIPE_CONFIG_REG_Y()  argument
2144 	return ((val) << A5XX_VSC_PIPE_CONFIG_REG_Y__SHIFT) & A5XX_VSC_PIPE_CONFIG_REG_Y__MASK;  in A5XX_VSC_PIPE_CONFIG_REG_Y()
2148 static inline uint32_t A5XX_VSC_PIPE_CONFIG_REG_W(uint32_t val)  in A5XX_VSC_PIPE_CONFIG_REG_W()  argument
2150 	return ((val) << A5XX_VSC_PIPE_CONFIG_REG_W__SHIFT) & A5XX_VSC_PIPE_CONFIG_REG_W__MASK;  in A5XX_VSC_PIPE_CONFIG_REG_W()
2154 static inline uint32_t A5XX_VSC_PIPE_CONFIG_REG_H(uint32_t val)  in A5XX_VSC_PIPE_CONFIG_REG_H()  argument
2156 	return ((val) << A5XX_VSC_PIPE_CONFIG_REG_H__SHIFT) & A5XX_VSC_PIPE_CONFIG_REG_H__MASK;  in A5XX_VSC_PIPE_CONFIG_REG_H()
2177 static inline uint32_t A5XX_VSC_RESOLVE_CNTL_X(uint32_t val)  in A5XX_VSC_RESOLVE_CNTL_X()  argument
2179 	return ((val) << A5XX_VSC_RESOLVE_CNTL_X__SHIFT) & A5XX_VSC_RESOLVE_CNTL_X__MASK;  in A5XX_VSC_RESOLVE_CNTL_X()
2183 static inline uint32_t A5XX_VSC_RESOLVE_CNTL_Y(uint32_t val)  in A5XX_VSC_RESOLVE_CNTL_Y()  argument
2185 	return ((val) << A5XX_VSC_RESOLVE_CNTL_Y__SHIFT) & A5XX_VSC_RESOLVE_CNTL_Y__MASK;  in A5XX_VSC_RESOLVE_CNTL_Y()
2820 static inline uint32_t A5XX_GRAS_CNTL_COORD_MASK(uint32_t val)  in A5XX_GRAS_CNTL_COORD_MASK()  argument
2822 	return ((val) << A5XX_GRAS_CNTL_COORD_MASK__SHIFT) & A5XX_GRAS_CNTL_COORD_MASK__MASK;  in A5XX_GRAS_CNTL_COORD_MASK()
2828 static inline uint32_t A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ(uint32_t val)  in A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ()  argument
2830 …return ((val) << A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ__SHIFT) & A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HO…  in A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ()
2834 static inline uint32_t A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT(uint32_t val)  in A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT()  argument
2836 …return ((val) << A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT__SHIFT) & A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VE…  in A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT()
2842 static inline uint32_t A5XX_GRAS_CL_VPORT_XOFFSET_0(float val)  in A5XX_GRAS_CL_VPORT_XOFFSET_0()  argument
2844 	return ((fui(val)) << A5XX_GRAS_CL_VPORT_XOFFSET_0__SHIFT) & A5XX_GRAS_CL_VPORT_XOFFSET_0__MASK;  in A5XX_GRAS_CL_VPORT_XOFFSET_0()
2850 static inline uint32_t A5XX_GRAS_CL_VPORT_XSCALE_0(float val)  in A5XX_GRAS_CL_VPORT_XSCALE_0()  argument
2852 	return ((fui(val)) << A5XX_GRAS_CL_VPORT_XSCALE_0__SHIFT) & A5XX_GRAS_CL_VPORT_XSCALE_0__MASK;  in A5XX_GRAS_CL_VPORT_XSCALE_0()
2858 static inline uint32_t A5XX_GRAS_CL_VPORT_YOFFSET_0(float val)  in A5XX_GRAS_CL_VPORT_YOFFSET_0()  argument
2860 	return ((fui(val)) << A5XX_GRAS_CL_VPORT_YOFFSET_0__SHIFT) & A5XX_GRAS_CL_VPORT_YOFFSET_0__MASK;  in A5XX_GRAS_CL_VPORT_YOFFSET_0()
2866 static inline uint32_t A5XX_GRAS_CL_VPORT_YSCALE_0(float val)  in A5XX_GRAS_CL_VPORT_YSCALE_0()  argument
2868 	return ((fui(val)) << A5XX_GRAS_CL_VPORT_YSCALE_0__SHIFT) & A5XX_GRAS_CL_VPORT_YSCALE_0__MASK;  in A5XX_GRAS_CL_VPORT_YSCALE_0()
2874 static inline uint32_t A5XX_GRAS_CL_VPORT_ZOFFSET_0(float val)  in A5XX_GRAS_CL_VPORT_ZOFFSET_0()  argument
2876 	return ((fui(val)) << A5XX_GRAS_CL_VPORT_ZOFFSET_0__SHIFT) & A5XX_GRAS_CL_VPORT_ZOFFSET_0__MASK;  in A5XX_GRAS_CL_VPORT_ZOFFSET_0()
2882 static inline uint32_t A5XX_GRAS_CL_VPORT_ZSCALE_0(float val)  in A5XX_GRAS_CL_VPORT_ZSCALE_0()  argument
2884 	return ((fui(val)) << A5XX_GRAS_CL_VPORT_ZSCALE_0__SHIFT) & A5XX_GRAS_CL_VPORT_ZSCALE_0__MASK;  in A5XX_GRAS_CL_VPORT_ZSCALE_0()
2893 static inline uint32_t A5XX_GRAS_SU_CNTL_LINEHALFWIDTH(float val)  in A5XX_GRAS_SU_CNTL_LINEHALFWIDTH()  argument
2895 …return ((((int32_t)(val * 4.0))) << A5XX_GRAS_SU_CNTL_LINEHALFWIDTH__SHIFT) & A5XX_GRAS_SU_CNTL_LI…  in A5XX_GRAS_SU_CNTL_LINEHALFWIDTH()
2903 static inline uint32_t A5XX_GRAS_SU_POINT_MINMAX_MIN(float val)  in A5XX_GRAS_SU_POINT_MINMAX_MIN()  argument
2905 …return ((((uint32_t)(val * 16.0))) << A5XX_GRAS_SU_POINT_MINMAX_MIN__SHIFT) & A5XX_GRAS_SU_POINT_M…  in A5XX_GRAS_SU_POINT_MINMAX_MIN()
2909 static inline uint32_t A5XX_GRAS_SU_POINT_MINMAX_MAX(float val)  in A5XX_GRAS_SU_POINT_MINMAX_MAX()  argument
2911 …return ((((uint32_t)(val * 16.0))) << A5XX_GRAS_SU_POINT_MINMAX_MAX__SHIFT) & A5XX_GRAS_SU_POINT_M…  in A5XX_GRAS_SU_POINT_MINMAX_MAX()
2917 static inline uint32_t A5XX_GRAS_SU_POINT_SIZE(float val)  in A5XX_GRAS_SU_POINT_SIZE()  argument
2919 …return ((((int32_t)(val * 16.0))) << A5XX_GRAS_SU_POINT_SIZE__SHIFT) & A5XX_GRAS_SU_POINT_SIZE__MA…  in A5XX_GRAS_SU_POINT_SIZE()
2931 static inline uint32_t A5XX_GRAS_SU_POLY_OFFSET_SCALE(float val)  in A5XX_GRAS_SU_POLY_OFFSET_SCALE()  argument
2933 …return ((fui(val)) << A5XX_GRAS_SU_POLY_OFFSET_SCALE__SHIFT) & A5XX_GRAS_SU_POLY_OFFSET_SCALE__MAS…  in A5XX_GRAS_SU_POLY_OFFSET_SCALE()
2939 static inline uint32_t A5XX_GRAS_SU_POLY_OFFSET_OFFSET(float val)  in A5XX_GRAS_SU_POLY_OFFSET_OFFSET()  argument
2941 …return ((fui(val)) << A5XX_GRAS_SU_POLY_OFFSET_OFFSET__SHIFT) & A5XX_GRAS_SU_POLY_OFFSET_OFFSET__M…  in A5XX_GRAS_SU_POLY_OFFSET_OFFSET()
2947 static inline uint32_t A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP(float val)  in A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP()  argument
2949 …return ((fui(val)) << A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP__SHIFT) & A5XX_GRAS_SU_POLY_OFFSET_OFF…  in A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP()
2955 static inline uint32_t A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT(enum a5xx_depth_format val)  in A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT()  argument
2957 …return ((val) << A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT__SHIFT) & A5XX_GRAS_SU_DEPTH_BUFFER_I…  in A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT()
2971 static inline uint32_t A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val)  in A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES()  argument
2973 …return ((val) << A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES__…  in A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES()
2979 static inline uint32_t A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val)  in A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES()  argument
2981 …return ((val) << A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES…  in A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES()
2991 static inline uint32_t A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X(uint32_t val)  in A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X()  argument
2993 …return ((val) << A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X__SHIFT) & A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X__…  in A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X()
2997 static inline uint32_t A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y(uint32_t val)  in A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y()  argument
2999 …return ((val) << A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y__SHIFT) & A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y__…  in A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y()
3006 static inline uint32_t A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X(uint32_t val)  in A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X()  argument
3008 …return ((val) << A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X__SHIFT) & A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X__…  in A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X()
3012 static inline uint32_t A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y(uint32_t val)  in A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y()  argument
3014 …return ((val) << A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y__SHIFT) & A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y__…  in A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y()
3021 static inline uint32_t A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X(uint32_t val)  in A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X()  argument
3023 …return ((val) << A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X__SHIFT) & A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0…  in A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X()
3027 static inline uint32_t A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y(uint32_t val)  in A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y()  argument
3029 …return ((val) << A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y__SHIFT) & A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0…  in A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y()
3036 static inline uint32_t A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X(uint32_t val)  in A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X()  argument
3038 …return ((val) << A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X__SHIFT) & A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0…  in A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X()
3042 static inline uint32_t A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y(uint32_t val)  in A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y()  argument
3044 …return ((val) << A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y__SHIFT) & A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0…  in A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y()
3051 static inline uint32_t A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X(uint32_t val)  in A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X()  argument
3053 	return ((val) << A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X__SHIFT) & A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X__MASK;  in A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X()
3057 static inline uint32_t A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y(uint32_t val)  in A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y()  argument
3059 	return ((val) << A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__SHIFT) & A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__MASK;  in A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y()
3066 static inline uint32_t A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X(uint32_t val)  in A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X()  argument
3068 	return ((val) << A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X__SHIFT) & A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X__MASK;  in A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X()
3072 static inline uint32_t A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y(uint32_t val)  in A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y()  argument
3074 	return ((val) << A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__SHIFT) & A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__MASK;  in A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y()
3089 static inline uint32_t A5XX_GRAS_LRZ_BUFFER_PITCH(uint32_t val)  in A5XX_GRAS_LRZ_BUFFER_PITCH()  argument
3091 	return ((val >> 5) << A5XX_GRAS_LRZ_BUFFER_PITCH__SHIFT) & A5XX_GRAS_LRZ_BUFFER_PITCH__MASK;  in A5XX_GRAS_LRZ_BUFFER_PITCH()
3101 static inline uint32_t A5XX_RB_CNTL_WIDTH(uint32_t val)  in A5XX_RB_CNTL_WIDTH()  argument
3103 	return ((val >> 5) << A5XX_RB_CNTL_WIDTH__SHIFT) & A5XX_RB_CNTL_WIDTH__MASK;  in A5XX_RB_CNTL_WIDTH()
3107 static inline uint32_t A5XX_RB_CNTL_HEIGHT(uint32_t val)  in A5XX_RB_CNTL_HEIGHT()  argument
3109 	return ((val >> 5) << A5XX_RB_CNTL_HEIGHT__SHIFT) & A5XX_RB_CNTL_HEIGHT__MASK;  in A5XX_RB_CNTL_HEIGHT()
3121 static inline uint32_t A5XX_RB_RENDER_CNTL_FLAG_MRTS(uint32_t val)  in A5XX_RB_RENDER_CNTL_FLAG_MRTS()  argument
3123 	return ((val) << A5XX_RB_RENDER_CNTL_FLAG_MRTS__SHIFT) & A5XX_RB_RENDER_CNTL_FLAG_MRTS__MASK;  in A5XX_RB_RENDER_CNTL_FLAG_MRTS()
3127 static inline uint32_t A5XX_RB_RENDER_CNTL_FLAG_MRTS2(uint32_t val)  in A5XX_RB_RENDER_CNTL_FLAG_MRTS2()  argument
3129 	return ((val) << A5XX_RB_RENDER_CNTL_FLAG_MRTS2__SHIFT) & A5XX_RB_RENDER_CNTL_FLAG_MRTS2__MASK;  in A5XX_RB_RENDER_CNTL_FLAG_MRTS2()
3135 static inline uint32_t A5XX_RB_RAS_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val)  in A5XX_RB_RAS_MSAA_CNTL_SAMPLES()  argument
3137 	return ((val) << A5XX_RB_RAS_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_RB_RAS_MSAA_CNTL_SAMPLES__MASK;  in A5XX_RB_RAS_MSAA_CNTL_SAMPLES()
3143 static inline uint32_t A5XX_RB_DEST_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val)  in A5XX_RB_DEST_MSAA_CNTL_SAMPLES()  argument
3145 	return ((val) << A5XX_RB_DEST_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_RB_DEST_MSAA_CNTL_SAMPLES__MASK;  in A5XX_RB_DEST_MSAA_CNTL_SAMPLES()
3156 static inline uint32_t A5XX_RB_RENDER_CONTROL0_COORD_MASK(uint32_t val)  in A5XX_RB_RENDER_CONTROL0_COORD_MASK()  argument
3158 …return ((val) << A5XX_RB_RENDER_CONTROL0_COORD_MASK__SHIFT) & A5XX_RB_RENDER_CONTROL0_COORD_MASK__…  in A5XX_RB_RENDER_CONTROL0_COORD_MASK()
3169 static inline uint32_t A5XX_RB_FS_OUTPUT_CNTL_MRT(uint32_t val)  in A5XX_RB_FS_OUTPUT_CNTL_MRT()  argument
3171 	return ((val) << A5XX_RB_FS_OUTPUT_CNTL_MRT__SHIFT) & A5XX_RB_FS_OUTPUT_CNTL_MRT__MASK;  in A5XX_RB_FS_OUTPUT_CNTL_MRT()
3178 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT0(uint32_t val)  in A5XX_RB_RENDER_COMPONENTS_RT0()  argument
3180 	return ((val) << A5XX_RB_RENDER_COMPONENTS_RT0__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT0__MASK;  in A5XX_RB_RENDER_COMPONENTS_RT0()
3184 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT1(uint32_t val)  in A5XX_RB_RENDER_COMPONENTS_RT1()  argument
3186 	return ((val) << A5XX_RB_RENDER_COMPONENTS_RT1__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT1__MASK;  in A5XX_RB_RENDER_COMPONENTS_RT1()
3190 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT2(uint32_t val)  in A5XX_RB_RENDER_COMPONENTS_RT2()  argument
3192 	return ((val) << A5XX_RB_RENDER_COMPONENTS_RT2__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT2__MASK;  in A5XX_RB_RENDER_COMPONENTS_RT2()
3196 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT3(uint32_t val)  in A5XX_RB_RENDER_COMPONENTS_RT3()  argument
3198 	return ((val) << A5XX_RB_RENDER_COMPONENTS_RT3__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT3__MASK;  in A5XX_RB_RENDER_COMPONENTS_RT3()
3202 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT4(uint32_t val)  in A5XX_RB_RENDER_COMPONENTS_RT4()  argument
3204 	return ((val) << A5XX_RB_RENDER_COMPONENTS_RT4__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT4__MASK;  in A5XX_RB_RENDER_COMPONENTS_RT4()
3208 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT5(uint32_t val)  in A5XX_RB_RENDER_COMPONENTS_RT5()  argument
3210 	return ((val) << A5XX_RB_RENDER_COMPONENTS_RT5__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT5__MASK;  in A5XX_RB_RENDER_COMPONENTS_RT5()
3214 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT6(uint32_t val)  in A5XX_RB_RENDER_COMPONENTS_RT6()  argument
3216 	return ((val) << A5XX_RB_RENDER_COMPONENTS_RT6__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT6__MASK;  in A5XX_RB_RENDER_COMPONENTS_RT6()
3220 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT7(uint32_t val)  in A5XX_RB_RENDER_COMPONENTS_RT7()  argument
3222 	return ((val) << A5XX_RB_RENDER_COMPONENTS_RT7__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT7__MASK;  in A5XX_RB_RENDER_COMPONENTS_RT7()
3233 static inline uint32_t A5XX_RB_MRT_CONTROL_ROP_CODE(enum a3xx_rop_code val)  in A5XX_RB_MRT_CONTROL_ROP_CODE()  argument
3235 	return ((val) << A5XX_RB_MRT_CONTROL_ROP_CODE__SHIFT) & A5XX_RB_MRT_CONTROL_ROP_CODE__MASK;  in A5XX_RB_MRT_CONTROL_ROP_CODE()
3239 static inline uint32_t A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE(uint32_t val)  in A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE()  argument
3241 …return ((val) << A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE__SHIFT) & A5XX_RB_MRT_CONTROL_COMPONENT_ENAB…  in A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE()
3247 static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(enum adreno_rb_blend_factor val)  in A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR()  argument
3249 …return ((val) << A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_RGB_…  in A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR()
3253 static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(enum a3xx_rb_blend_opcode val)  in A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE()  argument
3255 …return ((val) << A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_RG…  in A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE()
3259 static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(enum adreno_rb_blend_factor val)  in A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR()  argument
3261 …return ((val) << A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_RGB…  in A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR()
3265 static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(enum adreno_rb_blend_factor val)  in A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR()  argument
3267 …return ((val) << A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_AL…  in A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR()
3271 static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(enum a3xx_rb_blend_opcode val)  in A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE()  argument
3273 …return ((val) << A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_…  in A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE()
3277 static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(enum adreno_rb_blend_factor val)  in A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR()  argument
3279 …return ((val) << A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_A…  in A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR()
3285 static inline uint32_t A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT(enum a5xx_color_fmt val)  in A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT()  argument
3287 …return ((val) << A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT__SHIFT) & A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT__MA…  in A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT()
3291 static inline uint32_t A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(enum a5xx_tile_mode val)  in A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE()  argument
3293 …return ((val) << A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__SHIFT) & A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MO…  in A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE()
3297 static inline uint32_t A5XX_RB_MRT_BUF_INFO_DITHER_MODE(enum adreno_rb_dither_mode val)  in A5XX_RB_MRT_BUF_INFO_DITHER_MODE()  argument
3299 	return ((val) << A5XX_RB_MRT_BUF_INFO_DITHER_MODE__SHIFT) & A5XX_RB_MRT_BUF_INFO_DITHER_MODE__MASK;  in A5XX_RB_MRT_BUF_INFO_DITHER_MODE()
3303 static inline uint32_t A5XX_RB_MRT_BUF_INFO_COLOR_SWAP(enum a3xx_color_swap val)  in A5XX_RB_MRT_BUF_INFO_COLOR_SWAP()  argument
3305 	return ((val) << A5XX_RB_MRT_BUF_INFO_COLOR_SWAP__SHIFT) & A5XX_RB_MRT_BUF_INFO_COLOR_SWAP__MASK;  in A5XX_RB_MRT_BUF_INFO_COLOR_SWAP()
3312 static inline uint32_t A5XX_RB_MRT_PITCH(uint32_t val)  in A5XX_RB_MRT_PITCH()  argument
3314 	return ((val >> 6) << A5XX_RB_MRT_PITCH__SHIFT) & A5XX_RB_MRT_PITCH__MASK;  in A5XX_RB_MRT_PITCH()
3320 static inline uint32_t A5XX_RB_MRT_ARRAY_PITCH(uint32_t val)  in A5XX_RB_MRT_ARRAY_PITCH()  argument
3322 	return ((val >> 6) << A5XX_RB_MRT_ARRAY_PITCH__SHIFT) & A5XX_RB_MRT_ARRAY_PITCH__MASK;  in A5XX_RB_MRT_ARRAY_PITCH()
3332 static inline uint32_t A5XX_RB_BLEND_RED_UINT(uint32_t val)  in A5XX_RB_BLEND_RED_UINT()  argument
3334 	return ((val) << A5XX_RB_BLEND_RED_UINT__SHIFT) & A5XX_RB_BLEND_RED_UINT__MASK;  in A5XX_RB_BLEND_RED_UINT()
3338 static inline uint32_t A5XX_RB_BLEND_RED_SINT(uint32_t val)  in A5XX_RB_BLEND_RED_SINT()  argument
3340 	return ((val) << A5XX_RB_BLEND_RED_SINT__SHIFT) & A5XX_RB_BLEND_RED_SINT__MASK;  in A5XX_RB_BLEND_RED_SINT()
3344 static inline uint32_t A5XX_RB_BLEND_RED_FLOAT(float val)  in A5XX_RB_BLEND_RED_FLOAT()  argument
3346 …return ((util_float_to_half(val)) << A5XX_RB_BLEND_RED_FLOAT__SHIFT) & A5XX_RB_BLEND_RED_FLOAT__MA…  in A5XX_RB_BLEND_RED_FLOAT()
3352 static inline uint32_t A5XX_RB_BLEND_RED_F32(float val)  in A5XX_RB_BLEND_RED_F32()  argument
3354 	return ((fui(val)) << A5XX_RB_BLEND_RED_F32__SHIFT) & A5XX_RB_BLEND_RED_F32__MASK;  in A5XX_RB_BLEND_RED_F32()
3360 static inline uint32_t A5XX_RB_BLEND_GREEN_UINT(uint32_t val)  in A5XX_RB_BLEND_GREEN_UINT()  argument
3362 	return ((val) << A5XX_RB_BLEND_GREEN_UINT__SHIFT) & A5XX_RB_BLEND_GREEN_UINT__MASK;  in A5XX_RB_BLEND_GREEN_UINT()
3366 static inline uint32_t A5XX_RB_BLEND_GREEN_SINT(uint32_t val)  in A5XX_RB_BLEND_GREEN_SINT()  argument
3368 	return ((val) << A5XX_RB_BLEND_GREEN_SINT__SHIFT) & A5XX_RB_BLEND_GREEN_SINT__MASK;  in A5XX_RB_BLEND_GREEN_SINT()
3372 static inline uint32_t A5XX_RB_BLEND_GREEN_FLOAT(float val)  in A5XX_RB_BLEND_GREEN_FLOAT()  argument
3374 …return ((util_float_to_half(val)) << A5XX_RB_BLEND_GREEN_FLOAT__SHIFT) & A5XX_RB_BLEND_GREEN_FLOAT…  in A5XX_RB_BLEND_GREEN_FLOAT()
3380 static inline uint32_t A5XX_RB_BLEND_GREEN_F32(float val)  in A5XX_RB_BLEND_GREEN_F32()  argument
3382 	return ((fui(val)) << A5XX_RB_BLEND_GREEN_F32__SHIFT) & A5XX_RB_BLEND_GREEN_F32__MASK;  in A5XX_RB_BLEND_GREEN_F32()
3388 static inline uint32_t A5XX_RB_BLEND_BLUE_UINT(uint32_t val)  in A5XX_RB_BLEND_BLUE_UINT()  argument
3390 	return ((val) << A5XX_RB_BLEND_BLUE_UINT__SHIFT) & A5XX_RB_BLEND_BLUE_UINT__MASK;  in A5XX_RB_BLEND_BLUE_UINT()
3394 static inline uint32_t A5XX_RB_BLEND_BLUE_SINT(uint32_t val)  in A5XX_RB_BLEND_BLUE_SINT()  argument
3396 	return ((val) << A5XX_RB_BLEND_BLUE_SINT__SHIFT) & A5XX_RB_BLEND_BLUE_SINT__MASK;  in A5XX_RB_BLEND_BLUE_SINT()
3400 static inline uint32_t A5XX_RB_BLEND_BLUE_FLOAT(float val)  in A5XX_RB_BLEND_BLUE_FLOAT()  argument
3402 …return ((util_float_to_half(val)) << A5XX_RB_BLEND_BLUE_FLOAT__SHIFT) & A5XX_RB_BLEND_BLUE_FLOAT__…  in A5XX_RB_BLEND_BLUE_FLOAT()
3408 static inline uint32_t A5XX_RB_BLEND_BLUE_F32(float val)  in A5XX_RB_BLEND_BLUE_F32()  argument
3410 	return ((fui(val)) << A5XX_RB_BLEND_BLUE_F32__SHIFT) & A5XX_RB_BLEND_BLUE_F32__MASK;  in A5XX_RB_BLEND_BLUE_F32()
3416 static inline uint32_t A5XX_RB_BLEND_ALPHA_UINT(uint32_t val)  in A5XX_RB_BLEND_ALPHA_UINT()  argument
3418 	return ((val) << A5XX_RB_BLEND_ALPHA_UINT__SHIFT) & A5XX_RB_BLEND_ALPHA_UINT__MASK;  in A5XX_RB_BLEND_ALPHA_UINT()
3422 static inline uint32_t A5XX_RB_BLEND_ALPHA_SINT(uint32_t val)  in A5XX_RB_BLEND_ALPHA_SINT()  argument
3424 	return ((val) << A5XX_RB_BLEND_ALPHA_SINT__SHIFT) & A5XX_RB_BLEND_ALPHA_SINT__MASK;  in A5XX_RB_BLEND_ALPHA_SINT()
3428 static inline uint32_t A5XX_RB_BLEND_ALPHA_FLOAT(float val)  in A5XX_RB_BLEND_ALPHA_FLOAT()  argument
3430 …return ((util_float_to_half(val)) << A5XX_RB_BLEND_ALPHA_FLOAT__SHIFT) & A5XX_RB_BLEND_ALPHA_FLOAT…  in A5XX_RB_BLEND_ALPHA_FLOAT()
3436 static inline uint32_t A5XX_RB_BLEND_ALPHA_F32(float val)  in A5XX_RB_BLEND_ALPHA_F32()  argument
3438 	return ((fui(val)) << A5XX_RB_BLEND_ALPHA_F32__SHIFT) & A5XX_RB_BLEND_ALPHA_F32__MASK;  in A5XX_RB_BLEND_ALPHA_F32()
3444 static inline uint32_t A5XX_RB_ALPHA_CONTROL_ALPHA_REF(uint32_t val)  in A5XX_RB_ALPHA_CONTROL_ALPHA_REF()  argument
3446 	return ((val) << A5XX_RB_ALPHA_CONTROL_ALPHA_REF__SHIFT) & A5XX_RB_ALPHA_CONTROL_ALPHA_REF__MASK;  in A5XX_RB_ALPHA_CONTROL_ALPHA_REF()
3451 static inline uint32_t A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(enum adreno_compare_func val)  in A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC()  argument
3453 …return ((val) << A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC__SHIFT) & A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_…  in A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC()
3459 static inline uint32_t A5XX_RB_BLEND_CNTL_ENABLE_BLEND(uint32_t val)  in A5XX_RB_BLEND_CNTL_ENABLE_BLEND()  argument
3461 	return ((val) << A5XX_RB_BLEND_CNTL_ENABLE_BLEND__SHIFT) & A5XX_RB_BLEND_CNTL_ENABLE_BLEND__MASK;  in A5XX_RB_BLEND_CNTL_ENABLE_BLEND()
3467 static inline uint32_t A5XX_RB_BLEND_CNTL_SAMPLE_MASK(uint32_t val)  in A5XX_RB_BLEND_CNTL_SAMPLE_MASK()  argument
3469 	return ((val) << A5XX_RB_BLEND_CNTL_SAMPLE_MASK__SHIFT) & A5XX_RB_BLEND_CNTL_SAMPLE_MASK__MASK;  in A5XX_RB_BLEND_CNTL_SAMPLE_MASK()
3481 static inline uint32_t A5XX_RB_DEPTH_CNTL_ZFUNC(enum adreno_compare_func val)  in A5XX_RB_DEPTH_CNTL_ZFUNC()  argument
3483 	return ((val) << A5XX_RB_DEPTH_CNTL_ZFUNC__SHIFT) & A5XX_RB_DEPTH_CNTL_ZFUNC__MASK;  in A5XX_RB_DEPTH_CNTL_ZFUNC()
3490 static inline uint32_t A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT(enum a5xx_depth_format val)  in A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT()  argument
3492 …return ((val) << A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT__SHIFT) & A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_…  in A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT()
3502 static inline uint32_t A5XX_RB_DEPTH_BUFFER_PITCH(uint32_t val)  in A5XX_RB_DEPTH_BUFFER_PITCH()  argument
3504 	return ((val >> 6) << A5XX_RB_DEPTH_BUFFER_PITCH__SHIFT) & A5XX_RB_DEPTH_BUFFER_PITCH__MASK;  in A5XX_RB_DEPTH_BUFFER_PITCH()
3510 static inline uint32_t A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH(uint32_t val)  in A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH()  argument
3512 …return ((val >> 6) << A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH__SHIFT) & A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH_…  in A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH()
3521 static inline uint32_t A5XX_RB_STENCIL_CONTROL_FUNC(enum adreno_compare_func val)  in A5XX_RB_STENCIL_CONTROL_FUNC()  argument
3523 	return ((val) << A5XX_RB_STENCIL_CONTROL_FUNC__SHIFT) & A5XX_RB_STENCIL_CONTROL_FUNC__MASK;  in A5XX_RB_STENCIL_CONTROL_FUNC()
3527 static inline uint32_t A5XX_RB_STENCIL_CONTROL_FAIL(enum adreno_stencil_op val)  in A5XX_RB_STENCIL_CONTROL_FAIL()  argument
3529 	return ((val) << A5XX_RB_STENCIL_CONTROL_FAIL__SHIFT) & A5XX_RB_STENCIL_CONTROL_FAIL__MASK;  in A5XX_RB_STENCIL_CONTROL_FAIL()
3533 static inline uint32_t A5XX_RB_STENCIL_CONTROL_ZPASS(enum adreno_stencil_op val)  in A5XX_RB_STENCIL_CONTROL_ZPASS()  argument
3535 	return ((val) << A5XX_RB_STENCIL_CONTROL_ZPASS__SHIFT) & A5XX_RB_STENCIL_CONTROL_ZPASS__MASK;  in A5XX_RB_STENCIL_CONTROL_ZPASS()
3539 static inline uint32_t A5XX_RB_STENCIL_CONTROL_ZFAIL(enum adreno_stencil_op val)  in A5XX_RB_STENCIL_CONTROL_ZFAIL()  argument
3541 	return ((val) << A5XX_RB_STENCIL_CONTROL_ZFAIL__SHIFT) & A5XX_RB_STENCIL_CONTROL_ZFAIL__MASK;  in A5XX_RB_STENCIL_CONTROL_ZFAIL()
3545 static inline uint32_t A5XX_RB_STENCIL_CONTROL_FUNC_BF(enum adreno_compare_func val)  in A5XX_RB_STENCIL_CONTROL_FUNC_BF()  argument
3547 	return ((val) << A5XX_RB_STENCIL_CONTROL_FUNC_BF__SHIFT) & A5XX_RB_STENCIL_CONTROL_FUNC_BF__MASK;  in A5XX_RB_STENCIL_CONTROL_FUNC_BF()
3551 static inline uint32_t A5XX_RB_STENCIL_CONTROL_FAIL_BF(enum adreno_stencil_op val)  in A5XX_RB_STENCIL_CONTROL_FAIL_BF()  argument
3553 	return ((val) << A5XX_RB_STENCIL_CONTROL_FAIL_BF__SHIFT) & A5XX_RB_STENCIL_CONTROL_FAIL_BF__MASK;  in A5XX_RB_STENCIL_CONTROL_FAIL_BF()
3557 static inline uint32_t A5XX_RB_STENCIL_CONTROL_ZPASS_BF(enum adreno_stencil_op val)  in A5XX_RB_STENCIL_CONTROL_ZPASS_BF()  argument
3559 	return ((val) << A5XX_RB_STENCIL_CONTROL_ZPASS_BF__SHIFT) & A5XX_RB_STENCIL_CONTROL_ZPASS_BF__MASK;  in A5XX_RB_STENCIL_CONTROL_ZPASS_BF()
3563 static inline uint32_t A5XX_RB_STENCIL_CONTROL_ZFAIL_BF(enum adreno_stencil_op val)  in A5XX_RB_STENCIL_CONTROL_ZFAIL_BF()  argument
3565 	return ((val) << A5XX_RB_STENCIL_CONTROL_ZFAIL_BF__SHIFT) & A5XX_RB_STENCIL_CONTROL_ZFAIL_BF__MASK;  in A5XX_RB_STENCIL_CONTROL_ZFAIL_BF()
3578 static inline uint32_t A5XX_RB_STENCIL_PITCH(uint32_t val)  in A5XX_RB_STENCIL_PITCH()  argument
3580 	return ((val >> 6) << A5XX_RB_STENCIL_PITCH__SHIFT) & A5XX_RB_STENCIL_PITCH__MASK;  in A5XX_RB_STENCIL_PITCH()
3586 static inline uint32_t A5XX_RB_STENCIL_ARRAY_PITCH(uint32_t val)  in A5XX_RB_STENCIL_ARRAY_PITCH()  argument
3588 	return ((val >> 6) << A5XX_RB_STENCIL_ARRAY_PITCH__SHIFT) & A5XX_RB_STENCIL_ARRAY_PITCH__MASK;  in A5XX_RB_STENCIL_ARRAY_PITCH()
3594 static inline uint32_t A5XX_RB_STENCILREFMASK_STENCILREF(uint32_t val)  in A5XX_RB_STENCILREFMASK_STENCILREF()  argument
3596 …return ((val) << A5XX_RB_STENCILREFMASK_STENCILREF__SHIFT) & A5XX_RB_STENCILREFMASK_STENCILREF__MA…  in A5XX_RB_STENCILREFMASK_STENCILREF()
3600 static inline uint32_t A5XX_RB_STENCILREFMASK_STENCILMASK(uint32_t val)  in A5XX_RB_STENCILREFMASK_STENCILMASK()  argument
3602 …return ((val) << A5XX_RB_STENCILREFMASK_STENCILMASK__SHIFT) & A5XX_RB_STENCILREFMASK_STENCILMASK__…  in A5XX_RB_STENCILREFMASK_STENCILMASK()
3606 static inline uint32_t A5XX_RB_STENCILREFMASK_STENCILWRITEMASK(uint32_t val)  in A5XX_RB_STENCILREFMASK_STENCILWRITEMASK()  argument
3608 …return ((val) << A5XX_RB_STENCILREFMASK_STENCILWRITEMASK__SHIFT) & A5XX_RB_STENCILREFMASK_STENCILW…  in A5XX_RB_STENCILREFMASK_STENCILWRITEMASK()
3614 static inline uint32_t A5XX_RB_STENCILREFMASK_BF_STENCILREF(uint32_t val)  in A5XX_RB_STENCILREFMASK_BF_STENCILREF()  argument
3616 …return ((val) << A5XX_RB_STENCILREFMASK_BF_STENCILREF__SHIFT) & A5XX_RB_STENCILREFMASK_BF_STENCILR…  in A5XX_RB_STENCILREFMASK_BF_STENCILREF()
3620 static inline uint32_t A5XX_RB_STENCILREFMASK_BF_STENCILMASK(uint32_t val)  in A5XX_RB_STENCILREFMASK_BF_STENCILMASK()  argument
3622 …return ((val) << A5XX_RB_STENCILREFMASK_BF_STENCILMASK__SHIFT) & A5XX_RB_STENCILREFMASK_BF_STENCIL…  in A5XX_RB_STENCILREFMASK_BF_STENCILMASK()
3626 static inline uint32_t A5XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(uint32_t val)  in A5XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK()  argument
3628 …return ((val) << A5XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__SHIFT) & A5XX_RB_STENCILREFMASK_BF_ST…  in A5XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK()
3635 static inline uint32_t A5XX_RB_WINDOW_OFFSET_X(uint32_t val)  in A5XX_RB_WINDOW_OFFSET_X()  argument
3637 	return ((val) << A5XX_RB_WINDOW_OFFSET_X__SHIFT) & A5XX_RB_WINDOW_OFFSET_X__MASK;  in A5XX_RB_WINDOW_OFFSET_X()
3641 static inline uint32_t A5XX_RB_WINDOW_OFFSET_Y(uint32_t val)  in A5XX_RB_WINDOW_OFFSET_Y()  argument
3643 	return ((val) << A5XX_RB_WINDOW_OFFSET_Y__SHIFT) & A5XX_RB_WINDOW_OFFSET_Y__MASK;  in A5XX_RB_WINDOW_OFFSET_Y()
3652 static inline uint32_t A5XX_RB_BLIT_CNTL_BUF(enum a5xx_blit_buf val)  in A5XX_RB_BLIT_CNTL_BUF()  argument
3654 	return ((val) << A5XX_RB_BLIT_CNTL_BUF__SHIFT) & A5XX_RB_BLIT_CNTL_BUF__MASK;  in A5XX_RB_BLIT_CNTL_BUF()
3661 static inline uint32_t A5XX_RB_RESOLVE_CNTL_1_X(uint32_t val)  in A5XX_RB_RESOLVE_CNTL_1_X()  argument
3663 	return ((val) << A5XX_RB_RESOLVE_CNTL_1_X__SHIFT) & A5XX_RB_RESOLVE_CNTL_1_X__MASK;  in A5XX_RB_RESOLVE_CNTL_1_X()
3667 static inline uint32_t A5XX_RB_RESOLVE_CNTL_1_Y(uint32_t val)  in A5XX_RB_RESOLVE_CNTL_1_Y()  argument
3669 	return ((val) << A5XX_RB_RESOLVE_CNTL_1_Y__SHIFT) & A5XX_RB_RESOLVE_CNTL_1_Y__MASK;  in A5XX_RB_RESOLVE_CNTL_1_Y()
3676 static inline uint32_t A5XX_RB_RESOLVE_CNTL_2_X(uint32_t val)  in A5XX_RB_RESOLVE_CNTL_2_X()  argument
3678 	return ((val) << A5XX_RB_RESOLVE_CNTL_2_X__SHIFT) & A5XX_RB_RESOLVE_CNTL_2_X__MASK;  in A5XX_RB_RESOLVE_CNTL_2_X()
3682 static inline uint32_t A5XX_RB_RESOLVE_CNTL_2_Y(uint32_t val)  in A5XX_RB_RESOLVE_CNTL_2_Y()  argument
3684 	return ((val) << A5XX_RB_RESOLVE_CNTL_2_Y__SHIFT) & A5XX_RB_RESOLVE_CNTL_2_Y__MASK;  in A5XX_RB_RESOLVE_CNTL_2_Y()
3697 static inline uint32_t A5XX_RB_BLIT_DST_PITCH(uint32_t val)  in A5XX_RB_BLIT_DST_PITCH()  argument
3699 	return ((val >> 6) << A5XX_RB_BLIT_DST_PITCH__SHIFT) & A5XX_RB_BLIT_DST_PITCH__MASK;  in A5XX_RB_BLIT_DST_PITCH()
3705 static inline uint32_t A5XX_RB_BLIT_DST_ARRAY_PITCH(uint32_t val)  in A5XX_RB_BLIT_DST_ARRAY_PITCH()  argument
3707 	return ((val >> 6) << A5XX_RB_BLIT_DST_ARRAY_PITCH__SHIFT) & A5XX_RB_BLIT_DST_ARRAY_PITCH__MASK;  in A5XX_RB_BLIT_DST_ARRAY_PITCH()
3723 static inline uint32_t A5XX_RB_CLEAR_CNTL_MASK(uint32_t val)  in A5XX_RB_CLEAR_CNTL_MASK()  argument
3725 	return ((val) << A5XX_RB_CLEAR_CNTL_MASK__SHIFT) & A5XX_RB_CLEAR_CNTL_MASK__MASK;  in A5XX_RB_CLEAR_CNTL_MASK()
3743 static inline uint32_t A5XX_RB_MRT_FLAG_BUFFER_PITCH(uint32_t val)  in A5XX_RB_MRT_FLAG_BUFFER_PITCH()  argument
3745 	return ((val >> 6) << A5XX_RB_MRT_FLAG_BUFFER_PITCH__SHIFT) & A5XX_RB_MRT_FLAG_BUFFER_PITCH__MASK;  in A5XX_RB_MRT_FLAG_BUFFER_PITCH()
3751 static inline uint32_t A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH(uint32_t val)  in A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH()  argument
3753 …return ((val >> 6) << A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH__SHIFT) & A5XX_RB_MRT_FLAG_BUFFER_ARRAY_…  in A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH()
3763 static inline uint32_t A5XX_RB_BLIT_FLAG_DST_PITCH(uint32_t val)  in A5XX_RB_BLIT_FLAG_DST_PITCH()  argument
3765 	return ((val >> 6) << A5XX_RB_BLIT_FLAG_DST_PITCH__SHIFT) & A5XX_RB_BLIT_FLAG_DST_PITCH__MASK;  in A5XX_RB_BLIT_FLAG_DST_PITCH()
3771 static inline uint32_t A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH(uint32_t val)  in A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH()  argument
3773 …return ((val >> 6) << A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH__SHIFT) & A5XX_RB_BLIT_FLAG_DST_ARRAY_PITC…  in A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH()
3783 static inline uint32_t A5XX_VPC_CNTL_0_STRIDE_IN_VPC(uint32_t val)  in A5XX_VPC_CNTL_0_STRIDE_IN_VPC()  argument
3785 	return ((val) << A5XX_VPC_CNTL_0_STRIDE_IN_VPC__SHIFT) & A5XX_VPC_CNTL_0_STRIDE_IN_VPC__MASK;  in A5XX_VPC_CNTL_0_STRIDE_IN_VPC()
3812 static inline uint32_t A5XX_VPC_PACK_NUMNONPOSVAR(uint32_t val)  in A5XX_VPC_PACK_NUMNONPOSVAR()  argument
3814 	return ((val) << A5XX_VPC_PACK_NUMNONPOSVAR__SHIFT) & A5XX_VPC_PACK_NUMNONPOSVAR__MASK;  in A5XX_VPC_PACK_NUMNONPOSVAR()
3818 static inline uint32_t A5XX_VPC_PACK_PSIZELOC(uint32_t val)  in A5XX_VPC_PACK_PSIZELOC()  argument
3820 	return ((val) << A5XX_VPC_PACK_PSIZELOC__SHIFT) & A5XX_VPC_PACK_PSIZELOC__MASK;  in A5XX_VPC_PACK_PSIZELOC()
3841 static inline uint32_t A5XX_VPC_SO_PROG_A_BUF(uint32_t val)  in A5XX_VPC_SO_PROG_A_BUF()  argument
3843 	return ((val) << A5XX_VPC_SO_PROG_A_BUF__SHIFT) & A5XX_VPC_SO_PROG_A_BUF__MASK;  in A5XX_VPC_SO_PROG_A_BUF()
3847 static inline uint32_t A5XX_VPC_SO_PROG_A_OFF(uint32_t val)  in A5XX_VPC_SO_PROG_A_OFF()  argument
3849 	return ((val >> 2) << A5XX_VPC_SO_PROG_A_OFF__SHIFT) & A5XX_VPC_SO_PROG_A_OFF__MASK;  in A5XX_VPC_SO_PROG_A_OFF()
3854 static inline uint32_t A5XX_VPC_SO_PROG_B_BUF(uint32_t val)  in A5XX_VPC_SO_PROG_B_BUF()  argument
3856 	return ((val) << A5XX_VPC_SO_PROG_B_BUF__SHIFT) & A5XX_VPC_SO_PROG_B_BUF__MASK;  in A5XX_VPC_SO_PROG_B_BUF()
3860 static inline uint32_t A5XX_VPC_SO_PROG_B_OFF(uint32_t val)  in A5XX_VPC_SO_PROG_B_OFF()  argument
3862 	return ((val >> 2) << A5XX_VPC_SO_PROG_B_OFF__SHIFT) & A5XX_VPC_SO_PROG_B_OFF__MASK;  in A5XX_VPC_SO_PROG_B_OFF()
3885 static inline uint32_t A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC(uint32_t val)  in A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC()  argument
3887 …return ((val) << A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC__SHIFT) & A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_V…  in A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC()
3899 static inline uint32_t A5XX_PC_RASTER_CNTL_POLYMODE_FRONT_PTYPE(enum adreno_pa_su_sc_draw val)  in A5XX_PC_RASTER_CNTL_POLYMODE_FRONT_PTYPE()  argument
3901 …return ((val) << A5XX_PC_RASTER_CNTL_POLYMODE_FRONT_PTYPE__SHIFT) & A5XX_PC_RASTER_CNTL_POLYMODE_F…  in A5XX_PC_RASTER_CNTL_POLYMODE_FRONT_PTYPE()
3905 static inline uint32_t A5XX_PC_RASTER_CNTL_POLYMODE_BACK_PTYPE(enum adreno_pa_su_sc_draw val)  in A5XX_PC_RASTER_CNTL_POLYMODE_BACK_PTYPE()  argument
3907 …return ((val) << A5XX_PC_RASTER_CNTL_POLYMODE_BACK_PTYPE__SHIFT) & A5XX_PC_RASTER_CNTL_POLYMODE_BA…  in A5XX_PC_RASTER_CNTL_POLYMODE_BACK_PTYPE()
3920 static inline uint32_t A5XX_PC_GS_PARAM_MAX_VERTICES(uint32_t val)  in A5XX_PC_GS_PARAM_MAX_VERTICES()  argument
3922 	return ((val) << A5XX_PC_GS_PARAM_MAX_VERTICES__SHIFT) & A5XX_PC_GS_PARAM_MAX_VERTICES__MASK;  in A5XX_PC_GS_PARAM_MAX_VERTICES()
3926 static inline uint32_t A5XX_PC_GS_PARAM_INVOCATIONS(uint32_t val)  in A5XX_PC_GS_PARAM_INVOCATIONS()  argument
3928 	return ((val) << A5XX_PC_GS_PARAM_INVOCATIONS__SHIFT) & A5XX_PC_GS_PARAM_INVOCATIONS__MASK;  in A5XX_PC_GS_PARAM_INVOCATIONS()
3932 static inline uint32_t A5XX_PC_GS_PARAM_PRIMTYPE(enum adreno_pa_su_sc_draw val)  in A5XX_PC_GS_PARAM_PRIMTYPE()  argument
3934 	return ((val) << A5XX_PC_GS_PARAM_PRIMTYPE__SHIFT) & A5XX_PC_GS_PARAM_PRIMTYPE__MASK;  in A5XX_PC_GS_PARAM_PRIMTYPE()
3940 static inline uint32_t A5XX_PC_HS_PARAM_VERTICES_OUT(uint32_t val)  in A5XX_PC_HS_PARAM_VERTICES_OUT()  argument
3942 	return ((val) << A5XX_PC_HS_PARAM_VERTICES_OUT__SHIFT) & A5XX_PC_HS_PARAM_VERTICES_OUT__MASK;  in A5XX_PC_HS_PARAM_VERTICES_OUT()
3946 static inline uint32_t A5XX_PC_HS_PARAM_SPACING(enum a4xx_tess_spacing val)  in A5XX_PC_HS_PARAM_SPACING()  argument
3948 	return ((val) << A5XX_PC_HS_PARAM_SPACING__SHIFT) & A5XX_PC_HS_PARAM_SPACING__MASK;  in A5XX_PC_HS_PARAM_SPACING()
3958 static inline uint32_t A5XX_VFD_CONTROL_0_VTXCNT(uint32_t val)  in A5XX_VFD_CONTROL_0_VTXCNT()  argument
3960 	return ((val) << A5XX_VFD_CONTROL_0_VTXCNT__SHIFT) & A5XX_VFD_CONTROL_0_VTXCNT__MASK;  in A5XX_VFD_CONTROL_0_VTXCNT()
3966 static inline uint32_t A5XX_VFD_CONTROL_1_REGID4VTX(uint32_t val)  in A5XX_VFD_CONTROL_1_REGID4VTX()  argument
3968 	return ((val) << A5XX_VFD_CONTROL_1_REGID4VTX__SHIFT) & A5XX_VFD_CONTROL_1_REGID4VTX__MASK;  in A5XX_VFD_CONTROL_1_REGID4VTX()
3972 static inline uint32_t A5XX_VFD_CONTROL_1_REGID4INST(uint32_t val)  in A5XX_VFD_CONTROL_1_REGID4INST()  argument
3974 	return ((val) << A5XX_VFD_CONTROL_1_REGID4INST__SHIFT) & A5XX_VFD_CONTROL_1_REGID4INST__MASK;  in A5XX_VFD_CONTROL_1_REGID4INST()
3978 static inline uint32_t A5XX_VFD_CONTROL_1_REGID4PRIMID(uint32_t val)  in A5XX_VFD_CONTROL_1_REGID4PRIMID()  argument
3980 	return ((val) << A5XX_VFD_CONTROL_1_REGID4PRIMID__SHIFT) & A5XX_VFD_CONTROL_1_REGID4PRIMID__MASK;  in A5XX_VFD_CONTROL_1_REGID4PRIMID()
3986 static inline uint32_t A5XX_VFD_CONTROL_2_REGID_PATCHID(uint32_t val)  in A5XX_VFD_CONTROL_2_REGID_PATCHID()  argument
3988 	return ((val) << A5XX_VFD_CONTROL_2_REGID_PATCHID__SHIFT) & A5XX_VFD_CONTROL_2_REGID_PATCHID__MASK;  in A5XX_VFD_CONTROL_2_REGID_PATCHID()
3994 static inline uint32_t A5XX_VFD_CONTROL_3_REGID_PATCHID(uint32_t val)  in A5XX_VFD_CONTROL_3_REGID_PATCHID()  argument
3996 	return ((val) << A5XX_VFD_CONTROL_3_REGID_PATCHID__SHIFT) & A5XX_VFD_CONTROL_3_REGID_PATCHID__MASK;  in A5XX_VFD_CONTROL_3_REGID_PATCHID()
4000 static inline uint32_t A5XX_VFD_CONTROL_3_REGID_TESSX(uint32_t val)  in A5XX_VFD_CONTROL_3_REGID_TESSX()  argument
4002 	return ((val) << A5XX_VFD_CONTROL_3_REGID_TESSX__SHIFT) & A5XX_VFD_CONTROL_3_REGID_TESSX__MASK;  in A5XX_VFD_CONTROL_3_REGID_TESSX()
4006 static inline uint32_t A5XX_VFD_CONTROL_3_REGID_TESSY(uint32_t val)  in A5XX_VFD_CONTROL_3_REGID_TESSY()  argument
4008 	return ((val) << A5XX_VFD_CONTROL_3_REGID_TESSY__SHIFT) & A5XX_VFD_CONTROL_3_REGID_TESSY__MASK;  in A5XX_VFD_CONTROL_3_REGID_TESSY()
4034 static inline uint32_t A5XX_VFD_DECODE_INSTR_IDX(uint32_t val)  in A5XX_VFD_DECODE_INSTR_IDX()  argument
4036 	return ((val) << A5XX_VFD_DECODE_INSTR_IDX__SHIFT) & A5XX_VFD_DECODE_INSTR_IDX__MASK;  in A5XX_VFD_DECODE_INSTR_IDX()
4041 static inline uint32_t A5XX_VFD_DECODE_INSTR_FORMAT(enum a5xx_vtx_fmt val)  in A5XX_VFD_DECODE_INSTR_FORMAT()  argument
4043 	return ((val) << A5XX_VFD_DECODE_INSTR_FORMAT__SHIFT) & A5XX_VFD_DECODE_INSTR_FORMAT__MASK;  in A5XX_VFD_DECODE_INSTR_FORMAT()
4047 static inline uint32_t A5XX_VFD_DECODE_INSTR_SWAP(enum a3xx_color_swap val)  in A5XX_VFD_DECODE_INSTR_SWAP()  argument
4049 	return ((val) << A5XX_VFD_DECODE_INSTR_SWAP__SHIFT) & A5XX_VFD_DECODE_INSTR_SWAP__MASK;  in A5XX_VFD_DECODE_INSTR_SWAP()
4061 static inline uint32_t A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK(uint32_t val)  in A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK()  argument
4063 …return ((val) << A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK__SHIFT) & A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK__…  in A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK()
4067 static inline uint32_t A5XX_VFD_DEST_CNTL_INSTR_REGID(uint32_t val)  in A5XX_VFD_DEST_CNTL_INSTR_REGID()  argument
4069 	return ((val) << A5XX_VFD_DEST_CNTL_INSTR_REGID__SHIFT) & A5XX_VFD_DEST_CNTL_INSTR_REGID__MASK;  in A5XX_VFD_DEST_CNTL_INSTR_REGID()
4080 static inline uint32_t A5XX_SP_VS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_SP_VS_CONFIG_CONSTOBJECTOFFSET()  argument
4082 …return ((val) << A5XX_SP_VS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_VS_CONFIG_CONSTOBJECTOFFSET…  in A5XX_SP_VS_CONFIG_CONSTOBJECTOFFSET()
4086 static inline uint32_t A5XX_SP_VS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_SP_VS_CONFIG_SHADEROBJOFFSET()  argument
4088 …return ((val) << A5XX_SP_VS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_VS_CONFIG_SHADEROBJOFFSET__MA…  in A5XX_SP_VS_CONFIG_SHADEROBJOFFSET()
4095 static inline uint32_t A5XX_SP_FS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_SP_FS_CONFIG_CONSTOBJECTOFFSET()  argument
4097 …return ((val) << A5XX_SP_FS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_FS_CONFIG_CONSTOBJECTOFFSET…  in A5XX_SP_FS_CONFIG_CONSTOBJECTOFFSET()
4101 static inline uint32_t A5XX_SP_FS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_SP_FS_CONFIG_SHADEROBJOFFSET()  argument
4103 …return ((val) << A5XX_SP_FS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_FS_CONFIG_SHADEROBJOFFSET__MA…  in A5XX_SP_FS_CONFIG_SHADEROBJOFFSET()
4110 static inline uint32_t A5XX_SP_HS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_SP_HS_CONFIG_CONSTOBJECTOFFSET()  argument
4112 …return ((val) << A5XX_SP_HS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_HS_CONFIG_CONSTOBJECTOFFSET…  in A5XX_SP_HS_CONFIG_CONSTOBJECTOFFSET()
4116 static inline uint32_t A5XX_SP_HS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_SP_HS_CONFIG_SHADEROBJOFFSET()  argument
4118 …return ((val) << A5XX_SP_HS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_HS_CONFIG_SHADEROBJOFFSET__MA…  in A5XX_SP_HS_CONFIG_SHADEROBJOFFSET()
4125 static inline uint32_t A5XX_SP_DS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_SP_DS_CONFIG_CONSTOBJECTOFFSET()  argument
4127 …return ((val) << A5XX_SP_DS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_DS_CONFIG_CONSTOBJECTOFFSET…  in A5XX_SP_DS_CONFIG_CONSTOBJECTOFFSET()
4131 static inline uint32_t A5XX_SP_DS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_SP_DS_CONFIG_SHADEROBJOFFSET()  argument
4133 …return ((val) << A5XX_SP_DS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_DS_CONFIG_SHADEROBJOFFSET__MA…  in A5XX_SP_DS_CONFIG_SHADEROBJOFFSET()
4140 static inline uint32_t A5XX_SP_GS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_SP_GS_CONFIG_CONSTOBJECTOFFSET()  argument
4142 …return ((val) << A5XX_SP_GS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_GS_CONFIG_CONSTOBJECTOFFSET…  in A5XX_SP_GS_CONFIG_CONSTOBJECTOFFSET()
4146 static inline uint32_t A5XX_SP_GS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_SP_GS_CONFIG_SHADEROBJOFFSET()  argument
4148 …return ((val) << A5XX_SP_GS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_GS_CONFIG_SHADEROBJOFFSET__MA…  in A5XX_SP_GS_CONFIG_SHADEROBJOFFSET()
4155 static inline uint32_t A5XX_SP_CS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_SP_CS_CONFIG_CONSTOBJECTOFFSET()  argument
4157 …return ((val) << A5XX_SP_CS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_CS_CONFIG_CONSTOBJECTOFFSET…  in A5XX_SP_CS_CONFIG_CONSTOBJECTOFFSET()
4161 static inline uint32_t A5XX_SP_CS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_SP_CS_CONFIG_SHADEROBJOFFSET()  argument
4163 …return ((val) << A5XX_SP_CS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_CS_CONFIG_SHADEROBJOFFSET__MA…  in A5XX_SP_CS_CONFIG_SHADEROBJOFFSET()
4173 static inline uint32_t A5XX_SP_VS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A5XX_SP_VS_CTRL_REG0_THREADSIZE()  argument
4175 	return ((val) << A5XX_SP_VS_CTRL_REG0_THREADSIZE__SHIFT) & A5XX_SP_VS_CTRL_REG0_THREADSIZE__MASK;  in A5XX_SP_VS_CTRL_REG0_THREADSIZE()
4179 static inline uint32_t A5XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A5XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT()  argument
4181 …return ((val) << A5XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A5XX_SP_VS_CTRL_REG0_HALFREGFOOTP…  in A5XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT()
4185 static inline uint32_t A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT()  argument
4187 …return ((val) << A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A5XX_SP_VS_CTRL_REG0_FULLREGFOOTP…  in A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT()
4193 static inline uint32_t A5XX_SP_VS_CTRL_REG0_BRANCHSTACK(uint32_t val)  in A5XX_SP_VS_CTRL_REG0_BRANCHSTACK()  argument
4195 	return ((val) << A5XX_SP_VS_CTRL_REG0_BRANCHSTACK__SHIFT) & A5XX_SP_VS_CTRL_REG0_BRANCHSTACK__MASK;  in A5XX_SP_VS_CTRL_REG0_BRANCHSTACK()
4201 static inline uint32_t A5XX_SP_PRIMITIVE_CNTL_VSOUT(uint32_t val)  in A5XX_SP_PRIMITIVE_CNTL_VSOUT()  argument
4203 	return ((val) << A5XX_SP_PRIMITIVE_CNTL_VSOUT__SHIFT) & A5XX_SP_PRIMITIVE_CNTL_VSOUT__MASK;  in A5XX_SP_PRIMITIVE_CNTL_VSOUT()
4211 static inline uint32_t A5XX_SP_VS_OUT_REG_A_REGID(uint32_t val)  in A5XX_SP_VS_OUT_REG_A_REGID()  argument
4213 	return ((val) << A5XX_SP_VS_OUT_REG_A_REGID__SHIFT) & A5XX_SP_VS_OUT_REG_A_REGID__MASK;  in A5XX_SP_VS_OUT_REG_A_REGID()
4217 static inline uint32_t A5XX_SP_VS_OUT_REG_A_COMPMASK(uint32_t val)  in A5XX_SP_VS_OUT_REG_A_COMPMASK()  argument
4219 	return ((val) << A5XX_SP_VS_OUT_REG_A_COMPMASK__SHIFT) & A5XX_SP_VS_OUT_REG_A_COMPMASK__MASK;  in A5XX_SP_VS_OUT_REG_A_COMPMASK()
4223 static inline uint32_t A5XX_SP_VS_OUT_REG_B_REGID(uint32_t val)  in A5XX_SP_VS_OUT_REG_B_REGID()  argument
4225 	return ((val) << A5XX_SP_VS_OUT_REG_B_REGID__SHIFT) & A5XX_SP_VS_OUT_REG_B_REGID__MASK;  in A5XX_SP_VS_OUT_REG_B_REGID()
4229 static inline uint32_t A5XX_SP_VS_OUT_REG_B_COMPMASK(uint32_t val)  in A5XX_SP_VS_OUT_REG_B_COMPMASK()  argument
4231 	return ((val) << A5XX_SP_VS_OUT_REG_B_COMPMASK__SHIFT) & A5XX_SP_VS_OUT_REG_B_COMPMASK__MASK;  in A5XX_SP_VS_OUT_REG_B_COMPMASK()
4239 static inline uint32_t A5XX_SP_VS_VPC_DST_REG_OUTLOC0(uint32_t val)  in A5XX_SP_VS_VPC_DST_REG_OUTLOC0()  argument
4241 	return ((val) << A5XX_SP_VS_VPC_DST_REG_OUTLOC0__SHIFT) & A5XX_SP_VS_VPC_DST_REG_OUTLOC0__MASK;  in A5XX_SP_VS_VPC_DST_REG_OUTLOC0()
4245 static inline uint32_t A5XX_SP_VS_VPC_DST_REG_OUTLOC1(uint32_t val)  in A5XX_SP_VS_VPC_DST_REG_OUTLOC1()  argument
4247 	return ((val) << A5XX_SP_VS_VPC_DST_REG_OUTLOC1__SHIFT) & A5XX_SP_VS_VPC_DST_REG_OUTLOC1__MASK;  in A5XX_SP_VS_VPC_DST_REG_OUTLOC1()
4251 static inline uint32_t A5XX_SP_VS_VPC_DST_REG_OUTLOC2(uint32_t val)  in A5XX_SP_VS_VPC_DST_REG_OUTLOC2()  argument
4253 	return ((val) << A5XX_SP_VS_VPC_DST_REG_OUTLOC2__SHIFT) & A5XX_SP_VS_VPC_DST_REG_OUTLOC2__MASK;  in A5XX_SP_VS_VPC_DST_REG_OUTLOC2()
4257 static inline uint32_t A5XX_SP_VS_VPC_DST_REG_OUTLOC3(uint32_t val)  in A5XX_SP_VS_VPC_DST_REG_OUTLOC3()  argument
4259 	return ((val) << A5XX_SP_VS_VPC_DST_REG_OUTLOC3__SHIFT) & A5XX_SP_VS_VPC_DST_REG_OUTLOC3__MASK;  in A5XX_SP_VS_VPC_DST_REG_OUTLOC3()
4271 static inline uint32_t A5XX_SP_FS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A5XX_SP_FS_CTRL_REG0_THREADSIZE()  argument
4273 	return ((val) << A5XX_SP_FS_CTRL_REG0_THREADSIZE__SHIFT) & A5XX_SP_FS_CTRL_REG0_THREADSIZE__MASK;  in A5XX_SP_FS_CTRL_REG0_THREADSIZE()
4277 static inline uint32_t A5XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A5XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT()  argument
4279 …return ((val) << A5XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A5XX_SP_FS_CTRL_REG0_HALFREGFOOTP…  in A5XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT()
4283 static inline uint32_t A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT()  argument
4285 …return ((val) << A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A5XX_SP_FS_CTRL_REG0_FULLREGFOOTP…  in A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT()
4291 static inline uint32_t A5XX_SP_FS_CTRL_REG0_BRANCHSTACK(uint32_t val)  in A5XX_SP_FS_CTRL_REG0_BRANCHSTACK()  argument
4293 	return ((val) << A5XX_SP_FS_CTRL_REG0_BRANCHSTACK__SHIFT) & A5XX_SP_FS_CTRL_REG0_BRANCHSTACK__MASK;  in A5XX_SP_FS_CTRL_REG0_BRANCHSTACK()
4310 static inline uint32_t A5XX_SP_FS_OUTPUT_CNTL_MRT(uint32_t val)  in A5XX_SP_FS_OUTPUT_CNTL_MRT()  argument
4312 	return ((val) << A5XX_SP_FS_OUTPUT_CNTL_MRT__SHIFT) & A5XX_SP_FS_OUTPUT_CNTL_MRT__MASK;  in A5XX_SP_FS_OUTPUT_CNTL_MRT()
4316 static inline uint32_t A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID(uint32_t val)  in A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID()  argument
4318 …return ((val) << A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID__SHIFT) & A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID__…  in A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID()
4322 static inline uint32_t A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMASK_REGID(uint32_t val)  in A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMASK_REGID()  argument
4324 …return ((val) << A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMASK_REGID__SHIFT) & A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMA…  in A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMASK_REGID()
4332 static inline uint32_t A5XX_SP_FS_OUTPUT_REG_REGID(uint32_t val)  in A5XX_SP_FS_OUTPUT_REG_REGID()  argument
4334 	return ((val) << A5XX_SP_FS_OUTPUT_REG_REGID__SHIFT) & A5XX_SP_FS_OUTPUT_REG_REGID__MASK;  in A5XX_SP_FS_OUTPUT_REG_REGID()
4343 static inline uint32_t A5XX_SP_FS_MRT_REG_COLOR_FORMAT(enum a5xx_color_fmt val)  in A5XX_SP_FS_MRT_REG_COLOR_FORMAT()  argument
4345 	return ((val) << A5XX_SP_FS_MRT_REG_COLOR_FORMAT__SHIFT) & A5XX_SP_FS_MRT_REG_COLOR_FORMAT__MASK;  in A5XX_SP_FS_MRT_REG_COLOR_FORMAT()
4356 static inline uint32_t A5XX_SP_CS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A5XX_SP_CS_CTRL_REG0_THREADSIZE()  argument
4358 	return ((val) << A5XX_SP_CS_CTRL_REG0_THREADSIZE__SHIFT) & A5XX_SP_CS_CTRL_REG0_THREADSIZE__MASK;  in A5XX_SP_CS_CTRL_REG0_THREADSIZE()
4362 static inline uint32_t A5XX_SP_CS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A5XX_SP_CS_CTRL_REG0_HALFREGFOOTPRINT()  argument
4364 …return ((val) << A5XX_SP_CS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A5XX_SP_CS_CTRL_REG0_HALFREGFOOTP…  in A5XX_SP_CS_CTRL_REG0_HALFREGFOOTPRINT()
4368 static inline uint32_t A5XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A5XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT()  argument
4370 …return ((val) << A5XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A5XX_SP_CS_CTRL_REG0_FULLREGFOOTP…  in A5XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT()
4376 static inline uint32_t A5XX_SP_CS_CTRL_REG0_BRANCHSTACK(uint32_t val)  in A5XX_SP_CS_CTRL_REG0_BRANCHSTACK()  argument
4378 	return ((val) << A5XX_SP_CS_CTRL_REG0_BRANCHSTACK__SHIFT) & A5XX_SP_CS_CTRL_REG0_BRANCHSTACK__MASK;  in A5XX_SP_CS_CTRL_REG0_BRANCHSTACK()
4390 static inline uint32_t A5XX_SP_HS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A5XX_SP_HS_CTRL_REG0_THREADSIZE()  argument
4392 	return ((val) << A5XX_SP_HS_CTRL_REG0_THREADSIZE__SHIFT) & A5XX_SP_HS_CTRL_REG0_THREADSIZE__MASK;  in A5XX_SP_HS_CTRL_REG0_THREADSIZE()
4396 static inline uint32_t A5XX_SP_HS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A5XX_SP_HS_CTRL_REG0_HALFREGFOOTPRINT()  argument
4398 …return ((val) << A5XX_SP_HS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A5XX_SP_HS_CTRL_REG0_HALFREGFOOTP…  in A5XX_SP_HS_CTRL_REG0_HALFREGFOOTPRINT()
4402 static inline uint32_t A5XX_SP_HS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A5XX_SP_HS_CTRL_REG0_FULLREGFOOTPRINT()  argument
4404 …return ((val) << A5XX_SP_HS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A5XX_SP_HS_CTRL_REG0_FULLREGFOOTP…  in A5XX_SP_HS_CTRL_REG0_FULLREGFOOTPRINT()
4410 static inline uint32_t A5XX_SP_HS_CTRL_REG0_BRANCHSTACK(uint32_t val)  in A5XX_SP_HS_CTRL_REG0_BRANCHSTACK()  argument
4412 	return ((val) << A5XX_SP_HS_CTRL_REG0_BRANCHSTACK__SHIFT) & A5XX_SP_HS_CTRL_REG0_BRANCHSTACK__MASK;  in A5XX_SP_HS_CTRL_REG0_BRANCHSTACK()
4424 static inline uint32_t A5XX_SP_DS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A5XX_SP_DS_CTRL_REG0_THREADSIZE()  argument
4426 	return ((val) << A5XX_SP_DS_CTRL_REG0_THREADSIZE__SHIFT) & A5XX_SP_DS_CTRL_REG0_THREADSIZE__MASK;  in A5XX_SP_DS_CTRL_REG0_THREADSIZE()
4430 static inline uint32_t A5XX_SP_DS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A5XX_SP_DS_CTRL_REG0_HALFREGFOOTPRINT()  argument
4432 …return ((val) << A5XX_SP_DS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A5XX_SP_DS_CTRL_REG0_HALFREGFOOTP…  in A5XX_SP_DS_CTRL_REG0_HALFREGFOOTPRINT()
4436 static inline uint32_t A5XX_SP_DS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A5XX_SP_DS_CTRL_REG0_FULLREGFOOTPRINT()  argument
4438 …return ((val) << A5XX_SP_DS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A5XX_SP_DS_CTRL_REG0_FULLREGFOOTP…  in A5XX_SP_DS_CTRL_REG0_FULLREGFOOTPRINT()
4444 static inline uint32_t A5XX_SP_DS_CTRL_REG0_BRANCHSTACK(uint32_t val)  in A5XX_SP_DS_CTRL_REG0_BRANCHSTACK()  argument
4446 	return ((val) << A5XX_SP_DS_CTRL_REG0_BRANCHSTACK__SHIFT) & A5XX_SP_DS_CTRL_REG0_BRANCHSTACK__MASK;  in A5XX_SP_DS_CTRL_REG0_BRANCHSTACK()
4458 static inline uint32_t A5XX_SP_GS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A5XX_SP_GS_CTRL_REG0_THREADSIZE()  argument
4460 	return ((val) << A5XX_SP_GS_CTRL_REG0_THREADSIZE__SHIFT) & A5XX_SP_GS_CTRL_REG0_THREADSIZE__MASK;  in A5XX_SP_GS_CTRL_REG0_THREADSIZE()
4464 static inline uint32_t A5XX_SP_GS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A5XX_SP_GS_CTRL_REG0_HALFREGFOOTPRINT()  argument
4466 …return ((val) << A5XX_SP_GS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A5XX_SP_GS_CTRL_REG0_HALFREGFOOTP…  in A5XX_SP_GS_CTRL_REG0_HALFREGFOOTPRINT()
4470 static inline uint32_t A5XX_SP_GS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A5XX_SP_GS_CTRL_REG0_FULLREGFOOTPRINT()  argument
4472 …return ((val) << A5XX_SP_GS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A5XX_SP_GS_CTRL_REG0_FULLREGFOOTP…  in A5XX_SP_GS_CTRL_REG0_FULLREGFOOTPRINT()
4478 static inline uint32_t A5XX_SP_GS_CTRL_REG0_BRANCHSTACK(uint32_t val)  in A5XX_SP_GS_CTRL_REG0_BRANCHSTACK()  argument
4480 	return ((val) << A5XX_SP_GS_CTRL_REG0_BRANCHSTACK__SHIFT) & A5XX_SP_GS_CTRL_REG0_BRANCHSTACK__MASK;  in A5XX_SP_GS_CTRL_REG0_BRANCHSTACK()
4492 static inline uint32_t A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val)  in A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES()  argument
4494 …return ((val) << A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES__…  in A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES()
4500 static inline uint32_t A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val)  in A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES()  argument
4502 …return ((val) << A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES…  in A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES()
4575 static inline uint32_t A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(enum a3xx_threadsize val)  in A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE()  argument
4577 …return ((val) << A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE__SHIFT) & A5XX_HLSQ_CONTROL_0_REG_FSTHREADSI…  in A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE()
4581 static inline uint32_t A5XX_HLSQ_CONTROL_0_REG_CSTHREADSIZE(enum a3xx_threadsize val)  in A5XX_HLSQ_CONTROL_0_REG_CSTHREADSIZE()  argument
4583 …return ((val) << A5XX_HLSQ_CONTROL_0_REG_CSTHREADSIZE__SHIFT) & A5XX_HLSQ_CONTROL_0_REG_CSTHREADSI…  in A5XX_HLSQ_CONTROL_0_REG_CSTHREADSIZE()
4589 static inline uint32_t A5XX_HLSQ_CONTROL_1_REG_PRIMALLOCTHRESHOLD(uint32_t val)  in A5XX_HLSQ_CONTROL_1_REG_PRIMALLOCTHRESHOLD()  argument
4591 …return ((val) << A5XX_HLSQ_CONTROL_1_REG_PRIMALLOCTHRESHOLD__SHIFT) & A5XX_HLSQ_CONTROL_1_REG_PRIM…  in A5XX_HLSQ_CONTROL_1_REG_PRIMALLOCTHRESHOLD()
4597 static inline uint32_t A5XX_HLSQ_CONTROL_2_REG_FACEREGID(uint32_t val)  in A5XX_HLSQ_CONTROL_2_REG_FACEREGID()  argument
4599 …return ((val) << A5XX_HLSQ_CONTROL_2_REG_FACEREGID__SHIFT) & A5XX_HLSQ_CONTROL_2_REG_FACEREGID__MA…  in A5XX_HLSQ_CONTROL_2_REG_FACEREGID()
4603 static inline uint32_t A5XX_HLSQ_CONTROL_2_REG_SAMPLEID(uint32_t val)  in A5XX_HLSQ_CONTROL_2_REG_SAMPLEID()  argument
4605 	return ((val) << A5XX_HLSQ_CONTROL_2_REG_SAMPLEID__SHIFT) & A5XX_HLSQ_CONTROL_2_REG_SAMPLEID__MASK;  in A5XX_HLSQ_CONTROL_2_REG_SAMPLEID()
4609 static inline uint32_t A5XX_HLSQ_CONTROL_2_REG_SAMPLEMASK(uint32_t val)  in A5XX_HLSQ_CONTROL_2_REG_SAMPLEMASK()  argument
4611 …return ((val) << A5XX_HLSQ_CONTROL_2_REG_SAMPLEMASK__SHIFT) & A5XX_HLSQ_CONTROL_2_REG_SAMPLEMASK__…  in A5XX_HLSQ_CONTROL_2_REG_SAMPLEMASK()
4615 static inline uint32_t A5XX_HLSQ_CONTROL_2_REG_SIZE(uint32_t val)  in A5XX_HLSQ_CONTROL_2_REG_SIZE()  argument
4617 	return ((val) << A5XX_HLSQ_CONTROL_2_REG_SIZE__SHIFT) & A5XX_HLSQ_CONTROL_2_REG_SIZE__MASK;  in A5XX_HLSQ_CONTROL_2_REG_SIZE()
4623 static inline uint32_t A5XX_HLSQ_CONTROL_3_REG_IJ_PERSP_PIXEL(uint32_t val)  in A5XX_HLSQ_CONTROL_3_REG_IJ_PERSP_PIXEL()  argument
4625 …return ((val) << A5XX_HLSQ_CONTROL_3_REG_IJ_PERSP_PIXEL__SHIFT) & A5XX_HLSQ_CONTROL_3_REG_IJ_PERSP…  in A5XX_HLSQ_CONTROL_3_REG_IJ_PERSP_PIXEL()
4629 static inline uint32_t A5XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_PIXEL(uint32_t val)  in A5XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_PIXEL()  argument
4631 …return ((val) << A5XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_PIXEL__SHIFT) & A5XX_HLSQ_CONTROL_3_REG_IJ_LINE…  in A5XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_PIXEL()
4635 static inline uint32_t A5XX_HLSQ_CONTROL_3_REG_IJ_PERSP_CENTROID(uint32_t val)  in A5XX_HLSQ_CONTROL_3_REG_IJ_PERSP_CENTROID()  argument
4637 …return ((val) << A5XX_HLSQ_CONTROL_3_REG_IJ_PERSP_CENTROID__SHIFT) & A5XX_HLSQ_CONTROL_3_REG_IJ_PE…  in A5XX_HLSQ_CONTROL_3_REG_IJ_PERSP_CENTROID()
4641 static inline uint32_t A5XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_CENTROID(uint32_t val)  in A5XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_CENTROID()  argument
4643 …return ((val) << A5XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_CENTROID__SHIFT) & A5XX_HLSQ_CONTROL_3_REG_IJ_L…  in A5XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_CENTROID()
4649 static inline uint32_t A5XX_HLSQ_CONTROL_4_REG_IJ_PERSP_SAMPLE(uint32_t val)  in A5XX_HLSQ_CONTROL_4_REG_IJ_PERSP_SAMPLE()  argument
4651 …return ((val) << A5XX_HLSQ_CONTROL_4_REG_IJ_PERSP_SAMPLE__SHIFT) & A5XX_HLSQ_CONTROL_4_REG_IJ_PERS…  in A5XX_HLSQ_CONTROL_4_REG_IJ_PERSP_SAMPLE()
4655 static inline uint32_t A5XX_HLSQ_CONTROL_4_REG_IJ_LINEAR_SAMPLE(uint32_t val)  in A5XX_HLSQ_CONTROL_4_REG_IJ_LINEAR_SAMPLE()  argument
4657 …return ((val) << A5XX_HLSQ_CONTROL_4_REG_IJ_LINEAR_SAMPLE__SHIFT) & A5XX_HLSQ_CONTROL_4_REG_IJ_LIN…  in A5XX_HLSQ_CONTROL_4_REG_IJ_LINEAR_SAMPLE()
4661 static inline uint32_t A5XX_HLSQ_CONTROL_4_REG_XYCOORDREGID(uint32_t val)  in A5XX_HLSQ_CONTROL_4_REG_XYCOORDREGID()  argument
4663 …return ((val) << A5XX_HLSQ_CONTROL_4_REG_XYCOORDREGID__SHIFT) & A5XX_HLSQ_CONTROL_4_REG_XYCOORDREG…  in A5XX_HLSQ_CONTROL_4_REG_XYCOORDREGID()
4667 static inline uint32_t A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREGID(uint32_t val)  in A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREGID()  argument
4669 …return ((val) << A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREGID__SHIFT) & A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREG…  in A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREGID()
4678 static inline uint32_t A5XX_HLSQ_VS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_HLSQ_VS_CONFIG_CONSTOBJECTOFFSET()  argument
4680 …return ((val) << A5XX_HLSQ_VS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_VS_CONFIG_CONSTOBJECTOF…  in A5XX_HLSQ_VS_CONFIG_CONSTOBJECTOFFSET()
4684 static inline uint32_t A5XX_HLSQ_VS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_HLSQ_VS_CONFIG_SHADEROBJOFFSET()  argument
4686 …return ((val) << A5XX_HLSQ_VS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_VS_CONFIG_SHADEROBJOFFSET…  in A5XX_HLSQ_VS_CONFIG_SHADEROBJOFFSET()
4693 static inline uint32_t A5XX_HLSQ_FS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_HLSQ_FS_CONFIG_CONSTOBJECTOFFSET()  argument
4695 …return ((val) << A5XX_HLSQ_FS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_FS_CONFIG_CONSTOBJECTOF…  in A5XX_HLSQ_FS_CONFIG_CONSTOBJECTOFFSET()
4699 static inline uint32_t A5XX_HLSQ_FS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_HLSQ_FS_CONFIG_SHADEROBJOFFSET()  argument
4701 …return ((val) << A5XX_HLSQ_FS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_FS_CONFIG_SHADEROBJOFFSET…  in A5XX_HLSQ_FS_CONFIG_SHADEROBJOFFSET()
4708 static inline uint32_t A5XX_HLSQ_HS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_HLSQ_HS_CONFIG_CONSTOBJECTOFFSET()  argument
4710 …return ((val) << A5XX_HLSQ_HS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_HS_CONFIG_CONSTOBJECTOF…  in A5XX_HLSQ_HS_CONFIG_CONSTOBJECTOFFSET()
4714 static inline uint32_t A5XX_HLSQ_HS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_HLSQ_HS_CONFIG_SHADEROBJOFFSET()  argument
4716 …return ((val) << A5XX_HLSQ_HS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_HS_CONFIG_SHADEROBJOFFSET…  in A5XX_HLSQ_HS_CONFIG_SHADEROBJOFFSET()
4723 static inline uint32_t A5XX_HLSQ_DS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_HLSQ_DS_CONFIG_CONSTOBJECTOFFSET()  argument
4725 …return ((val) << A5XX_HLSQ_DS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_DS_CONFIG_CONSTOBJECTOF…  in A5XX_HLSQ_DS_CONFIG_CONSTOBJECTOFFSET()
4729 static inline uint32_t A5XX_HLSQ_DS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_HLSQ_DS_CONFIG_SHADEROBJOFFSET()  argument
4731 …return ((val) << A5XX_HLSQ_DS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_DS_CONFIG_SHADEROBJOFFSET…  in A5XX_HLSQ_DS_CONFIG_SHADEROBJOFFSET()
4738 static inline uint32_t A5XX_HLSQ_GS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_HLSQ_GS_CONFIG_CONSTOBJECTOFFSET()  argument
4740 …return ((val) << A5XX_HLSQ_GS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_GS_CONFIG_CONSTOBJECTOF…  in A5XX_HLSQ_GS_CONFIG_CONSTOBJECTOFFSET()
4744 static inline uint32_t A5XX_HLSQ_GS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_HLSQ_GS_CONFIG_SHADEROBJOFFSET()  argument
4746 …return ((val) << A5XX_HLSQ_GS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_GS_CONFIG_SHADEROBJOFFSET…  in A5XX_HLSQ_GS_CONFIG_SHADEROBJOFFSET()
4753 static inline uint32_t A5XX_HLSQ_CS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_HLSQ_CS_CONFIG_CONSTOBJECTOFFSET()  argument
4755 …return ((val) << A5XX_HLSQ_CS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_CS_CONFIG_CONSTOBJECTOF…  in A5XX_HLSQ_CS_CONFIG_CONSTOBJECTOFFSET()
4759 static inline uint32_t A5XX_HLSQ_CS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_HLSQ_CS_CONFIG_SHADEROBJOFFSET()  argument
4761 …return ((val) << A5XX_HLSQ_CS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_CS_CONFIG_SHADEROBJOFFSET…  in A5XX_HLSQ_CS_CONFIG_SHADEROBJOFFSET()
4768 static inline uint32_t A5XX_HLSQ_VS_CNTL_INSTRLEN(uint32_t val)  in A5XX_HLSQ_VS_CNTL_INSTRLEN()  argument
4770 	return ((val) << A5XX_HLSQ_VS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_VS_CNTL_INSTRLEN__MASK;  in A5XX_HLSQ_VS_CNTL_INSTRLEN()
4777 static inline uint32_t A5XX_HLSQ_FS_CNTL_INSTRLEN(uint32_t val)  in A5XX_HLSQ_FS_CNTL_INSTRLEN()  argument
4779 	return ((val) << A5XX_HLSQ_FS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_FS_CNTL_INSTRLEN__MASK;  in A5XX_HLSQ_FS_CNTL_INSTRLEN()
4786 static inline uint32_t A5XX_HLSQ_HS_CNTL_INSTRLEN(uint32_t val)  in A5XX_HLSQ_HS_CNTL_INSTRLEN()  argument
4788 	return ((val) << A5XX_HLSQ_HS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_HS_CNTL_INSTRLEN__MASK;  in A5XX_HLSQ_HS_CNTL_INSTRLEN()
4795 static inline uint32_t A5XX_HLSQ_DS_CNTL_INSTRLEN(uint32_t val)  in A5XX_HLSQ_DS_CNTL_INSTRLEN()  argument
4797 	return ((val) << A5XX_HLSQ_DS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_DS_CNTL_INSTRLEN__MASK;  in A5XX_HLSQ_DS_CNTL_INSTRLEN()
4804 static inline uint32_t A5XX_HLSQ_GS_CNTL_INSTRLEN(uint32_t val)  in A5XX_HLSQ_GS_CNTL_INSTRLEN()  argument
4806 	return ((val) << A5XX_HLSQ_GS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_GS_CNTL_INSTRLEN__MASK;  in A5XX_HLSQ_GS_CNTL_INSTRLEN()
4813 static inline uint32_t A5XX_HLSQ_CS_CNTL_INSTRLEN(uint32_t val)  in A5XX_HLSQ_CS_CNTL_INSTRLEN()  argument
4815 	return ((val) << A5XX_HLSQ_CS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_CS_CNTL_INSTRLEN__MASK;  in A5XX_HLSQ_CS_CNTL_INSTRLEN()
4827 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_0_KERNELDIM(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_0_KERNELDIM()  argument
4829 	return ((val) << A5XX_HLSQ_CS_NDRANGE_0_KERNELDIM__SHIFT) & A5XX_HLSQ_CS_NDRANGE_0_KERNELDIM__MASK;  in A5XX_HLSQ_CS_NDRANGE_0_KERNELDIM()
4833 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEX(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEX()  argument
4835 …return ((val) << A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEX__SHIFT) & A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEX__MA…  in A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEX()
4839 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEY(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEY()  argument
4841 …return ((val) << A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEY__SHIFT) & A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEY__MA…  in A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEY()
4845 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEZ(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEZ()  argument
4847 …return ((val) << A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEZ__SHIFT) & A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEZ__MA…  in A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEZ()
4853 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_1_GLOBALSIZE_X(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_1_GLOBALSIZE_X()  argument
4855 …return ((val) << A5XX_HLSQ_CS_NDRANGE_1_GLOBALSIZE_X__SHIFT) & A5XX_HLSQ_CS_NDRANGE_1_GLOBALSIZE_X…  in A5XX_HLSQ_CS_NDRANGE_1_GLOBALSIZE_X()
4861 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_2_GLOBALOFF_X(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_2_GLOBALOFF_X()  argument
4863 …return ((val) << A5XX_HLSQ_CS_NDRANGE_2_GLOBALOFF_X__SHIFT) & A5XX_HLSQ_CS_NDRANGE_2_GLOBALOFF_X__…  in A5XX_HLSQ_CS_NDRANGE_2_GLOBALOFF_X()
4869 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_3_GLOBALSIZE_Y(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_3_GLOBALSIZE_Y()  argument
4871 …return ((val) << A5XX_HLSQ_CS_NDRANGE_3_GLOBALSIZE_Y__SHIFT) & A5XX_HLSQ_CS_NDRANGE_3_GLOBALSIZE_Y…  in A5XX_HLSQ_CS_NDRANGE_3_GLOBALSIZE_Y()
4877 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_4_GLOBALOFF_Y(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_4_GLOBALOFF_Y()  argument
4879 …return ((val) << A5XX_HLSQ_CS_NDRANGE_4_GLOBALOFF_Y__SHIFT) & A5XX_HLSQ_CS_NDRANGE_4_GLOBALOFF_Y__…  in A5XX_HLSQ_CS_NDRANGE_4_GLOBALOFF_Y()
4885 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_5_GLOBALSIZE_Z(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_5_GLOBALSIZE_Z()  argument
4887 …return ((val) << A5XX_HLSQ_CS_NDRANGE_5_GLOBALSIZE_Z__SHIFT) & A5XX_HLSQ_CS_NDRANGE_5_GLOBALSIZE_Z…  in A5XX_HLSQ_CS_NDRANGE_5_GLOBALSIZE_Z()
4893 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_6_GLOBALOFF_Z(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_6_GLOBALOFF_Z()  argument
4895 …return ((val) << A5XX_HLSQ_CS_NDRANGE_6_GLOBALOFF_Z__SHIFT) & A5XX_HLSQ_CS_NDRANGE_6_GLOBALOFF_Z__…  in A5XX_HLSQ_CS_NDRANGE_6_GLOBALOFF_Z()
4901 static inline uint32_t A5XX_HLSQ_CS_CNTL_0_WGIDCONSTID(uint32_t val)  in A5XX_HLSQ_CS_CNTL_0_WGIDCONSTID()  argument
4903 	return ((val) << A5XX_HLSQ_CS_CNTL_0_WGIDCONSTID__SHIFT) & A5XX_HLSQ_CS_CNTL_0_WGIDCONSTID__MASK;  in A5XX_HLSQ_CS_CNTL_0_WGIDCONSTID()
4907 static inline uint32_t A5XX_HLSQ_CS_CNTL_0_UNK0(uint32_t val)  in A5XX_HLSQ_CS_CNTL_0_UNK0()  argument
4909 	return ((val) << A5XX_HLSQ_CS_CNTL_0_UNK0__SHIFT) & A5XX_HLSQ_CS_CNTL_0_UNK0__MASK;  in A5XX_HLSQ_CS_CNTL_0_UNK0()
4913 static inline uint32_t A5XX_HLSQ_CS_CNTL_0_UNK1(uint32_t val)  in A5XX_HLSQ_CS_CNTL_0_UNK1()  argument
4915 	return ((val) << A5XX_HLSQ_CS_CNTL_0_UNK1__SHIFT) & A5XX_HLSQ_CS_CNTL_0_UNK1__MASK;  in A5XX_HLSQ_CS_CNTL_0_UNK1()
4919 static inline uint32_t A5XX_HLSQ_CS_CNTL_0_LOCALIDREGID(uint32_t val)  in A5XX_HLSQ_CS_CNTL_0_LOCALIDREGID()  argument
4921 	return ((val) << A5XX_HLSQ_CS_CNTL_0_LOCALIDREGID__SHIFT) & A5XX_HLSQ_CS_CNTL_0_LOCALIDREGID__MASK;  in A5XX_HLSQ_CS_CNTL_0_LOCALIDREGID()
4975 static inline uint32_t A5XX_RB_2D_SRC_INFO_COLOR_FORMAT(enum a5xx_color_fmt val)  in A5XX_RB_2D_SRC_INFO_COLOR_FORMAT()  argument
4977 	return ((val) << A5XX_RB_2D_SRC_INFO_COLOR_FORMAT__SHIFT) & A5XX_RB_2D_SRC_INFO_COLOR_FORMAT__MASK;  in A5XX_RB_2D_SRC_INFO_COLOR_FORMAT()
4981 static inline uint32_t A5XX_RB_2D_SRC_INFO_TILE_MODE(enum a5xx_tile_mode val)  in A5XX_RB_2D_SRC_INFO_TILE_MODE()  argument
4983 	return ((val) << A5XX_RB_2D_SRC_INFO_TILE_MODE__SHIFT) & A5XX_RB_2D_SRC_INFO_TILE_MODE__MASK;  in A5XX_RB_2D_SRC_INFO_TILE_MODE()
4987 static inline uint32_t A5XX_RB_2D_SRC_INFO_COLOR_SWAP(enum a3xx_color_swap val)  in A5XX_RB_2D_SRC_INFO_COLOR_SWAP()  argument
4989 	return ((val) << A5XX_RB_2D_SRC_INFO_COLOR_SWAP__SHIFT) & A5XX_RB_2D_SRC_INFO_COLOR_SWAP__MASK;  in A5XX_RB_2D_SRC_INFO_COLOR_SWAP()
5000 static inline uint32_t A5XX_RB_2D_SRC_SIZE_PITCH(uint32_t val)  in A5XX_RB_2D_SRC_SIZE_PITCH()  argument
5002 	return ((val >> 6) << A5XX_RB_2D_SRC_SIZE_PITCH__SHIFT) & A5XX_RB_2D_SRC_SIZE_PITCH__MASK;  in A5XX_RB_2D_SRC_SIZE_PITCH()
5006 static inline uint32_t A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH(uint32_t val)  in A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH()  argument
5008 …return ((val >> 6) << A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH__SHIFT) & A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH__M…  in A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH()
5014 static inline uint32_t A5XX_RB_2D_DST_INFO_COLOR_FORMAT(enum a5xx_color_fmt val)  in A5XX_RB_2D_DST_INFO_COLOR_FORMAT()  argument
5016 	return ((val) << A5XX_RB_2D_DST_INFO_COLOR_FORMAT__SHIFT) & A5XX_RB_2D_DST_INFO_COLOR_FORMAT__MASK;  in A5XX_RB_2D_DST_INFO_COLOR_FORMAT()
5020 static inline uint32_t A5XX_RB_2D_DST_INFO_TILE_MODE(enum a5xx_tile_mode val)  in A5XX_RB_2D_DST_INFO_TILE_MODE()  argument
5022 	return ((val) << A5XX_RB_2D_DST_INFO_TILE_MODE__SHIFT) & A5XX_RB_2D_DST_INFO_TILE_MODE__MASK;  in A5XX_RB_2D_DST_INFO_TILE_MODE()
5026 static inline uint32_t A5XX_RB_2D_DST_INFO_COLOR_SWAP(enum a3xx_color_swap val)  in A5XX_RB_2D_DST_INFO_COLOR_SWAP()  argument
5028 	return ((val) << A5XX_RB_2D_DST_INFO_COLOR_SWAP__SHIFT) & A5XX_RB_2D_DST_INFO_COLOR_SWAP__MASK;  in A5XX_RB_2D_DST_INFO_COLOR_SWAP()
5039 static inline uint32_t A5XX_RB_2D_DST_SIZE_PITCH(uint32_t val)  in A5XX_RB_2D_DST_SIZE_PITCH()  argument
5041 	return ((val >> 6) << A5XX_RB_2D_DST_SIZE_PITCH__SHIFT) & A5XX_RB_2D_DST_SIZE_PITCH__MASK;  in A5XX_RB_2D_DST_SIZE_PITCH()
5045 static inline uint32_t A5XX_RB_2D_DST_SIZE_ARRAY_PITCH(uint32_t val)  in A5XX_RB_2D_DST_SIZE_ARRAY_PITCH()  argument
5047 …return ((val >> 6) << A5XX_RB_2D_DST_SIZE_ARRAY_PITCH__SHIFT) & A5XX_RB_2D_DST_SIZE_ARRAY_PITCH__M…  in A5XX_RB_2D_DST_SIZE_ARRAY_PITCH()
5057 static inline uint32_t A5XX_RB_2D_SRC_FLAGS_PITCH(uint32_t val)  in A5XX_RB_2D_SRC_FLAGS_PITCH()  argument
5059 	return ((val >> 6) << A5XX_RB_2D_SRC_FLAGS_PITCH__SHIFT) & A5XX_RB_2D_SRC_FLAGS_PITCH__MASK;  in A5XX_RB_2D_SRC_FLAGS_PITCH()
5069 static inline uint32_t A5XX_RB_2D_DST_FLAGS_PITCH(uint32_t val)  in A5XX_RB_2D_DST_FLAGS_PITCH()  argument
5071 	return ((val >> 6) << A5XX_RB_2D_DST_FLAGS_PITCH__SHIFT) & A5XX_RB_2D_DST_FLAGS_PITCH__MASK;  in A5XX_RB_2D_DST_FLAGS_PITCH()
5079 static inline uint32_t A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT(enum a5xx_color_fmt val)  in A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT()  argument
5081 …return ((val) << A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT__SHIFT) & A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT__…  in A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT()
5085 static inline uint32_t A5XX_GRAS_2D_SRC_INFO_TILE_MODE(enum a5xx_tile_mode val)  in A5XX_GRAS_2D_SRC_INFO_TILE_MODE()  argument
5087 	return ((val) << A5XX_GRAS_2D_SRC_INFO_TILE_MODE__SHIFT) & A5XX_GRAS_2D_SRC_INFO_TILE_MODE__MASK;  in A5XX_GRAS_2D_SRC_INFO_TILE_MODE()
5091 static inline uint32_t A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP(enum a3xx_color_swap val)  in A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP()  argument
5093 	return ((val) << A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP__SHIFT) & A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP__MASK;  in A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP()
5100 static inline uint32_t A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT(enum a5xx_color_fmt val)  in A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT()  argument
5102 …return ((val) << A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT__SHIFT) & A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT__…  in A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT()
5106 static inline uint32_t A5XX_GRAS_2D_DST_INFO_TILE_MODE(enum a5xx_tile_mode val)  in A5XX_GRAS_2D_DST_INFO_TILE_MODE()  argument
5108 	return ((val) << A5XX_GRAS_2D_DST_INFO_TILE_MODE__SHIFT) & A5XX_GRAS_2D_DST_INFO_TILE_MODE__MASK;  in A5XX_GRAS_2D_DST_INFO_TILE_MODE()
5112 static inline uint32_t A5XX_GRAS_2D_DST_INFO_COLOR_SWAP(enum a3xx_color_swap val)  in A5XX_GRAS_2D_DST_INFO_COLOR_SWAP()  argument
5114 	return ((val) << A5XX_GRAS_2D_DST_INFO_COLOR_SWAP__SHIFT) & A5XX_GRAS_2D_DST_INFO_COLOR_SWAP__MASK;  in A5XX_GRAS_2D_DST_INFO_COLOR_SWAP()
5128 static inline uint32_t A5XX_TEX_SAMP_0_XY_MAG(enum a5xx_tex_filter val)  in A5XX_TEX_SAMP_0_XY_MAG()  argument
5130 	return ((val) << A5XX_TEX_SAMP_0_XY_MAG__SHIFT) & A5XX_TEX_SAMP_0_XY_MAG__MASK;  in A5XX_TEX_SAMP_0_XY_MAG()
5134 static inline uint32_t A5XX_TEX_SAMP_0_XY_MIN(enum a5xx_tex_filter val)  in A5XX_TEX_SAMP_0_XY_MIN()  argument
5136 	return ((val) << A5XX_TEX_SAMP_0_XY_MIN__SHIFT) & A5XX_TEX_SAMP_0_XY_MIN__MASK;  in A5XX_TEX_SAMP_0_XY_MIN()
5140 static inline uint32_t A5XX_TEX_SAMP_0_WRAP_S(enum a5xx_tex_clamp val)  in A5XX_TEX_SAMP_0_WRAP_S()  argument
5142 	return ((val) << A5XX_TEX_SAMP_0_WRAP_S__SHIFT) & A5XX_TEX_SAMP_0_WRAP_S__MASK;  in A5XX_TEX_SAMP_0_WRAP_S()
5146 static inline uint32_t A5XX_TEX_SAMP_0_WRAP_T(enum a5xx_tex_clamp val)  in A5XX_TEX_SAMP_0_WRAP_T()  argument
5148 	return ((val) << A5XX_TEX_SAMP_0_WRAP_T__SHIFT) & A5XX_TEX_SAMP_0_WRAP_T__MASK;  in A5XX_TEX_SAMP_0_WRAP_T()
5152 static inline uint32_t A5XX_TEX_SAMP_0_WRAP_R(enum a5xx_tex_clamp val)  in A5XX_TEX_SAMP_0_WRAP_R()  argument
5154 	return ((val) << A5XX_TEX_SAMP_0_WRAP_R__SHIFT) & A5XX_TEX_SAMP_0_WRAP_R__MASK;  in A5XX_TEX_SAMP_0_WRAP_R()
5158 static inline uint32_t A5XX_TEX_SAMP_0_ANISO(enum a5xx_tex_aniso val)  in A5XX_TEX_SAMP_0_ANISO()  argument
5160 	return ((val) << A5XX_TEX_SAMP_0_ANISO__SHIFT) & A5XX_TEX_SAMP_0_ANISO__MASK;  in A5XX_TEX_SAMP_0_ANISO()
5164 static inline uint32_t A5XX_TEX_SAMP_0_LOD_BIAS(float val)  in A5XX_TEX_SAMP_0_LOD_BIAS()  argument
5166 …return ((((int32_t)(val * 256.0))) << A5XX_TEX_SAMP_0_LOD_BIAS__SHIFT) & A5XX_TEX_SAMP_0_LOD_BIAS_…  in A5XX_TEX_SAMP_0_LOD_BIAS()
5172 static inline uint32_t A5XX_TEX_SAMP_1_COMPARE_FUNC(enum adreno_compare_func val)  in A5XX_TEX_SAMP_1_COMPARE_FUNC()  argument
5174 	return ((val) << A5XX_TEX_SAMP_1_COMPARE_FUNC__SHIFT) & A5XX_TEX_SAMP_1_COMPARE_FUNC__MASK;  in A5XX_TEX_SAMP_1_COMPARE_FUNC()
5181 static inline uint32_t A5XX_TEX_SAMP_1_MAX_LOD(float val)  in A5XX_TEX_SAMP_1_MAX_LOD()  argument
5183 …return ((((uint32_t)(val * 256.0))) << A5XX_TEX_SAMP_1_MAX_LOD__SHIFT) & A5XX_TEX_SAMP_1_MAX_LOD__…  in A5XX_TEX_SAMP_1_MAX_LOD()
5187 static inline uint32_t A5XX_TEX_SAMP_1_MIN_LOD(float val)  in A5XX_TEX_SAMP_1_MIN_LOD()  argument
5189 …return ((((uint32_t)(val * 256.0))) << A5XX_TEX_SAMP_1_MIN_LOD__SHIFT) & A5XX_TEX_SAMP_1_MIN_LOD__…  in A5XX_TEX_SAMP_1_MIN_LOD()
5195 static inline uint32_t A5XX_TEX_SAMP_2_BCOLOR_OFFSET(uint32_t val)  in A5XX_TEX_SAMP_2_BCOLOR_OFFSET()  argument
5197 	return ((val) << A5XX_TEX_SAMP_2_BCOLOR_OFFSET__SHIFT) & A5XX_TEX_SAMP_2_BCOLOR_OFFSET__MASK;  in A5XX_TEX_SAMP_2_BCOLOR_OFFSET()
5205 static inline uint32_t A5XX_TEX_CONST_0_TILE_MODE(enum a5xx_tile_mode val)  in A5XX_TEX_CONST_0_TILE_MODE()  argument
5207 	return ((val) << A5XX_TEX_CONST_0_TILE_MODE__SHIFT) & A5XX_TEX_CONST_0_TILE_MODE__MASK;  in A5XX_TEX_CONST_0_TILE_MODE()
5212 static inline uint32_t A5XX_TEX_CONST_0_SWIZ_X(enum a5xx_tex_swiz val)  in A5XX_TEX_CONST_0_SWIZ_X()  argument
5214 	return ((val) << A5XX_TEX_CONST_0_SWIZ_X__SHIFT) & A5XX_TEX_CONST_0_SWIZ_X__MASK;  in A5XX_TEX_CONST_0_SWIZ_X()
5218 static inline uint32_t A5XX_TEX_CONST_0_SWIZ_Y(enum a5xx_tex_swiz val)  in A5XX_TEX_CONST_0_SWIZ_Y()  argument
5220 	return ((val) << A5XX_TEX_CONST_0_SWIZ_Y__SHIFT) & A5XX_TEX_CONST_0_SWIZ_Y__MASK;  in A5XX_TEX_CONST_0_SWIZ_Y()
5224 static inline uint32_t A5XX_TEX_CONST_0_SWIZ_Z(enum a5xx_tex_swiz val)  in A5XX_TEX_CONST_0_SWIZ_Z()  argument
5226 	return ((val) << A5XX_TEX_CONST_0_SWIZ_Z__SHIFT) & A5XX_TEX_CONST_0_SWIZ_Z__MASK;  in A5XX_TEX_CONST_0_SWIZ_Z()
5230 static inline uint32_t A5XX_TEX_CONST_0_SWIZ_W(enum a5xx_tex_swiz val)  in A5XX_TEX_CONST_0_SWIZ_W()  argument
5232 	return ((val) << A5XX_TEX_CONST_0_SWIZ_W__SHIFT) & A5XX_TEX_CONST_0_SWIZ_W__MASK;  in A5XX_TEX_CONST_0_SWIZ_W()
5236 static inline uint32_t A5XX_TEX_CONST_0_MIPLVLS(uint32_t val)  in A5XX_TEX_CONST_0_MIPLVLS()  argument
5238 	return ((val) << A5XX_TEX_CONST_0_MIPLVLS__SHIFT) & A5XX_TEX_CONST_0_MIPLVLS__MASK;  in A5XX_TEX_CONST_0_MIPLVLS()
5242 static inline uint32_t A5XX_TEX_CONST_0_SAMPLES(enum a3xx_msaa_samples val)  in A5XX_TEX_CONST_0_SAMPLES()  argument
5244 	return ((val) << A5XX_TEX_CONST_0_SAMPLES__SHIFT) & A5XX_TEX_CONST_0_SAMPLES__MASK;  in A5XX_TEX_CONST_0_SAMPLES()
5248 static inline uint32_t A5XX_TEX_CONST_0_FMT(enum a5xx_tex_fmt val)  in A5XX_TEX_CONST_0_FMT()  argument
5250 	return ((val) << A5XX_TEX_CONST_0_FMT__SHIFT) & A5XX_TEX_CONST_0_FMT__MASK;  in A5XX_TEX_CONST_0_FMT()
5254 static inline uint32_t A5XX_TEX_CONST_0_SWAP(enum a3xx_color_swap val)  in A5XX_TEX_CONST_0_SWAP()  argument
5256 	return ((val) << A5XX_TEX_CONST_0_SWAP__SHIFT) & A5XX_TEX_CONST_0_SWAP__MASK;  in A5XX_TEX_CONST_0_SWAP()
5262 static inline uint32_t A5XX_TEX_CONST_1_WIDTH(uint32_t val)  in A5XX_TEX_CONST_1_WIDTH()  argument
5264 	return ((val) << A5XX_TEX_CONST_1_WIDTH__SHIFT) & A5XX_TEX_CONST_1_WIDTH__MASK;  in A5XX_TEX_CONST_1_WIDTH()
5268 static inline uint32_t A5XX_TEX_CONST_1_HEIGHT(uint32_t val)  in A5XX_TEX_CONST_1_HEIGHT()  argument
5270 	return ((val) << A5XX_TEX_CONST_1_HEIGHT__SHIFT) & A5XX_TEX_CONST_1_HEIGHT__MASK;  in A5XX_TEX_CONST_1_HEIGHT()
5276 static inline uint32_t A5XX_TEX_CONST_2_PITCHALIGN(uint32_t val)  in A5XX_TEX_CONST_2_PITCHALIGN()  argument
5278 	return ((val) << A5XX_TEX_CONST_2_PITCHALIGN__SHIFT) & A5XX_TEX_CONST_2_PITCHALIGN__MASK;  in A5XX_TEX_CONST_2_PITCHALIGN()
5282 static inline uint32_t A5XX_TEX_CONST_2_PITCH(uint32_t val)  in A5XX_TEX_CONST_2_PITCH()  argument
5284 	return ((val) << A5XX_TEX_CONST_2_PITCH__SHIFT) & A5XX_TEX_CONST_2_PITCH__MASK;  in A5XX_TEX_CONST_2_PITCH()
5288 static inline uint32_t A5XX_TEX_CONST_2_TYPE(enum a5xx_tex_type val)  in A5XX_TEX_CONST_2_TYPE()  argument
5290 	return ((val) << A5XX_TEX_CONST_2_TYPE__SHIFT) & A5XX_TEX_CONST_2_TYPE__MASK;  in A5XX_TEX_CONST_2_TYPE()
5296 static inline uint32_t A5XX_TEX_CONST_3_ARRAY_PITCH(uint32_t val)  in A5XX_TEX_CONST_3_ARRAY_PITCH()  argument
5298 	return ((val >> 12) << A5XX_TEX_CONST_3_ARRAY_PITCH__SHIFT) & A5XX_TEX_CONST_3_ARRAY_PITCH__MASK;  in A5XX_TEX_CONST_3_ARRAY_PITCH()
5302 static inline uint32_t A5XX_TEX_CONST_3_MIN_LAYERSZ(uint32_t val)  in A5XX_TEX_CONST_3_MIN_LAYERSZ()  argument
5304 	return ((val >> 12) << A5XX_TEX_CONST_3_MIN_LAYERSZ__SHIFT) & A5XX_TEX_CONST_3_MIN_LAYERSZ__MASK;  in A5XX_TEX_CONST_3_MIN_LAYERSZ()
5312 static inline uint32_t A5XX_TEX_CONST_4_BASE_LO(uint32_t val)  in A5XX_TEX_CONST_4_BASE_LO()  argument
5314 	return ((val >> 5) << A5XX_TEX_CONST_4_BASE_LO__SHIFT) & A5XX_TEX_CONST_4_BASE_LO__MASK;  in A5XX_TEX_CONST_4_BASE_LO()
5320 static inline uint32_t A5XX_TEX_CONST_5_BASE_HI(uint32_t val)  in A5XX_TEX_CONST_5_BASE_HI()  argument
5322 	return ((val) << A5XX_TEX_CONST_5_BASE_HI__SHIFT) & A5XX_TEX_CONST_5_BASE_HI__MASK;  in A5XX_TEX_CONST_5_BASE_HI()
5326 static inline uint32_t A5XX_TEX_CONST_5_DEPTH(uint32_t val)  in A5XX_TEX_CONST_5_DEPTH()  argument
5328 	return ((val) << A5XX_TEX_CONST_5_DEPTH__SHIFT) & A5XX_TEX_CONST_5_DEPTH__MASK;  in A5XX_TEX_CONST_5_DEPTH()
5346 static inline uint32_t A5XX_SSBO_0_0_BASE_LO(uint32_t val)  in A5XX_SSBO_0_0_BASE_LO()  argument
5348 	return ((val >> 5) << A5XX_SSBO_0_0_BASE_LO__SHIFT) & A5XX_SSBO_0_0_BASE_LO__MASK;  in A5XX_SSBO_0_0_BASE_LO()
5354 static inline uint32_t A5XX_SSBO_0_1_PITCH(uint32_t val)  in A5XX_SSBO_0_1_PITCH()  argument
5356 	return ((val) << A5XX_SSBO_0_1_PITCH__SHIFT) & A5XX_SSBO_0_1_PITCH__MASK;  in A5XX_SSBO_0_1_PITCH()
5362 static inline uint32_t A5XX_SSBO_0_2_ARRAY_PITCH(uint32_t val)  in A5XX_SSBO_0_2_ARRAY_PITCH()  argument
5364 	return ((val >> 12) << A5XX_SSBO_0_2_ARRAY_PITCH__SHIFT) & A5XX_SSBO_0_2_ARRAY_PITCH__MASK;  in A5XX_SSBO_0_2_ARRAY_PITCH()
5370 static inline uint32_t A5XX_SSBO_0_3_CPP(uint32_t val)  in A5XX_SSBO_0_3_CPP()  argument
5372 	return ((val) << A5XX_SSBO_0_3_CPP__SHIFT) & A5XX_SSBO_0_3_CPP__MASK;  in A5XX_SSBO_0_3_CPP()
5378 static inline uint32_t A5XX_SSBO_1_0_FMT(enum a5xx_tex_fmt val)  in A5XX_SSBO_1_0_FMT()  argument
5380 	return ((val) << A5XX_SSBO_1_0_FMT__SHIFT) & A5XX_SSBO_1_0_FMT__MASK;  in A5XX_SSBO_1_0_FMT()
5384 static inline uint32_t A5XX_SSBO_1_0_WIDTH(uint32_t val)  in A5XX_SSBO_1_0_WIDTH()  argument
5386 	return ((val) << A5XX_SSBO_1_0_WIDTH__SHIFT) & A5XX_SSBO_1_0_WIDTH__MASK;  in A5XX_SSBO_1_0_WIDTH()
5392 static inline uint32_t A5XX_SSBO_1_1_HEIGHT(uint32_t val)  in A5XX_SSBO_1_1_HEIGHT()  argument
5394 	return ((val) << A5XX_SSBO_1_1_HEIGHT__SHIFT) & A5XX_SSBO_1_1_HEIGHT__MASK;  in A5XX_SSBO_1_1_HEIGHT()
5398 static inline uint32_t A5XX_SSBO_1_1_DEPTH(uint32_t val)  in A5XX_SSBO_1_1_DEPTH()  argument
5400 	return ((val) << A5XX_SSBO_1_1_DEPTH__SHIFT) & A5XX_SSBO_1_1_DEPTH__MASK;  in A5XX_SSBO_1_1_DEPTH()
5406 static inline uint32_t A5XX_SSBO_2_0_BASE_LO(uint32_t val)  in A5XX_SSBO_2_0_BASE_LO()  argument
5408 	return ((val) << A5XX_SSBO_2_0_BASE_LO__SHIFT) & A5XX_SSBO_2_0_BASE_LO__MASK;  in A5XX_SSBO_2_0_BASE_LO()
5414 static inline uint32_t A5XX_SSBO_2_1_BASE_HI(uint32_t val)  in A5XX_SSBO_2_1_BASE_HI()  argument
5416 	return ((val) << A5XX_SSBO_2_1_BASE_HI__SHIFT) & A5XX_SSBO_2_1_BASE_HI__MASK;  in A5XX_SSBO_2_1_BASE_HI()
5422 static inline uint32_t A5XX_UBO_0_BASE_LO(uint32_t val)  in A5XX_UBO_0_BASE_LO()  argument
5424 	return ((val) << A5XX_UBO_0_BASE_LO__SHIFT) & A5XX_UBO_0_BASE_LO__MASK;  in A5XX_UBO_0_BASE_LO()
5430 static inline uint32_t A5XX_UBO_1_BASE_HI(uint32_t val)  in A5XX_UBO_1_BASE_HI()  argument
5432 	return ((val) << A5XX_UBO_1_BASE_HI__SHIFT) & A5XX_UBO_1_BASE_HI__MASK;  in A5XX_UBO_1_BASE_HI()