64 	struct clk *lcd_clk, *pix_clk;  member
282 	rate = clk_round_rate(priv->pix_clk, mode->clock * 1000);  in ingenic_drm_crtc_mode_valid()
323 		clk_set_rate(priv->pix_clk, state->adjusted_mode.clock * 1000);  in ingenic_drm_crtc_atomic_flush()
802 	priv->pix_clk = devm_clk_get(dev, "lcd_pclk");  in ingenic_drm_bind()
803 	if (IS_ERR(priv->pix_clk)) {  in ingenic_drm_bind()
805 		return PTR_ERR(priv->pix_clk);  in ingenic_drm_bind()
948 	ret = clk_prepare_enable(priv->pix_clk);  in ingenic_drm_bind()
987 	parent_clk = clk_get_parent(priv->pix_clk);  in ingenic_drm_bind()
1010 	clk_disable_unprepare(priv->pix_clk);  in ingenic_drm_bind()
1027 	struct clk *parent_clk = clk_get_parent(priv->pix_clk);  in ingenic_drm_unbind()
1032 	clk_disable_unprepare(priv->pix_clk);  in ingenic_drm_unbind()