182 	u32 reg;  member
189 static __always_inline u32 i915_mmio_reg_offset(i915_reg_t reg)  in i915_mmio_reg_offset()
199 static inline bool i915_mmio_reg_valid(i915_reg_t reg)  in i915_mmio_reg_valid()
251 #define _MMIO_PIPE2(pipe, reg)		_MMIO(INTEL_INFO(dev_priv)->pipe_offsets[pipe] - \  argument
254 #define _TRANS2(tran, reg)		(INTEL_INFO(dev_priv)->trans_offsets[(tran)] - \  argument
257 #define _MMIO_TRANS2(tran, reg)		_MMIO(_TRANS2(tran, reg))  argument
258 #define _CURSOR2(pipe, reg)		_MMIO(INTEL_INFO(dev_priv)->cursor_offsets[(pipe)] - \  argument
1739 #define _BXT_PHY(phy, reg)						\  argument
4450 #define _PSR_ADJ(tran, reg)			(_TRANS2(tran, reg) - dev_priv->hsw_psr_mmio_adjust)  argument
4999 #define _MMIO_PPS(pps_idx, reg)		_MMIO(dev_priv->pps_mmio_base -	\  argument
6856 #define _MMIO_CHV_SPCSC(plane_id, reg) \  argument
9326 #define GEN7_PARITY_ERROR_ROW(reg) \  argument
9328 #define GEN7_PARITY_ERROR_BANK(reg) \  argument
9330 #define GEN7_PARITY_ERROR_SUBBANK(reg) \  argument