Lines Matching refs:iir
204 i915_reg_t iir, i915_reg_t ier) in gen3_irq_reset() argument
212 intel_uncore_write(uncore, iir, 0xffffffff); in gen3_irq_reset()
213 intel_uncore_posting_read(uncore, iir); in gen3_irq_reset()
214 intel_uncore_write(uncore, iir, 0xffffffff); in gen3_irq_reset()
215 intel_uncore_posting_read(uncore, iir); in gen3_irq_reset()
270 i915_reg_t iir) in gen3_irq_init() argument
272 gen3_assert_iir_is_zero(uncore, iir); in gen3_irq_init()
1304 u32 iir, u32 pipe_stats[I915_MAX_PIPES]) in i9xx_pipestat_irq_ack() argument
1342 if (iir & iir_bit) in i9xx_pipestat_irq_ack()
1370 u16 iir, u32 pipe_stats[I915_MAX_PIPES]) in i8xx_pipestat_irq_handler() argument
1387 u32 iir, u32 pipe_stats[I915_MAX_PIPES]) in i915_pipestat_irq_handler() argument
1406 if (blc_event || (iir & I915_ASLE_INTERRUPT)) in i915_pipestat_irq_handler()
1411 u32 iir, u32 pipe_stats[I915_MAX_PIPES]) in i965_pipestat_irq_handler() argument
1430 if (blc_event || (iir & I915_ASLE_INTERRUPT)) in i965_pipestat_irq_handler()
1534 u32 iir, gt_iir, pm_iir; in valleyview_irq_handler() local
1541 iir = I915_READ(VLV_IIR); in valleyview_irq_handler()
1543 if (gt_iir == 0 && pm_iir == 0 && iir == 0) in valleyview_irq_handler()
1570 if (iir & I915_DISPLAY_PORT_INTERRUPT) in valleyview_irq_handler()
1575 i9xx_pipestat_irq_ack(dev_priv, iir, pipe_stats); in valleyview_irq_handler()
1577 if (iir & (I915_LPE_PIPE_A_INTERRUPT | in valleyview_irq_handler()
1585 if (iir) in valleyview_irq_handler()
1586 I915_WRITE(VLV_IIR, iir); in valleyview_irq_handler()
1619 u32 master_ctl, iir; in cherryview_irq_handler() local
1625 iir = I915_READ(VLV_IIR); in cherryview_irq_handler()
1627 if (master_ctl == 0 && iir == 0) in cherryview_irq_handler()
1651 if (iir & I915_DISPLAY_PORT_INTERRUPT) in cherryview_irq_handler()
1656 i9xx_pipestat_irq_ack(dev_priv, iir, pipe_stats); in cherryview_irq_handler()
1658 if (iir & (I915_LPE_PIPE_A_INTERRUPT | in cherryview_irq_handler()
1667 if (iir) in cherryview_irq_handler()
1668 I915_WRITE(VLV_IIR, iir); in cherryview_irq_handler()
2128 static void gen11_hpd_irq_handler(struct drm_i915_private *dev_priv, u32 iir) in gen11_hpd_irq_handler() argument
2131 u32 trigger_tc = iir & GEN11_DE_TC_HOTPLUG_MASK; in gen11_hpd_irq_handler()
2132 u32 trigger_tbt = iir & GEN11_DE_TBT_HOTPLUG_MASK; in gen11_hpd_irq_handler()
2162 "Unexpected DE HPD interrupt 0x%08x\n", iir); in gen11_hpd_irq_handler()
2209 gen8_de_misc_irq_handler(struct drm_i915_private *dev_priv, u32 iir) in gen8_de_misc_irq_handler() argument
2213 if (iir & GEN8_DE_MISC_GSE) { in gen8_de_misc_irq_handler()
2218 if (iir & GEN8_DE_EDP_PSR) { in gen8_de_misc_irq_handler()
2244 u32 iir; in gen8_de_irq_handler() local
2248 iir = I915_READ(GEN8_DE_MISC_IIR); in gen8_de_irq_handler()
2249 if (iir) { in gen8_de_irq_handler()
2250 I915_WRITE(GEN8_DE_MISC_IIR, iir); in gen8_de_irq_handler()
2252 gen8_de_misc_irq_handler(dev_priv, iir); in gen8_de_irq_handler()
2260 iir = I915_READ(GEN11_DE_HPD_IIR); in gen8_de_irq_handler()
2261 if (iir) { in gen8_de_irq_handler()
2262 I915_WRITE(GEN11_DE_HPD_IIR, iir); in gen8_de_irq_handler()
2264 gen11_hpd_irq_handler(dev_priv, iir); in gen8_de_irq_handler()
2272 iir = I915_READ(GEN8_DE_PORT_IIR); in gen8_de_irq_handler()
2273 if (iir) { in gen8_de_irq_handler()
2277 I915_WRITE(GEN8_DE_PORT_IIR, iir); in gen8_de_irq_handler()
2280 if (iir & gen8_de_port_aux_mask(dev_priv)) { in gen8_de_irq_handler()
2286 tmp_mask = iir & BXT_DE_PORT_HOTPLUG_MASK; in gen8_de_irq_handler()
2292 tmp_mask = iir & GEN8_PORT_DP_A_HOTPLUG; in gen8_de_irq_handler()
2299 if (IS_GEN9_LP(dev_priv) && (iir & BXT_DE_PORT_GMBUS)) { in gen8_de_irq_handler()
2319 iir = I915_READ(GEN8_DE_PIPE_IIR(pipe)); in gen8_de_irq_handler()
2320 if (!iir) { in gen8_de_irq_handler()
2327 I915_WRITE(GEN8_DE_PIPE_IIR(pipe), iir); in gen8_de_irq_handler()
2329 if (iir & GEN8_PIPE_VBLANK) in gen8_de_irq_handler()
2332 if (iir & GEN8_PIPE_CDCLK_CRC_DONE) in gen8_de_irq_handler()
2335 if (iir & GEN8_PIPE_FIFO_UNDERRUN) in gen8_de_irq_handler()
2338 fault_errors = iir & gen8_de_pipe_fault_mask(dev_priv); in gen8_de_irq_handler()
2353 iir = I915_READ(SDEIIR); in gen8_de_irq_handler()
2354 if (iir) { in gen8_de_irq_handler()
2355 I915_WRITE(SDEIIR, iir); in gen8_de_irq_handler()
2359 icp_irq_handler(dev_priv, iir); in gen8_de_irq_handler()
2361 spt_irq_handler(dev_priv, iir); in gen8_de_irq_handler()
2363 cpt_irq_handler(dev_priv, iir); in gen8_de_irq_handler()
2429 u32 iir; in gen11_gu_misc_irq_ack() local
2434 iir = raw_reg_read(regs, GEN11_GU_MISC_IIR); in gen11_gu_misc_irq_ack()
2435 if (likely(iir)) in gen11_gu_misc_irq_ack()
2436 raw_reg_write(regs, GEN11_GU_MISC_IIR, iir); in gen11_gu_misc_irq_ack()
2438 return iir; in gen11_gu_misc_irq_ack()
2442 gen11_gu_misc_irq_handler(struct intel_gt *gt, const u32 iir) in gen11_gu_misc_irq_handler() argument
2444 if (iir & GEN11_GU_MISC_GSE) in gen11_gu_misc_irq_handler()
3665 u16 iir; in i8xx_irq_handler() local
3667 iir = intel_uncore_read16(&dev_priv->uncore, GEN2_IIR); in i8xx_irq_handler()
3668 if (iir == 0) in i8xx_irq_handler()
3675 i9xx_pipestat_irq_ack(dev_priv, iir, pipe_stats); in i8xx_irq_handler()
3677 if (iir & I915_MASTER_ERROR_INTERRUPT) in i8xx_irq_handler()
3680 intel_uncore_write16(&dev_priv->uncore, GEN2_IIR, iir); in i8xx_irq_handler()
3682 if (iir & I915_USER_INTERRUPT) in i8xx_irq_handler()
3685 if (iir & I915_MASTER_ERROR_INTERRUPT) in i8xx_irq_handler()
3688 i8xx_pipestat_irq_handler(dev_priv, iir, pipe_stats); in i8xx_irq_handler()
3766 u32 iir; in i915_irq_handler() local
3768 iir = I915_READ(GEN2_IIR); in i915_irq_handler()
3769 if (iir == 0) in i915_irq_handler()
3775 iir & I915_DISPLAY_PORT_INTERRUPT) in i915_irq_handler()
3780 i9xx_pipestat_irq_ack(dev_priv, iir, pipe_stats); in i915_irq_handler()
3782 if (iir & I915_MASTER_ERROR_INTERRUPT) in i915_irq_handler()
3785 I915_WRITE(GEN2_IIR, iir); in i915_irq_handler()
3787 if (iir & I915_USER_INTERRUPT) in i915_irq_handler()
3790 if (iir & I915_MASTER_ERROR_INTERRUPT) in i915_irq_handler()
3796 i915_pipestat_irq_handler(dev_priv, iir, pipe_stats); in i915_irq_handler()
3909 u32 iir; in i965_irq_handler() local
3911 iir = I915_READ(GEN2_IIR); in i965_irq_handler()
3912 if (iir == 0) in i965_irq_handler()
3917 if (iir & I915_DISPLAY_PORT_INTERRUPT) in i965_irq_handler()
3922 i9xx_pipestat_irq_ack(dev_priv, iir, pipe_stats); in i965_irq_handler()
3924 if (iir & I915_MASTER_ERROR_INTERRUPT) in i965_irq_handler()
3927 I915_WRITE(GEN2_IIR, iir); in i965_irq_handler()
3929 if (iir & I915_USER_INTERRUPT) in i965_irq_handler()
3932 if (iir & I915_BSD_USER_INTERRUPT) in i965_irq_handler()
3935 if (iir & I915_MASTER_ERROR_INTERRUPT) in i965_irq_handler()
3941 i965_pipestat_irq_handler(dev_priv, iir, pipe_stats); in i965_irq_handler()