49 static unsigned char edid_get_byte(struct intel_vgpu *vgpu)  in edid_get_byte()  argument
51 	struct intel_vgpu_i2c_edid *edid = &vgpu->display.i2c_edid;  in edid_get_byte()
68 	if (intel_vgpu_has_monitor_on_port(vgpu, edid->port)) {  in edid_get_byte()
70 			intel_vgpu_port(vgpu, edid->port)->edid;  in edid_get_byte()
126 static void reset_gmbus_controller(struct intel_vgpu *vgpu)  in reset_gmbus_controller()  argument
128 	vgpu_vreg_t(vgpu, PCH_GMBUS2) = GMBUS_HW_RDY;  in reset_gmbus_controller()
129 	if (!vgpu->display.i2c_edid.edid_available)  in reset_gmbus_controller()
130 		vgpu_vreg_t(vgpu, PCH_GMBUS2) |= GMBUS_SATOER;  in reset_gmbus_controller()
131 	vgpu->display.i2c_edid.gmbus.phase = GMBUS_IDLE_PHASE;  in reset_gmbus_controller()
135 static int gmbus0_mmio_write(struct intel_vgpu *vgpu,  in gmbus0_mmio_write()  argument
138 	struct drm_i915_private *i915 = vgpu->gvt->gt->i915;  in gmbus0_mmio_write()
141 	memcpy(&vgpu_vreg(vgpu, offset), p_data, bytes);  in gmbus0_mmio_write()
143 	pin_select = vgpu_vreg(vgpu, offset) & _GMBUS_PIN_SEL_MASK;  in gmbus0_mmio_write()
145 	intel_vgpu_init_i2c_edid(vgpu);  in gmbus0_mmio_write()
159 	vgpu->display.i2c_edid.state = I2C_GMBUS;  in gmbus0_mmio_write()
160 	vgpu->display.i2c_edid.gmbus.phase = GMBUS_IDLE_PHASE;  in gmbus0_mmio_write()
162 	vgpu_vreg_t(vgpu, PCH_GMBUS2) &= ~GMBUS_ACTIVE;  in gmbus0_mmio_write()
163 	vgpu_vreg_t(vgpu, PCH_GMBUS2) |= GMBUS_HW_RDY | GMBUS_HW_WAIT_PHASE;  in gmbus0_mmio_write()
165 	if (intel_vgpu_has_monitor_on_port(vgpu, port) &&  in gmbus0_mmio_write()
166 			!intel_vgpu_port_is_dp(vgpu, port)) {  in gmbus0_mmio_write()
167 		vgpu->display.i2c_edid.port = port;  in gmbus0_mmio_write()
168 		vgpu->display.i2c_edid.edid_available = true;  in gmbus0_mmio_write()
169 		vgpu_vreg_t(vgpu, PCH_GMBUS2) &= ~GMBUS_SATOER;  in gmbus0_mmio_write()
171 		vgpu_vreg_t(vgpu, PCH_GMBUS2) |= GMBUS_SATOER;  in gmbus0_mmio_write()
175 static int gmbus1_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,  in gmbus1_mmio_write()  argument
178 	struct intel_vgpu_i2c_edid *i2c_edid = &vgpu->display.i2c_edid;  in gmbus1_mmio_write()
182 	if (vgpu_vreg(vgpu, offset) & GMBUS_SW_CLR_INT) {  in gmbus1_mmio_write()
184 			vgpu_vreg(vgpu, offset) &= ~GMBUS_SW_CLR_INT;  in gmbus1_mmio_write()
185 			reset_gmbus_controller(vgpu);  in gmbus1_mmio_write()
198 			vgpu_vreg_t(vgpu, PCH_GMBUS2) &= ~GMBUS_INT;  in gmbus1_mmio_write()
199 			vgpu_vreg_t(vgpu, PCH_GMBUS2) |= GMBUS_HW_RDY;  in gmbus1_mmio_write()
219 					vgpu->id, slave_addr);  in gmbus1_mmio_write()
237 			if (gmbus1_bus_cycle(vgpu_vreg(vgpu, offset))  in gmbus1_mmio_write()
239 				intel_vgpu_init_i2c_edid(vgpu);  in gmbus1_mmio_write()
247 				vgpu_vreg_t(vgpu, PCH_GMBUS2) &= ~GMBUS_ACTIVE;  in gmbus1_mmio_write()
259 			vgpu_vreg_t(vgpu, PCH_GMBUS2) |= GMBUS_ACTIVE;  in gmbus1_mmio_write()
271 		vgpu_vreg(vgpu, offset) = wvalue;  in gmbus1_mmio_write()
276 static int gmbus3_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,  in gmbus3_mmio_write()  argument
279 	struct drm_i915_private *i915 = vgpu->gvt->gt->i915;  in gmbus3_mmio_write()
285 static int gmbus3_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,  in gmbus3_mmio_read()  argument
290 	struct intel_vgpu_i2c_edid *i2c_edid = &vgpu->display.i2c_edid;  in gmbus3_mmio_read()
297 	if (vgpu_vreg_t(vgpu, PCH_GMBUS1) & GMBUS_SLAVE_READ) {  in gmbus3_mmio_read()
299 			memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes);  in gmbus3_mmio_read()
306 			byte_data = edid_get_byte(vgpu);  in gmbus3_mmio_read()
310 		memcpy(&vgpu_vreg(vgpu, offset), &reg_data, byte_count);  in gmbus3_mmio_read()
311 		memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes);  in gmbus3_mmio_read()
325 			intel_vgpu_init_i2c_edid(vgpu);  in gmbus3_mmio_read()
332 		memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes);  in gmbus3_mmio_read()
338 static int gmbus2_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,  in gmbus2_mmio_read()  argument
341 	u32 value = vgpu_vreg(vgpu, offset);  in gmbus2_mmio_read()
343 	if (!(vgpu_vreg(vgpu, offset) & GMBUS_INUSE))  in gmbus2_mmio_read()
344 		vgpu_vreg(vgpu, offset) |= GMBUS_INUSE;  in gmbus2_mmio_read()
349 static int gmbus2_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,  in gmbus2_mmio_write()  argument
355 		vgpu_vreg(vgpu, offset) &= ~GMBUS_INUSE;  in gmbus2_mmio_write()
373 int intel_gvt_i2c_handle_gmbus_read(struct intel_vgpu *vgpu,  in intel_gvt_i2c_handle_gmbus_read()  argument
376 	struct drm_i915_private *i915 = vgpu->gvt->gt->i915;  in intel_gvt_i2c_handle_gmbus_read()
382 		return gmbus2_mmio_read(vgpu, offset, p_data, bytes);  in intel_gvt_i2c_handle_gmbus_read()
384 		return gmbus3_mmio_read(vgpu, offset, p_data, bytes);  in intel_gvt_i2c_handle_gmbus_read()
386 	memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes);  in intel_gvt_i2c_handle_gmbus_read()
403 int intel_gvt_i2c_handle_gmbus_write(struct intel_vgpu *vgpu,  in intel_gvt_i2c_handle_gmbus_write()  argument
406 	struct drm_i915_private *i915 = vgpu->gvt->gt->i915;  in intel_gvt_i2c_handle_gmbus_write()
412 		return gmbus0_mmio_write(vgpu, offset, p_data, bytes);  in intel_gvt_i2c_handle_gmbus_write()
414 		return gmbus1_mmio_write(vgpu, offset, p_data, bytes);  in intel_gvt_i2c_handle_gmbus_write()
416 		return gmbus2_mmio_write(vgpu, offset, p_data, bytes);  in intel_gvt_i2c_handle_gmbus_write()
418 		return gmbus3_mmio_write(vgpu, offset, p_data, bytes);  in intel_gvt_i2c_handle_gmbus_write()
420 	memcpy(&vgpu_vreg(vgpu, offset), p_data, bytes);  in intel_gvt_i2c_handle_gmbus_write()
477 void intel_gvt_i2c_handle_aux_ch_write(struct intel_vgpu *vgpu,  in intel_gvt_i2c_handle_aux_ch_write()  argument
482 	struct drm_i915_private *i915 = vgpu->gvt->gt->i915;  in intel_gvt_i2c_handle_aux_ch_write()
483 	struct intel_vgpu_i2c_edid *i2c_edid = &vgpu->display.i2c_edid;  in intel_gvt_i2c_handle_aux_ch_write()
491 		vgpu_vreg(vgpu, offset) = value;  in intel_gvt_i2c_handle_aux_ch_write()
497 	msg = vgpu_vreg(vgpu, offset + 4);  in intel_gvt_i2c_handle_aux_ch_write()
508 	vgpu_vreg(vgpu, offset) =  in intel_gvt_i2c_handle_aux_ch_write()
516 			intel_vgpu_init_i2c_edid(vgpu);  in intel_gvt_i2c_handle_aux_ch_write()
523 				intel_vgpu_init_i2c_edid(vgpu);  in intel_gvt_i2c_handle_aux_ch_write()
528 				if (intel_vgpu_has_monitor_on_port(vgpu,  in intel_gvt_i2c_handle_aux_ch_write()
530 					intel_vgpu_port_is_dp(vgpu, port_idx))  in intel_gvt_i2c_handle_aux_ch_write()
547 			unsigned char val = edid_get_byte(vgpu);  in intel_gvt_i2c_handle_aux_ch_write()
558 	vgpu_vreg(vgpu, offset + 4) = aux_data_for_write;  in intel_gvt_i2c_handle_aux_ch_write()
568 void intel_vgpu_init_i2c_edid(struct intel_vgpu *vgpu)  in intel_vgpu_init_i2c_edid()  argument
570 	struct intel_vgpu_i2c_edid *edid = &vgpu->display.i2c_edid;  in intel_vgpu_init_i2c_edid()