46 #define intel_vgpu_port(vgpu, port) \  argument
47 	(&(vgpu->display.ports[port]))
49 #define intel_vgpu_has_monitor_on_port(vgpu, port) \  argument
50 	(intel_vgpu_port(vgpu, port)->edid && \
51 		intel_vgpu_port(vgpu, port)->edid->data_valid)
53 #define intel_vgpu_port_is_dp(vgpu, port) \  argument
54 	((intel_vgpu_port(vgpu, port)->type == GVT_DP_A) || \
55 	(intel_vgpu_port(vgpu, port)->type == GVT_DP_B) || \
56 	(intel_vgpu_port(vgpu, port)->type == GVT_DP_C) || \
57 	(intel_vgpu_port(vgpu, port)->type == GVT_DP_D))
208 int intel_vgpu_init_display(struct intel_vgpu *vgpu, u64 resolution);
209 void intel_vgpu_reset_display(struct intel_vgpu *vgpu);
210 void intel_vgpu_clean_display(struct intel_vgpu *vgpu);
212 int pipe_is_enabled(struct intel_vgpu *vgpu, int pipe);