Lines Matching refs:d2l_write
348 static void d2l_write(struct i2c_client *i2c, u16 addr, u32 val) in d2l_write() function
408 d2l_write(tc->i2c, SYSRST, SYS_RST_REG | SYS_RST_DSIRX | SYS_RST_BM | in tc_bridge_enable()
412 d2l_write(tc->i2c, PPI_TX_RX_TA, TTA_GET | TTA_SURE); in tc_bridge_enable()
413 d2l_write(tc->i2c, PPI_LPTXTIMECNT, LPX_PERIOD); in tc_bridge_enable()
414 d2l_write(tc->i2c, PPI_D0S_CLRSIPOCOUNT, 3); in tc_bridge_enable()
415 d2l_write(tc->i2c, PPI_D1S_CLRSIPOCOUNT, 3); in tc_bridge_enable()
416 d2l_write(tc->i2c, PPI_D2S_CLRSIPOCOUNT, 3); in tc_bridge_enable()
417 d2l_write(tc->i2c, PPI_D3S_CLRSIPOCOUNT, 3); in tc_bridge_enable()
420 d2l_write(tc->i2c, PPI_LANEENABLE, val); in tc_bridge_enable()
421 d2l_write(tc->i2c, DSI_LANEENABLE, val); in tc_bridge_enable()
423 d2l_write(tc->i2c, PPI_STARTPPI, PPI_START_FUNCTION); in tc_bridge_enable()
424 d2l_write(tc->i2c, DSI_STARTDSI, DSI_RX_START); in tc_bridge_enable()
442 d2l_write(tc->i2c, VPCTRL, val); in tc_bridge_enable()
444 d2l_write(tc->i2c, HTIM1, htime1); in tc_bridge_enable()
445 d2l_write(tc->i2c, VTIM1, vtime1); in tc_bridge_enable()
446 d2l_write(tc->i2c, HTIM2, htime2); in tc_bridge_enable()
447 d2l_write(tc->i2c, VTIM2, vtime2); in tc_bridge_enable()
449 d2l_write(tc->i2c, VFUEN, VFUEN_EN); in tc_bridge_enable()
450 d2l_write(tc->i2c, SYSRST, SYS_RST_LCD); in tc_bridge_enable()
451 d2l_write(tc->i2c, LVPHY0, LV_PHY0_PRBS_ON(4) | LV_PHY0_ND(6)); in tc_bridge_enable()
463 d2l_write(tc->i2c, LV_MX0003, LV_MX(LVI_R0, LVI_R1, LVI_R2, LVI_R3)); in tc_bridge_enable()
464 d2l_write(tc->i2c, LV_MX0407, LV_MX(LVI_R4, LVI_R7, LVI_R5, LVI_G0)); in tc_bridge_enable()
465 d2l_write(tc->i2c, LV_MX0811, LV_MX(LVI_G1, LVI_G2, LVI_G6, LVI_G7)); in tc_bridge_enable()
466 d2l_write(tc->i2c, LV_MX1215, LV_MX(LVI_G3, LVI_G4, LVI_G5, LVI_B0)); in tc_bridge_enable()
467 d2l_write(tc->i2c, LV_MX1619, LV_MX(LVI_B6, LVI_B7, LVI_B1, LVI_B2)); in tc_bridge_enable()
468 d2l_write(tc->i2c, LV_MX2023, LV_MX(LVI_B3, LVI_B4, LVI_B5, LVI_L0)); in tc_bridge_enable()
469 d2l_write(tc->i2c, LV_MX2427, LV_MX(LVI_HS, LVI_VS, LVI_DE, LVI_R6)); in tc_bridge_enable()
471 d2l_write(tc->i2c, LV_MX0003, LV_MX(LVI_R0, LVI_R1, LVI_R2, LVI_R3)); in tc_bridge_enable()
472 d2l_write(tc->i2c, LV_MX0407, LV_MX(LVI_R4, LVI_L0, LVI_R5, LVI_G0)); in tc_bridge_enable()
473 d2l_write(tc->i2c, LV_MX0811, LV_MX(LVI_G1, LVI_G2, LVI_L0, LVI_L0)); in tc_bridge_enable()
474 d2l_write(tc->i2c, LV_MX1215, LV_MX(LVI_G3, LVI_G4, LVI_G5, LVI_B0)); in tc_bridge_enable()
475 d2l_write(tc->i2c, LV_MX1619, LV_MX(LVI_L0, LVI_L0, LVI_B1, LVI_B2)); in tc_bridge_enable()
476 d2l_write(tc->i2c, LV_MX2023, LV_MX(LVI_B3, LVI_B4, LVI_B5, LVI_L0)); in tc_bridge_enable()
477 d2l_write(tc->i2c, LV_MX2427, LV_MX(LVI_HS, LVI_VS, LVI_DE, LVI_L0)); in tc_bridge_enable()
480 d2l_write(tc->i2c, VFUEN, VFUEN_EN); in tc_bridge_enable()
489 d2l_write(tc->i2c, LVCFG, val); in tc_bridge_enable()