Lines Matching refs:tc358768_write

179 static void tc358768_write(struct tc358768_priv *priv, u32 reg, u32 val)  in tc358768_write()  function
220 tc358768_write(priv, reg, tmp); in tc358768_update_bits()
226 tc358768_write(priv, TC358768_SYSCTL, 1); in tc358768_sw_reset()
228 tc358768_write(priv, TC358768_SYSCTL, 0); in tc358768_sw_reset()
477 tc358768_write(priv, TC358768_DSICMD_TYPE, in tc358768_dsi_host_transfer()
479 tc358768_write(priv, TC358768_DSICMD_WC, 0); in tc358768_dsi_host_transfer()
480 tc358768_write(priv, TC358768_DSICMD_WD0, in tc358768_dsi_host_transfer()
485 tc358768_write(priv, TC358768_DSICMD_TYPE, in tc358768_dsi_host_transfer()
487 tc358768_write(priv, TC358768_DSICMD_WC, packet.payload_length); in tc358768_dsi_host_transfer()
494 tc358768_write(priv, TC358768_DSICMD_WD0 + i, val); in tc358768_dsi_host_transfer()
499 tc358768_write(priv, TC358768_DSICMD_TX, 1); in tc358768_dsi_host_transfer()
597 tc358768_write(priv, TC358768_PLLCTL0, (prd << 12) | fbd); in tc358768_setup_pll()
600 tc358768_write(priv, TC358768_PLLCTL1, in tc358768_setup_pll()
607 tc358768_write(priv, TC358768_PLLCTL1, in tc358768_setup_pll()
687 tc358768_write(priv, TC358768_VSDLY, 1); in tc358768_bridge_pre_enable()
689 tc358768_write(priv, TC358768_DATAFMT, val); in tc358768_bridge_pre_enable()
690 tc358768_write(priv, TC358768_DSITX_DT, data_type); in tc358768_bridge_pre_enable()
693 tc358768_write(priv, TC358768_CLW_CNTRL, 0x0000); in tc358768_bridge_pre_enable()
696 tc358768_write(priv, TC358768_D0W_CNTRL + i * 4, 0x0000); in tc358768_bridge_pre_enable()
712 tc358768_write(priv, TC358768_LINEINITCNT, val); in tc358768_bridge_pre_enable()
718 tc358768_write(priv, TC358768_LPTXTIMECNT, val); in tc358768_bridge_pre_enable()
727 tc358768_write(priv, TC358768_TCLK_HEADERCNT, val); in tc358768_bridge_pre_enable()
733 tc358768_write(priv, TC358768_TCLK_TRAILCNT, val); in tc358768_bridge_pre_enable()
742 tc358768_write(priv, TC358768_THS_HEADERCNT, val); in tc358768_bridge_pre_enable()
748 tc358768_write(priv, TC358768_TWAKEUP, val); in tc358768_bridge_pre_enable()
754 tc358768_write(priv, TC358768_TCLK_POSTCNT, val); in tc358768_bridge_pre_enable()
760 tc358768_write(priv, TC358768_THS_TRAILCNT, val); in tc358768_bridge_pre_enable()
765 tc358768_write(priv, TC358768_HSTXVREGEN, val); in tc358768_bridge_pre_enable()
768 tc358768_write(priv, TC358768_TXOPTIONCNTRL, 0x1); in tc358768_bridge_pre_enable()
777 tc358768_write(priv, TC358768_BTACNTRL1, val); in tc358768_bridge_pre_enable()
780 tc358768_write(priv, TC358768_STARTCNTRL, 1); in tc358768_bridge_pre_enable()
783 tc358768_write(priv, TC358768_DSI_EVENT, 1); in tc358768_bridge_pre_enable()
786 tc358768_write(priv, TC358768_DSI_VSW, in tc358768_bridge_pre_enable()
789 tc358768_write(priv, TC358768_DSI_VBPR, 0); in tc358768_bridge_pre_enable()
791 tc358768_write(priv, TC358768_DSI_VACT, mode->vdisplay); in tc358768_bridge_pre_enable()
797 tc358768_write(priv, TC358768_DSI_HSW, val); in tc358768_bridge_pre_enable()
799 tc358768_write(priv, TC358768_DSI_HBPR, 0); in tc358768_bridge_pre_enable()
801 tc358768_write(priv, TC358768_DSI_HACT, hact); in tc358768_bridge_pre_enable()
811 tc358768_write(priv, TC358768_DSI_START, 0x1); in tc358768_bridge_pre_enable()
817 tc358768_write(priv, TC358768_DSI_CONFW, val); in tc358768_bridge_pre_enable()
831 tc358768_write(priv, TC358768_DSI_CONFW, val); in tc358768_bridge_pre_enable()
835 tc358768_write(priv, TC358768_DSI_CONFW, val); in tc358768_bridge_pre_enable()