Lines Matching refs:display_mode

1463 static void show_display_mode(struct it6161 *it6161, struct drm_display_mode *display_mode, u8 sele…  in show_display_mode()  argument
1468 DRM_INFO("timing name:%s", display_mode->name); in show_display_mode()
1469 DRM_INFO("clock = %dkHz", display_mode->clock); in show_display_mode()
1470 DRM_INFO("htotal = %d", display_mode->htotal); in show_display_mode()
1471 DRM_INFO("hactive = %d", display_mode->hdisplay); in show_display_mode()
1472 DRM_INFO("hfront_porch = %d", display_mode->hsync_start - display_mode->hdisplay); in show_display_mode()
1473 DRM_INFO("hsyncw = %d", display_mode->hsync_end - display_mode->hsync_start); in show_display_mode()
1474 DRM_INFO("hback_porch = %d", display_mode->htotal - display_mode->hsync_end); in show_display_mode()
1476 DRM_INFO("vtotal = %d", display_mode->vtotal); in show_display_mode()
1477 DRM_INFO("vactive = %d", display_mode->vdisplay); in show_display_mode()
1478 DRM_INFO("vfront_porch = %d", display_mode->vsync_start - display_mode->vdisplay); in show_display_mode()
1479 DRM_INFO("vsyncw = %d", display_mode->vsync_end - display_mode->vsync_start); in show_display_mode()
1480 DRM_INFO("vback_porch = %d", display_mode->vtotal - display_mode->vsync_end); in show_display_mode()
1481 DRM_INFO("drm_display_mode flags = 0x%04x", display_mode->flags); in show_display_mode()
1525 struct drm_display_mode *display_mode = &it6161->source_display_mode; in mipi_rx_setup_polarity() local
1528 polarity = ((display_mode->flags & DRM_MODE_FLAG_PHSYNC) == DRM_MODE_FLAG_PHSYNC) ? 0x01 : 0x00; in mipi_rx_setup_polarity()
1529 polarity |= ((display_mode->flags & DRM_MODE_FLAG_PVSYNC) == DRM_MODE_FLAG_PVSYNC) ? 0x02 : 0x00; in mipi_rx_setup_polarity()
1764 struct drm_display_mode *display_mode = &it6161->source_display_mode; in hdmi_tx_generate_blank_timing() local
1771 polarity = ((display_mode->flags & DRM_MODE_FLAG_PHSYNC) == DRM_MODE_FLAG_PHSYNC) ? 0x02 : 0x00; in hdmi_tx_generate_blank_timing()
1772 polarity |= ((display_mode->flags & DRM_MODE_FLAG_PVSYNC) == DRM_MODE_FLAG_PVSYNC) ? 0x04 : 0x00; in hdmi_tx_generate_blank_timing()
1774 hsync_start = display_mode->hsync_start - display_mode->hdisplay - 1; in hdmi_tx_generate_blank_timing()
1775 hsync_end = hsync_start + display_mode->hsync_end - display_mode->hsync_start; in hdmi_tx_generate_blank_timing()
1776 vsync_rising_at_h_2nd = hsync_start + display_mode->htotal / 2; in hdmi_tx_generate_blank_timing()
1777 hde_start = display_mode->htotal - display_mode->hsync_start; in hdmi_tx_generate_blank_timing()
1789 vsync_start = display_mode->vsync_start - display_mode->vdisplay; in hdmi_tx_generate_blank_timing()
1790 vsync_end = display_mode->vsync_end - display_mode->vdisplay; in hdmi_tx_generate_blank_timing()
1792 if ((display_mode->flags & DRM_MODE_FLAG_INTERLACE) != DRM_MODE_FLAG_INTERLACE) { in hdmi_tx_generate_blank_timing()
1795 vtotal = display_mode->vtotal - 1; in hdmi_tx_generate_blank_timing()
1798 vtotal = display_mode->vtotal * 2; in hdmi_tx_generate_blank_timing()
1811 htotal = display_mode->htotal - 1; in hdmi_tx_generate_blank_timing()
2280 struct drm_display_mode *display_mode = &it6161->source_display_mode; in it6161_bridge_mode_set() local
2297 strlcpy(display_mode->name, adjusted_mode->name, in it6161_bridge_mode_set()
2299 display_mode->clock = mode->clock; in it6161_bridge_mode_set()
2300 display_mode->hdisplay = mode->hdisplay; in it6161_bridge_mode_set()
2301 display_mode->hsync_start = mode->hsync_start; in it6161_bridge_mode_set()
2302 display_mode->hsync_end = mode->hsync_end; in it6161_bridge_mode_set()
2303 display_mode->htotal = mode->htotal; in it6161_bridge_mode_set()
2304 display_mode->vdisplay = mode->vdisplay; in it6161_bridge_mode_set()
2305 display_mode->vsync_start = mode->vsync_start; in it6161_bridge_mode_set()
2306 display_mode->vsync_end = mode->vsync_end; in it6161_bridge_mode_set()
2307 display_mode->vtotal = mode->vtotal; in it6161_bridge_mode_set()
2308 display_mode->flags = mode->flags; in it6161_bridge_mode_set()
2310 DRM_INFO("config display mode clk: %d\n", display_mode->clock); in it6161_bridge_mode_set()
2311 DRM_INFO("config display mode hdisplay: %d\n", display_mode->hdisplay); in it6161_bridge_mode_set()
2312 DRM_INFO("config display mode hsync_start: %d\n", display_mode->hsync_start); in it6161_bridge_mode_set()
2313 DRM_INFO("config display mode hsync_end: %d\n", display_mode->hsync_end); in it6161_bridge_mode_set()
2314 DRM_INFO("config display mode htotal: %d\n", display_mode->htotal); in it6161_bridge_mode_set()
2315 DRM_INFO("config display mode vdisplay: %d\n", display_mode->vdisplay); in it6161_bridge_mode_set()
2316 DRM_INFO("config display mode vsync_start: %d\n", display_mode->vsync_start); in it6161_bridge_mode_set()
2317 DRM_INFO("config display mode vsync_end: %d\n", display_mode->vsync_end); in it6161_bridge_mode_set()
2318 DRM_INFO("config display mode vtotal: %d\n", display_mode->vtotal); in it6161_bridge_mode_set()
2516 struct drm_display_mode *display_mode = &it6161->hdmi_tx_display_mode; in hdmi_tx_get_display_mode() local
2549 display_mode->clock = it6161->hdmi_tx_pclk; in hdmi_tx_get_display_mode()
2550 display_mode->hdisplay = hactive; in hdmi_tx_get_display_mode()
2551 display_mode->hsync_start = hactive + hfront_porch; in hdmi_tx_get_display_mode()
2552 display_mode->hsync_end = hactive + hfront_porch + hsyncw; in hdmi_tx_get_display_mode()
2553 display_mode->htotal = htotal; in hdmi_tx_get_display_mode()
2554 display_mode->vdisplay = vactive; in hdmi_tx_get_display_mode()
2555 display_mode->vsync_start = vactive + vfront_porch; in hdmi_tx_get_display_mode()
2556 display_mode->vsync_end = vactive + vfront_porch + vsyncw; in hdmi_tx_get_display_mode()
2557 display_mode->vtotal = vtotal; in hdmi_tx_get_display_mode()
2558 display_mode->flags = ((hsyncpol == 0x01) ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC) | in hdmi_tx_get_display_mode()
5569 struct drm_display_mode *display_mode = &it6161->source_display_mode; in hdmi_tx_get_avi_infoframe_from_user_define() local
5574 ret = drm_hdmi_avi_infoframe_from_display_mode(frame, &it6161->connector, display_mode); in hdmi_tx_get_avi_infoframe_from_user_define()
5942 struct drm_display_mode *display_mode = &it6161->mipi_rx_p_display_mode; in mipi_rx_prec_get_display_mode() local
5963 display_mode->clock = it6161->mipi_rx_pclk; in mipi_rx_prec_get_display_mode()
5964 display_mode->hdisplay = p_hactive; in mipi_rx_prec_get_display_mode()
5965 display_mode->hsync_start = p_hactive + p_hfront_porch; in mipi_rx_prec_get_display_mode()
5966 display_mode->hsync_end = p_hactive + p_hfront_porch + p_hsyncw; in mipi_rx_prec_get_display_mode()
5967 display_mode->htotal = p_htotal; in mipi_rx_prec_get_display_mode()
5968 display_mode->vdisplay = p_vactive; in mipi_rx_prec_get_display_mode()
5969 display_mode->vsync_start = p_vactive + p_vfront_porch; in mipi_rx_prec_get_display_mode()
5970 display_mode->vsync_end = p_vactive + p_vfront_porch + p_vsyncw; in mipi_rx_prec_get_display_mode()
5971 display_mode->vtotal = p_vtotal; in mipi_rx_prec_get_display_mode()
5973 DRM_DEV_DEBUG_DRIVER(dev, "mipi pixel clock: %d KHz", display_mode->clock); in mipi_rx_prec_get_display_mode()