Lines Matching refs:hwdev
270 static int malidp500_query_hw(struct malidp_hw_device *hwdev) in malidp500_query_hw() argument
272 u32 conf = malidp_hw_read(hwdev, MALIDP500_CONFIG_ID); in malidp500_query_hw()
276 hwdev->min_line_size = 2; in malidp500_query_hw()
277 hwdev->max_line_size = SZ_2K * ln_size_mult; in malidp500_query_hw()
278 hwdev->rotation_memory[0] = SZ_1K * 64 * ln_size_mult; in malidp500_query_hw()
279 hwdev->rotation_memory[1] = 0; /* no second rotation memory bank */ in malidp500_query_hw()
284 static void malidp500_enter_config_mode(struct malidp_hw_device *hwdev) in malidp500_enter_config_mode() argument
288 malidp_hw_setbits(hwdev, MALIDP500_DC_CONFIG_REQ, MALIDP500_DC_CONTROL); in malidp500_enter_config_mode()
290 status = malidp_hw_read(hwdev, hwdev->hw->map.dc_base + MALIDP_REG_STATUS); in malidp500_enter_config_mode()
303 static void malidp500_leave_config_mode(struct malidp_hw_device *hwdev) in malidp500_leave_config_mode() argument
307 malidp_hw_clearbits(hwdev, MALIDP_CFG_VALID, MALIDP500_CONFIG_VALID); in malidp500_leave_config_mode()
308 malidp_hw_clearbits(hwdev, MALIDP500_DC_CONFIG_REQ, MALIDP500_DC_CONTROL); in malidp500_leave_config_mode()
310 status = malidp_hw_read(hwdev, hwdev->hw->map.dc_base + MALIDP_REG_STATUS); in malidp500_leave_config_mode()
319 static bool malidp500_in_config_mode(struct malidp_hw_device *hwdev) in malidp500_in_config_mode() argument
323 status = malidp_hw_read(hwdev, hwdev->hw->map.dc_base + MALIDP_REG_STATUS); in malidp500_in_config_mode()
330 static void malidp500_set_config_valid(struct malidp_hw_device *hwdev, u8 value) in malidp500_set_config_valid() argument
333 malidp_hw_setbits(hwdev, MALIDP_CFG_VALID, MALIDP500_CONFIG_VALID); in malidp500_set_config_valid()
335 malidp_hw_clearbits(hwdev, MALIDP_CFG_VALID, MALIDP500_CONFIG_VALID); in malidp500_set_config_valid()
338 static void malidp500_modeset(struct malidp_hw_device *hwdev, struct videomode *mode) in malidp500_modeset() argument
342 malidp_hw_write(hwdev, hwdev->output_color_depth, in malidp500_modeset()
343 hwdev->hw->map.out_depth_base); in malidp500_modeset()
344 malidp_hw_clearbits(hwdev, MALIDP500_DC_CLEAR_MASK, MALIDP500_DC_CONTROL); in malidp500_modeset()
350 malidp_hw_setbits(hwdev, val, MALIDP500_DC_CONTROL); in malidp500_modeset()
360 malidp_hw_write(hwdev, val, MALIDP500_BGND_COLOR); in malidp500_modeset()
361 malidp_hw_write(hwdev, MALIDP_BGND_COLOR_B, MALIDP500_BGND_COLOR + 4); in malidp500_modeset()
365 malidp_hw_write(hwdev, val, MALIDP500_TIMINGS_BASE + MALIDP_DE_H_TIMINGS); in malidp500_modeset()
369 malidp_hw_write(hwdev, val, MALIDP500_TIMINGS_BASE + MALIDP_DE_V_TIMINGS); in malidp500_modeset()
373 malidp_hw_write(hwdev, val, MALIDP500_TIMINGS_BASE + MALIDP_DE_SYNC_WIDTH); in malidp500_modeset()
376 malidp_hw_write(hwdev, val, MALIDP500_TIMINGS_BASE + MALIDP_DE_HV_ACTIVE); in malidp500_modeset()
379 malidp_hw_setbits(hwdev, MALIDP_DISP_FUNC_ILACED, MALIDP_DE_DISPLAY_FUNC); in malidp500_modeset()
381 malidp_hw_clearbits(hwdev, MALIDP_DISP_FUNC_ILACED, MALIDP_DE_DISPLAY_FUNC); in malidp500_modeset()
387 if (hwdev->arqos_value) { in malidp500_modeset()
388 val = hwdev->arqos_value; in malidp500_modeset()
389 malidp_hw_setbits(hwdev, val, MALIDP500_RQOS_QUALITY); in malidp500_modeset()
417 static int malidp500_rotmem_required(struct malidp_hw_device *hwdev, u16 w, in malidp500_rotmem_required() argument
430 static void malidp500_se_write_pp_coefftab(struct malidp_hw_device *hwdev, in malidp500_se_write_pp_coefftab() argument
438 malidp_hw_write(hwdev, in malidp500_se_write_pp_coefftab()
442 malidp_hw_write(hwdev, MALIDP_SE_SET_COEFFTAB_DATA( in malidp500_se_write_pp_coefftab()
447 static int malidp500_se_set_scaling_coeffs(struct malidp_hw_device *hwdev, in malidp500_se_set_scaling_coeffs() argument
461 malidp500_se_write_pp_coefftab(hwdev, in malidp500_se_set_scaling_coeffs()
467 malidp500_se_write_pp_coefftab(hwdev, in malidp500_se_set_scaling_coeffs()
471 malidp500_se_write_pp_coefftab(hwdev, in malidp500_se_set_scaling_coeffs()
479 static long malidp500_se_calc_mclk(struct malidp_hw_device *hwdev, in malidp500_se_calc_mclk() argument
503 ret = clk_get_rate(hwdev->mclk); in malidp500_se_calc_mclk()
512 static int malidp500_enable_memwrite(struct malidp_hw_device *hwdev, in malidp500_enable_memwrite() argument
518 u32 de_base = malidp_get_block_base(hwdev, MALIDP_DE_BLOCK); in malidp500_enable_memwrite()
521 malidp_hw_setbits(hwdev, MALIDP_SCALE_ENGINE_EN, de_base + MALIDP_DE_DISPLAY_FUNC); in malidp500_enable_memwrite()
524 if (hwdev->mw_state != MW_NOT_ENABLED) in malidp500_enable_memwrite()
525 hwdev->mw_state = MW_RESTART; in malidp500_enable_memwrite()
527 hwdev->mw_state = MW_START; in malidp500_enable_memwrite()
529 malidp_hw_write(hwdev, fmt_id, base + MALIDP_MW_FORMAT); in malidp500_enable_memwrite()
532 malidp_hw_write(hwdev, lower_32_bits(addrs[1]), base + MALIDP_MW_P2_PTR_LOW); in malidp500_enable_memwrite()
533 malidp_hw_write(hwdev, upper_32_bits(addrs[1]), base + MALIDP_MW_P2_PTR_HIGH); in malidp500_enable_memwrite()
534 malidp_hw_write(hwdev, pitches[1], base + MALIDP_MW_P2_STRIDE); in malidp500_enable_memwrite()
537 malidp_hw_write(hwdev, lower_32_bits(addrs[0]), base + MALIDP_MW_P1_PTR_LOW); in malidp500_enable_memwrite()
538 malidp_hw_write(hwdev, upper_32_bits(addrs[0]), base + MALIDP_MW_P1_PTR_HIGH); in malidp500_enable_memwrite()
539 malidp_hw_write(hwdev, pitches[0], base + MALIDP_MW_P1_STRIDE); in malidp500_enable_memwrite()
545 malidp_hw_write(hwdev, MALIDP_DE_H_ACTIVE(w) | MALIDP_DE_V_ACTIVE(h), in malidp500_enable_memwrite()
552 malidp_hw_write(hwdev, rgb2yuv_coeffs[i], in malidp500_enable_memwrite()
557 malidp_hw_setbits(hwdev, MALIDP_SE_MEMWRITE_EN, MALIDP500_SE_CONTROL); in malidp500_enable_memwrite()
562 static void malidp500_disable_memwrite(struct malidp_hw_device *hwdev) in malidp500_disable_memwrite() argument
564 u32 base = malidp_get_block_base(hwdev, MALIDP_DE_BLOCK); in malidp500_disable_memwrite()
566 if (hwdev->mw_state == MW_START || hwdev->mw_state == MW_RESTART) in malidp500_disable_memwrite()
567 hwdev->mw_state = MW_STOP; in malidp500_disable_memwrite()
568 malidp_hw_clearbits(hwdev, MALIDP_SE_MEMWRITE_EN, MALIDP500_SE_CONTROL); in malidp500_disable_memwrite()
569 malidp_hw_clearbits(hwdev, MALIDP_SCALE_ENGINE_EN, base + MALIDP_DE_DISPLAY_FUNC); in malidp500_disable_memwrite()
572 static int malidp550_query_hw(struct malidp_hw_device *hwdev) in malidp550_query_hw() argument
574 u32 conf = malidp_hw_read(hwdev, MALIDP550_CONFIG_ID); in malidp550_query_hw()
577 hwdev->min_line_size = 2; in malidp550_query_hw()
581 hwdev->max_line_size = SZ_2K; in malidp550_query_hw()
586 hwdev->max_line_size = SZ_4K; in malidp550_query_hw()
591 hwdev->max_line_size = 1280; in malidp550_query_hw()
597 hwdev->max_line_size = 0; in malidp550_query_hw()
601 hwdev->rotation_memory[0] = hwdev->rotation_memory[1] = rsize * SZ_1K; in malidp550_query_hw()
605 static void malidp550_enter_config_mode(struct malidp_hw_device *hwdev) in malidp550_enter_config_mode() argument
609 malidp_hw_setbits(hwdev, MALIDP550_DC_CONFIG_REQ, MALIDP550_DC_CONTROL); in malidp550_enter_config_mode()
611 status = malidp_hw_read(hwdev, hwdev->hw->map.dc_base + MALIDP_REG_STATUS); in malidp550_enter_config_mode()
624 static void malidp550_leave_config_mode(struct malidp_hw_device *hwdev) in malidp550_leave_config_mode() argument
628 malidp_hw_clearbits(hwdev, MALIDP_CFG_VALID, MALIDP550_CONFIG_VALID); in malidp550_leave_config_mode()
629 malidp_hw_clearbits(hwdev, MALIDP550_DC_CONFIG_REQ, MALIDP550_DC_CONTROL); in malidp550_leave_config_mode()
631 status = malidp_hw_read(hwdev, hwdev->hw->map.dc_base + MALIDP_REG_STATUS); in malidp550_leave_config_mode()
640 static bool malidp550_in_config_mode(struct malidp_hw_device *hwdev) in malidp550_in_config_mode() argument
644 status = malidp_hw_read(hwdev, hwdev->hw->map.dc_base + MALIDP_REG_STATUS); in malidp550_in_config_mode()
651 static void malidp550_set_config_valid(struct malidp_hw_device *hwdev, u8 value) in malidp550_set_config_valid() argument
654 malidp_hw_setbits(hwdev, MALIDP_CFG_VALID, MALIDP550_CONFIG_VALID); in malidp550_set_config_valid()
656 malidp_hw_clearbits(hwdev, MALIDP_CFG_VALID, MALIDP550_CONFIG_VALID); in malidp550_set_config_valid()
659 static void malidp550_modeset(struct malidp_hw_device *hwdev, struct videomode *mode) in malidp550_modeset() argument
663 malidp_hw_write(hwdev, hwdev->output_color_depth, in malidp550_modeset()
664 hwdev->hw->map.out_depth_base); in malidp550_modeset()
665 malidp_hw_write(hwdev, val, MALIDP550_DE_CONTROL); in malidp550_modeset()
678 malidp_hw_write(hwdev, val, MALIDP550_DE_BGND_COLOR); in malidp550_modeset()
682 malidp_hw_write(hwdev, val, MALIDP550_TIMINGS_BASE + MALIDP_DE_H_TIMINGS); in malidp550_modeset()
686 malidp_hw_write(hwdev, val, MALIDP550_TIMINGS_BASE + MALIDP_DE_V_TIMINGS); in malidp550_modeset()
694 malidp_hw_write(hwdev, val, MALIDP550_TIMINGS_BASE + MALIDP_DE_SYNC_WIDTH); in malidp550_modeset()
697 malidp_hw_write(hwdev, val, MALIDP550_TIMINGS_BASE + MALIDP_DE_HV_ACTIVE); in malidp550_modeset()
700 malidp_hw_setbits(hwdev, MALIDP_DISP_FUNC_ILACED, MALIDP_DE_DISPLAY_FUNC); in malidp550_modeset()
702 malidp_hw_clearbits(hwdev, MALIDP_DISP_FUNC_ILACED, MALIDP_DE_DISPLAY_FUNC); in malidp550_modeset()
759 static int malidp550_rotmem_required(struct malidp_hw_device *hwdev, u16 w, in malidp550_rotmem_required() argument
786 static int malidp650_rotmem_required(struct malidp_hw_device *hwdev, u16 w, in malidp650_rotmem_required() argument
806 static int malidp550_se_set_scaling_coeffs(struct malidp_hw_device *hwdev, in malidp550_se_set_scaling_coeffs() argument
815 malidp_hw_clearbits(hwdev, mask, MALIDP550_SE_CONTROL); in malidp550_se_set_scaling_coeffs()
816 malidp_hw_setbits(hwdev, new_value, MALIDP550_SE_CONTROL); in malidp550_se_set_scaling_coeffs()
820 static long malidp550_se_calc_mclk(struct malidp_hw_device *hwdev, in malidp550_se_calc_mclk() argument
844 ret = clk_get_rate(hwdev->mclk); in malidp550_se_calc_mclk()
853 static int malidp550_enable_memwrite(struct malidp_hw_device *hwdev, in malidp550_enable_memwrite() argument
859 u32 de_base = malidp_get_block_base(hwdev, MALIDP_DE_BLOCK); in malidp550_enable_memwrite()
862 malidp_hw_setbits(hwdev, MALIDP_SCALE_ENGINE_EN, de_base + MALIDP_DE_DISPLAY_FUNC); in malidp550_enable_memwrite()
864 hwdev->mw_state = MW_ONESHOT; in malidp550_enable_memwrite()
866 malidp_hw_write(hwdev, fmt_id, base + MALIDP_MW_FORMAT); in malidp550_enable_memwrite()
869 malidp_hw_write(hwdev, lower_32_bits(addrs[1]), base + MALIDP_MW_P2_PTR_LOW); in malidp550_enable_memwrite()
870 malidp_hw_write(hwdev, upper_32_bits(addrs[1]), base + MALIDP_MW_P2_PTR_HIGH); in malidp550_enable_memwrite()
871 malidp_hw_write(hwdev, pitches[1], base + MALIDP_MW_P2_STRIDE); in malidp550_enable_memwrite()
874 malidp_hw_write(hwdev, lower_32_bits(addrs[0]), base + MALIDP_MW_P1_PTR_LOW); in malidp550_enable_memwrite()
875 malidp_hw_write(hwdev, upper_32_bits(addrs[0]), base + MALIDP_MW_P1_PTR_HIGH); in malidp550_enable_memwrite()
876 malidp_hw_write(hwdev, pitches[0], base + MALIDP_MW_P1_STRIDE); in malidp550_enable_memwrite()
882 malidp_hw_write(hwdev, MALIDP_DE_H_ACTIVE(w) | MALIDP_DE_V_ACTIVE(h), in malidp550_enable_memwrite()
884 malidp_hw_setbits(hwdev, MALIDP550_SE_MEMWRITE_ONESHOT | MALIDP_SE_MEMWRITE_EN, in malidp550_enable_memwrite()
891 malidp_hw_write(hwdev, rgb2yuv_coeffs[i], in malidp550_enable_memwrite()
899 static void malidp550_disable_memwrite(struct malidp_hw_device *hwdev) in malidp550_disable_memwrite() argument
901 u32 base = malidp_get_block_base(hwdev, MALIDP_DE_BLOCK); in malidp550_disable_memwrite()
903 malidp_hw_clearbits(hwdev, MALIDP550_SE_MEMWRITE_ONESHOT | MALIDP_SE_MEMWRITE_EN, in malidp550_disable_memwrite()
905 malidp_hw_clearbits(hwdev, MALIDP_SCALE_ENGINE_EN, base + MALIDP_DE_DISPLAY_FUNC); in malidp550_disable_memwrite()
908 static int malidp650_query_hw(struct malidp_hw_device *hwdev) in malidp650_query_hw() argument
910 u32 conf = malidp_hw_read(hwdev, MALIDP550_CONFIG_ID); in malidp650_query_hw()
913 hwdev->min_line_size = 4; in malidp650_query_hw()
919 hwdev->max_line_size = 0; in malidp650_query_hw()
922 hwdev->max_line_size = SZ_4K; in malidp650_query_hw()
927 hwdev->max_line_size = 2560; in malidp650_query_hw()
932 hwdev->rotation_memory[0] = hwdev->rotation_memory[1] = rsize * SZ_1K; in malidp650_query_hw()
1158 static void malidp_hw_clear_irq(struct malidp_hw_device *hwdev, u8 block, u32 irq) in malidp_hw_clear_irq() argument
1160 u32 base = malidp_get_block_base(hwdev, block); in malidp_hw_clear_irq()
1162 if (hwdev->hw->map.features & MALIDP_REGMAP_HAS_CLEARIRQ) in malidp_hw_clear_irq()
1163 malidp_hw_write(hwdev, irq, base + MALIDP_REG_CLEARIRQ); in malidp_hw_clear_irq()
1165 malidp_hw_write(hwdev, irq, base + MALIDP_REG_STATUS); in malidp_hw_clear_irq()
1172 struct malidp_hw_device *hwdev; in malidp_de_irq() local
1178 hwdev = malidp->dev; in malidp_de_irq()
1179 hw = hwdev->hw; in malidp_de_irq()
1187 if (hwdev->pm_suspended) in malidp_de_irq()
1191 dc_status = malidp_hw_read(hwdev, hw->map.dc_base + MALIDP_REG_STATUS); in malidp_de_irq()
1193 malidp_hw_clear_irq(hwdev, MALIDP_DC_BLOCK, dc_status); in malidp_de_irq()
1205 status = malidp_hw_read(hwdev, MALIDP_REG_STATUS); in malidp_de_irq()
1209 mask = malidp_hw_read(hwdev, MALIDP_REG_MASKIRQ); in malidp_de_irq()
1221 malidp_hw_clear_irq(hwdev, MALIDP_DE_BLOCK, status); in malidp_de_irq()
1236 void malidp_de_irq_hw_init(struct malidp_hw_device *hwdev) in malidp_de_irq_hw_init() argument
1239 malidp_hw_disable_irq(hwdev, MALIDP_DE_BLOCK, 0xffffffff); in malidp_de_irq_hw_init()
1240 malidp_hw_clear_irq(hwdev, MALIDP_DE_BLOCK, 0xffffffff); in malidp_de_irq_hw_init()
1241 malidp_hw_disable_irq(hwdev, MALIDP_DC_BLOCK, 0xffffffff); in malidp_de_irq_hw_init()
1242 malidp_hw_clear_irq(hwdev, MALIDP_DC_BLOCK, 0xffffffff); in malidp_de_irq_hw_init()
1245 malidp_hw_enable_irq(hwdev, MALIDP_DC_BLOCK, in malidp_de_irq_hw_init()
1246 hwdev->hw->map.dc_irq_map.irq_mask); in malidp_de_irq_hw_init()
1249 malidp_hw_enable_irq(hwdev, MALIDP_DE_BLOCK, in malidp_de_irq_hw_init()
1250 hwdev->hw->map.de_irq_map.irq_mask); in malidp_de_irq_hw_init()
1256 struct malidp_hw_device *hwdev = malidp->dev; in malidp_de_irq_init() local
1260 malidp_hw_disable_irq(hwdev, MALIDP_DE_BLOCK, 0xffffffff); in malidp_de_irq_init()
1261 malidp_hw_clear_irq(hwdev, MALIDP_DE_BLOCK, 0xffffffff); in malidp_de_irq_init()
1262 malidp_hw_disable_irq(hwdev, MALIDP_DC_BLOCK, 0xffffffff); in malidp_de_irq_init()
1263 malidp_hw_clear_irq(hwdev, MALIDP_DC_BLOCK, 0xffffffff); in malidp_de_irq_init()
1273 malidp_de_irq_hw_init(hwdev); in malidp_de_irq_init()
1278 void malidp_de_irq_fini(struct malidp_hw_device *hwdev) in malidp_de_irq_fini() argument
1280 malidp_hw_disable_irq(hwdev, MALIDP_DE_BLOCK, in malidp_de_irq_fini()
1281 hwdev->hw->map.de_irq_map.irq_mask); in malidp_de_irq_fini()
1282 malidp_hw_disable_irq(hwdev, MALIDP_DC_BLOCK, in malidp_de_irq_fini()
1283 hwdev->hw->map.dc_irq_map.irq_mask); in malidp_de_irq_fini()
1290 struct malidp_hw_device *hwdev = malidp->dev; in malidp_se_irq() local
1291 struct malidp_hw *hw = hwdev->hw; in malidp_se_irq()
1300 if (hwdev->pm_suspended) in malidp_se_irq()
1303 status = malidp_hw_read(hwdev, hw->map.se_base + MALIDP_REG_STATUS); in malidp_se_irq()
1312 mask = malidp_hw_read(hwdev, hw->map.se_base + MALIDP_REG_MASKIRQ); in malidp_se_irq()
1316 switch (hwdev->mw_state) { in malidp_se_irq()
1323 hwdev->mw_state = MW_NOT_ENABLED; in malidp_se_irq()
1330 hw->disable_memwrite(hwdev); in malidp_se_irq()
1336 status = malidp_hw_read(hwdev, hw->map.dc_base + MALIDP_REG_STATUS); in malidp_se_irq()
1339 hw->set_config_valid(hwdev, 1); in malidp_se_irq()
1344 malidp_hw_clear_irq(hwdev, MALIDP_SE_BLOCK, status); in malidp_se_irq()
1349 void malidp_se_irq_hw_init(struct malidp_hw_device *hwdev) in malidp_se_irq_hw_init() argument
1352 malidp_hw_disable_irq(hwdev, MALIDP_SE_BLOCK, 0xffffffff); in malidp_se_irq_hw_init()
1353 malidp_hw_clear_irq(hwdev, MALIDP_SE_BLOCK, 0xffffffff); in malidp_se_irq_hw_init()
1355 malidp_hw_enable_irq(hwdev, MALIDP_SE_BLOCK, in malidp_se_irq_hw_init()
1356 hwdev->hw->map.se_irq_map.irq_mask); in malidp_se_irq_hw_init()
1367 struct malidp_hw_device *hwdev = malidp->dev; in malidp_se_irq_init() local
1371 malidp_hw_disable_irq(hwdev, MALIDP_SE_BLOCK, 0xffffffff); in malidp_se_irq_init()
1372 malidp_hw_clear_irq(hwdev, MALIDP_SE_BLOCK, 0xffffffff); in malidp_se_irq_init()
1382 hwdev->mw_state = MW_NOT_ENABLED; in malidp_se_irq_init()
1383 malidp_se_irq_hw_init(hwdev); in malidp_se_irq_init()
1388 void malidp_se_irq_fini(struct malidp_hw_device *hwdev) in malidp_se_irq_fini() argument
1390 malidp_hw_disable_irq(hwdev, MALIDP_SE_BLOCK, in malidp_se_irq_fini()
1391 hwdev->hw->map.se_irq_map.irq_mask); in malidp_se_irq_fini()