41 static void malidp_write_gamma_table(struct malidp_hw_device *hwdev,  in malidp_write_gamma_table()  argument
52 	malidp_hw_write(hwdev, gamma_write_mask,  in malidp_write_gamma_table()
53 			hwdev->hw->map.coeffs_base + MALIDP_COEF_TABLE_ADDR);  in malidp_write_gamma_table()
55 		malidp_hw_write(hwdev, data[i],  in malidp_write_gamma_table()
56 				hwdev->hw->map.coeffs_base +  in malidp_write_gamma_table()
64 	struct malidp_hw_device *hwdev = malidp->dev;  in malidp_atomic_commit_update_gamma()  local
70 		malidp_hw_clearbits(hwdev,  in malidp_atomic_commit_update_gamma()
79 			malidp_write_gamma_table(hwdev, mc->gamma_coeffs);  in malidp_atomic_commit_update_gamma()
81 		malidp_hw_setbits(hwdev, MALIDP_DISP_FUNC_GAMMA,  in malidp_atomic_commit_update_gamma()
91 	struct malidp_hw_device *hwdev = malidp->dev;  in malidp_atomic_commit_update_coloradj()  local
98 		malidp_hw_clearbits(hwdev, MALIDP_DISP_FUNC_CADJ,  in malidp_atomic_commit_update_coloradj()
107 				malidp_hw_write(hwdev,  in malidp_atomic_commit_update_coloradj()
109 						hwdev->hw->map.coeffs_base +  in malidp_atomic_commit_update_coloradj()
112 		malidp_hw_setbits(hwdev, MALIDP_DISP_FUNC_CADJ,  in malidp_atomic_commit_update_coloradj()
123 	struct malidp_hw_device *hwdev = malidp->dev;  in malidp_atomic_commit_se_config()  local
126 	u32 se_control = hwdev->hw->map.se_base +  in malidp_atomic_commit_se_config()
127 			 ((hwdev->hw->map.features & MALIDP_REGMAP_HAS_CLEARIRQ) ?  in malidp_atomic_commit_se_config()
135 		val = malidp_hw_read(hwdev, se_control);  in malidp_atomic_commit_se_config()
137 		malidp_hw_write(hwdev, val, se_control);  in malidp_atomic_commit_se_config()
141 	hwdev->hw->se_set_scaling_coeffs(hwdev, s, old_s);  in malidp_atomic_commit_se_config()
142 	val = malidp_hw_read(hwdev, se_control);  in malidp_atomic_commit_se_config()
149 	malidp_hw_write(hwdev, val, se_control);  in malidp_atomic_commit_se_config()
154 	malidp_hw_write(hwdev, val, layer_control + MALIDP_SE_L0_IN_SIZE);  in malidp_atomic_commit_se_config()
157 	malidp_hw_write(hwdev, val, layer_control + MALIDP_SE_L0_OUT_SIZE);  in malidp_atomic_commit_se_config()
160 	malidp_hw_write(hwdev, s->h_init_phase, scr + MALIDP_SE_H_INIT_PH);  in malidp_atomic_commit_se_config()
161 	malidp_hw_write(hwdev, s->h_delta_phase, scr + MALIDP_SE_H_DELTA_PH);  in malidp_atomic_commit_se_config()
162 	malidp_hw_write(hwdev, s->v_init_phase, scr + MALIDP_SE_V_INIT_PH);  in malidp_atomic_commit_se_config()
163 	malidp_hw_write(hwdev, s->v_delta_phase, scr + MALIDP_SE_V_DELTA_PH);  in malidp_atomic_commit_se_config()
172 	struct malidp_hw_device *hwdev = malidp->dev;  in malidp_set_and_wait_config_valid()  local
175 	hwdev->hw->set_config_valid(hwdev, 1);  in malidp_set_and_wait_config_valid()
177 	if (hwdev->hw->in_config_mode(hwdev)) {  in malidp_set_and_wait_config_valid()
393 	struct malidp_hw_device *hwdev = malidp->dev;  in malidp_init()  local
397 	drm->mode_config.min_width = hwdev->min_line_size;  in malidp_init()
398 	drm->mode_config.min_height = hwdev->min_line_size;  in malidp_init()
399 	drm->mode_config.max_width = hwdev->max_line_size;  in malidp_init()
400 	drm->mode_config.max_height = hwdev->max_line_size;  in malidp_init()
430 	struct malidp_hw_device *hwdev = malidp->dev;  in malidp_irq_init()  local
450 		malidp_de_irq_fini(hwdev);  in malidp_irq_init()
595 static bool malidp_is_compatible_hw_id(struct malidp_hw_device *hwdev,  in malidp_is_compatible_hw_id()  argument
608 	core_id = malidp_hw_read(hwdev, MALIDP500_DC_BASE + MALIDP_DE_CORE_ID);  in malidp_is_compatible_hw_id()
621 		core_id = malidp_hw_read(hwdev,  in malidp_is_compatible_hw_id()
672 	struct malidp_hw_device *hwdev = malidp->dev;  in malidp_runtime_pm_suspend()  local
675 	WARN_ON(!hwdev->hw->in_config_mode(hwdev));  in malidp_runtime_pm_suspend()
677 	malidp_se_irq_fini(hwdev);  in malidp_runtime_pm_suspend()
678 	malidp_de_irq_fini(hwdev);  in malidp_runtime_pm_suspend()
679 	hwdev->pm_suspended = true;  in malidp_runtime_pm_suspend()
680 	clk_disable_unprepare(hwdev->mclk);  in malidp_runtime_pm_suspend()
681 	clk_disable_unprepare(hwdev->aclk);  in malidp_runtime_pm_suspend()
682 	clk_disable_unprepare(hwdev->pclk);  in malidp_runtime_pm_suspend()
691 	struct malidp_hw_device *hwdev = malidp->dev;  in malidp_runtime_pm_resume()  local
693 	clk_prepare_enable(hwdev->pclk);  in malidp_runtime_pm_resume()
694 	clk_prepare_enable(hwdev->aclk);  in malidp_runtime_pm_resume()
695 	clk_prepare_enable(hwdev->mclk);  in malidp_runtime_pm_resume()
696 	hwdev->pm_suspended = false;  in malidp_runtime_pm_resume()
697 	malidp_de_irq_hw_init(hwdev);  in malidp_runtime_pm_resume()
698 	malidp_se_irq_hw_init(hwdev);  in malidp_runtime_pm_resume()
708 	struct malidp_hw_device *hwdev;  in malidp_bind()  local
721 	hwdev = devm_kzalloc(dev, sizeof(*hwdev), GFP_KERNEL);  in malidp_bind()
722 	if (!hwdev)  in malidp_bind()
725 	hwdev->hw = (struct malidp_hw *)of_device_get_match_data(dev);  in malidp_bind()
726 	malidp->dev = hwdev;  in malidp_bind()
729 	hwdev->regs = devm_ioremap_resource(dev, res);  in malidp_bind()
730 	if (IS_ERR(hwdev->regs))  in malidp_bind()
731 		return PTR_ERR(hwdev->regs);  in malidp_bind()
733 	hwdev->pclk = devm_clk_get(dev, "pclk");  in malidp_bind()
734 	if (IS_ERR(hwdev->pclk))  in malidp_bind()
735 		return PTR_ERR(hwdev->pclk);  in malidp_bind()
737 	hwdev->aclk = devm_clk_get(dev, "aclk");  in malidp_bind()
738 	if (IS_ERR(hwdev->aclk))  in malidp_bind()
739 		return PTR_ERR(hwdev->aclk);  in malidp_bind()
741 	hwdev->mclk = devm_clk_get(dev, "mclk");  in malidp_bind()
742 	if (IS_ERR(hwdev->mclk))  in malidp_bind()
743 		return PTR_ERR(hwdev->mclk);  in malidp_bind()
745 	hwdev->pxlclk = devm_clk_get(dev, "pxlclk");  in malidp_bind()
746 	if (IS_ERR(hwdev->pxlclk))  in malidp_bind()
747 		return PTR_ERR(hwdev->pxlclk);  in malidp_bind()
784 	if (!malidp_is_compatible_hw_id(hwdev, dev_id)) {  in malidp_bind()
789 	ret = hwdev->hw->query_hw(hwdev);  in malidp_bind()
795 	version = malidp_hw_read(hwdev, hwdev->hw->map.dc_base + MALIDP_DE_CORE_ID);  in malidp_bind()
803 					&hwdev->arqos_value);  in malidp_bind()
805 		hwdev->arqos_value = 0x0;  in malidp_bind()
816 	malidp_hw_write(hwdev, out_depth, hwdev->hw->map.out_depth_base);  in malidp_bind()
817 	hwdev->output_color_depth = out_depth;  in malidp_bind()
873 	malidp_se_irq_fini(hwdev);  in malidp_bind()
874 	malidp_de_irq_fini(hwdev);  in malidp_bind()
902 	struct malidp_hw_device *hwdev = malidp->dev;  in malidp_unbind()  local
908 	malidp_se_irq_fini(hwdev);  in malidp_unbind()
909 	malidp_de_irq_fini(hwdev);  in malidp_unbind()