Lines Matching refs:bank_num
192 unsigned int *bank_num, in zynq_gpio_get_bank_pin() argument
201 *bank_num = bank; in zynq_gpio_get_bank_pin()
212 *bank_num = 0; in zynq_gpio_get_bank_pin()
228 unsigned int bank_num, bank_pin_num; in zynq_gpio_get_value() local
231 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio); in zynq_gpio_get_value()
235 if (bank_num <= 1) { in zynq_gpio_get_value()
237 ZYNQ_GPIO_DATA_RO_OFFSET(bank_num)); in zynq_gpio_get_value()
240 ZYNQ_GPIO_DATA_OFFSET(bank_num)); in zynq_gpio_get_value()
243 if (bank_num <= 2) { in zynq_gpio_get_value()
245 ZYNQ_GPIO_DATA_RO_OFFSET(bank_num)); in zynq_gpio_get_value()
248 ZYNQ_GPIO_DATA_OFFSET(bank_num)); in zynq_gpio_get_value()
253 ZYNQ_GPIO_DATA_RO_OFFSET(bank_num)); in zynq_gpio_get_value()
271 unsigned int reg_offset, bank_num, bank_pin_num; in zynq_gpio_set_value() local
274 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio); in zynq_gpio_set_value()
279 reg_offset = ZYNQ_GPIO_DATA_MSW_OFFSET(bank_num); in zynq_gpio_set_value()
281 reg_offset = ZYNQ_GPIO_DATA_LSW_OFFSET(bank_num); in zynq_gpio_set_value()
308 unsigned int bank_num, bank_pin_num; in zynq_gpio_dir_in() local
312 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio); in zynq_gpio_dir_in()
318 if (zynq_gpio_is_zynq(gpio) && bank_num == 0 && in zynq_gpio_dir_in()
324 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); in zynq_gpio_dir_in()
326 writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); in zynq_gpio_dir_in()
348 unsigned int bank_num, bank_pin_num; in zynq_gpio_dir_out() local
352 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio); in zynq_gpio_dir_out()
356 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); in zynq_gpio_dir_out()
358 writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); in zynq_gpio_dir_out()
361 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_OUTEN_OFFSET(bank_num)); in zynq_gpio_dir_out()
363 writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_OUTEN_OFFSET(bank_num)); in zynq_gpio_dir_out()
383 unsigned int bank_num, bank_pin_num; in zynq_gpio_get_direction() local
386 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio); in zynq_gpio_get_direction()
388 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); in zynq_gpio_get_direction()
406 unsigned int device_pin_num, bank_num, bank_pin_num; in zynq_gpio_irq_mask() local
411 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio); in zynq_gpio_irq_mask()
413 gpio->base_addr + ZYNQ_GPIO_INTDIS_OFFSET(bank_num)); in zynq_gpio_irq_mask()
427 unsigned int device_pin_num, bank_num, bank_pin_num; in zynq_gpio_irq_unmask() local
432 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio); in zynq_gpio_irq_unmask()
434 gpio->base_addr + ZYNQ_GPIO_INTEN_OFFSET(bank_num)); in zynq_gpio_irq_unmask()
447 unsigned int device_pin_num, bank_num, bank_pin_num; in zynq_gpio_irq_ack() local
452 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio); in zynq_gpio_irq_ack()
454 gpio->base_addr + ZYNQ_GPIO_INTSTS_OFFSET(bank_num)); in zynq_gpio_irq_ack()
498 unsigned int device_pin_num, bank_num, bank_pin_num; in zynq_gpio_set_irq_type() local
503 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio); in zynq_gpio_set_irq_type()
506 ZYNQ_GPIO_INTTYPE_OFFSET(bank_num)); in zynq_gpio_set_irq_type()
508 ZYNQ_GPIO_INTPOL_OFFSET(bank_num)); in zynq_gpio_set_irq_type()
510 ZYNQ_GPIO_INTANY_OFFSET(bank_num)); in zynq_gpio_set_irq_type()
544 gpio->base_addr + ZYNQ_GPIO_INTTYPE_OFFSET(bank_num)); in zynq_gpio_set_irq_type()
546 gpio->base_addr + ZYNQ_GPIO_INTPOL_OFFSET(bank_num)); in zynq_gpio_set_irq_type()
548 gpio->base_addr + ZYNQ_GPIO_INTANY_OFFSET(bank_num)); in zynq_gpio_set_irq_type()
621 unsigned int bank_num, in zynq_gpio_handle_bank_irq() argument
624 unsigned int bank_offset = gpio->p_data->bank_min[bank_num]; in zynq_gpio_handle_bank_irq()
652 unsigned int bank_num; in zynq_gpio_irqhandler() local
659 for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++) { in zynq_gpio_irqhandler()
661 ZYNQ_GPIO_INTSTS_OFFSET(bank_num)); in zynq_gpio_irqhandler()
663 ZYNQ_GPIO_INTMASK_OFFSET(bank_num)); in zynq_gpio_irqhandler()
664 zynq_gpio_handle_bank_irq(gpio, bank_num, int_sts & ~int_enb); in zynq_gpio_irqhandler()
666 bank_num = bank_num + VERSAL_UNUSED_BANKS; in zynq_gpio_irqhandler()
674 unsigned int bank_num; in zynq_gpio_save_context() local
676 for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++) { in zynq_gpio_save_context()
677 gpio->context.datalsw[bank_num] = in zynq_gpio_save_context()
679 ZYNQ_GPIO_DATA_LSW_OFFSET(bank_num)); in zynq_gpio_save_context()
680 gpio->context.datamsw[bank_num] = in zynq_gpio_save_context()
682 ZYNQ_GPIO_DATA_MSW_OFFSET(bank_num)); in zynq_gpio_save_context()
683 gpio->context.dirm[bank_num] = readl_relaxed(gpio->base_addr + in zynq_gpio_save_context()
684 ZYNQ_GPIO_DIRM_OFFSET(bank_num)); in zynq_gpio_save_context()
685 gpio->context.int_en[bank_num] = readl_relaxed(gpio->base_addr + in zynq_gpio_save_context()
686 ZYNQ_GPIO_INTMASK_OFFSET(bank_num)); in zynq_gpio_save_context()
687 gpio->context.int_type[bank_num] = in zynq_gpio_save_context()
689 ZYNQ_GPIO_INTTYPE_OFFSET(bank_num)); in zynq_gpio_save_context()
690 gpio->context.int_polarity[bank_num] = in zynq_gpio_save_context()
692 ZYNQ_GPIO_INTPOL_OFFSET(bank_num)); in zynq_gpio_save_context()
693 gpio->context.int_any[bank_num] = in zynq_gpio_save_context()
695 ZYNQ_GPIO_INTANY_OFFSET(bank_num)); in zynq_gpio_save_context()
697 bank_num = bank_num + VERSAL_UNUSED_BANKS; in zynq_gpio_save_context()
703 unsigned int bank_num; in zynq_gpio_restore_context() local
705 for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++) { in zynq_gpio_restore_context()
707 ZYNQ_GPIO_INTDIS_OFFSET(bank_num)); in zynq_gpio_restore_context()
708 writel_relaxed(gpio->context.datalsw[bank_num], in zynq_gpio_restore_context()
710 ZYNQ_GPIO_DATA_LSW_OFFSET(bank_num)); in zynq_gpio_restore_context()
711 writel_relaxed(gpio->context.datamsw[bank_num], in zynq_gpio_restore_context()
713 ZYNQ_GPIO_DATA_MSW_OFFSET(bank_num)); in zynq_gpio_restore_context()
714 writel_relaxed(gpio->context.dirm[bank_num], in zynq_gpio_restore_context()
716 ZYNQ_GPIO_DIRM_OFFSET(bank_num)); in zynq_gpio_restore_context()
717 writel_relaxed(gpio->context.int_type[bank_num], in zynq_gpio_restore_context()
719 ZYNQ_GPIO_INTTYPE_OFFSET(bank_num)); in zynq_gpio_restore_context()
720 writel_relaxed(gpio->context.int_polarity[bank_num], in zynq_gpio_restore_context()
722 ZYNQ_GPIO_INTPOL_OFFSET(bank_num)); in zynq_gpio_restore_context()
723 writel_relaxed(gpio->context.int_any[bank_num], in zynq_gpio_restore_context()
725 ZYNQ_GPIO_INTANY_OFFSET(bank_num)); in zynq_gpio_restore_context()
726 writel_relaxed(~(gpio->context.int_en[bank_num]), in zynq_gpio_restore_context()
728 ZYNQ_GPIO_INTEN_OFFSET(bank_num)); in zynq_gpio_restore_context()
730 bank_num = bank_num + VERSAL_UNUSED_BANKS; in zynq_gpio_restore_context()
899 int ret, bank_num; in zynq_gpio_probe() local
960 for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++) { in zynq_gpio_probe()
962 ZYNQ_GPIO_INTDIS_OFFSET(bank_num)); in zynq_gpio_probe()
964 bank_num = bank_num + VERSAL_UNUSED_BANKS; in zynq_gpio_probe()