56 	u8 __iomem		*register_base;  member
78 	u64 bit_cfg = readq(txgpio->register_base + bit_cfg_reg(line));  in thunderx_gpio_is_gpio_nowarn()
115 	       txgpio->register_base + bit_cfg_reg(line));  in thunderx_gpio_dir_in()
127 	void __iomem *reg = txgpio->register_base +  in thunderx_gpio_set()
152 	writeq(bit_cfg, txgpio->register_base + bit_cfg_reg(line));  in thunderx_gpio_dir_out()
171 	bit_cfg = readq(txgpio->register_base + bit_cfg_reg(line));  in thunderx_gpio_get_direction()
190 	void __iomem *reg = txgpio->register_base + (bank * GPIO_2ND_BANK) + GPIO_TX_SET;  in thunderx_gpio_set_config()
201 	bit_cfg = readq(txgpio->register_base + bit_cfg_reg(line));  in thunderx_gpio_set_config()
240 		writeq(bit_cfg, txgpio->register_base + bit_cfg_reg(line));  in thunderx_gpio_set_config()
264 	u64 read_bits = readq(txgpio->register_base + (bank * GPIO_2ND_BANK) + GPIO_RX_DAT);  in thunderx_gpio_get()
284 		writeq(set_bits, txgpio->register_base + (bank * GPIO_2ND_BANK) + GPIO_TX_SET);  in thunderx_gpio_set_multiple()
285 		writeq(clear_bits, txgpio->register_base + (bank * GPIO_2ND_BANK) + GPIO_TX_CLR);  in thunderx_gpio_set_multiple()
295 	       txgpio->register_base + intr_reg(irqd_to_hwirq(d)));  in thunderx_gpio_irq_ack()
304 	       txgpio->register_base + intr_reg(irqd_to_hwirq(d)));  in thunderx_gpio_irq_mask()
313 	       txgpio->register_base + intr_reg(irqd_to_hwirq(d)));  in thunderx_gpio_irq_mask_ack()
322 	       txgpio->register_base + intr_reg(irqd_to_hwirq(d)));  in thunderx_gpio_irq_unmask()
353 	writeq(bit_cfg, txgpio->register_base + bit_cfg_reg(txline->line));  in thunderx_gpio_irq_set_type()
458 	txgpio->register_base = tbl[0];  in thunderx_gpio_probe()
459 	if (!txgpio->register_base) {  in thunderx_gpio_probe()
470 		u64 c = readq(txgpio->register_base + GPIO_CONST);  in thunderx_gpio_probe()
494 		u64 bit_cfg = readq(txgpio->register_base + bit_cfg_reg(i));  in thunderx_gpio_probe()