165 #define BANK_SZ 8  macro
166 #define MAX_LINE	(MAX_BANK * BANK_SZ)
168 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
217 	return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);  in pca953x_bank_shift()
388 	u8 regaddr = pinctrl | addr | (off / BANK_SZ);  in pca953x_recalc_addr()
400 		value[i] = bitmap_get_value8(val, i * BANK_SZ);  in pca953x_write_regs()
424 		bitmap_set_value8(val, value[i], i * BANK_SZ);  in pca953x_read_regs()
433 	u8 bit = BIT(off % BANK_SZ);  in pca953x_gpio_direction_input()
448 	u8 bit = BIT(off % BANK_SZ);  in pca953x_gpio_direction_output()
468 	u8 bit = BIT(off % BANK_SZ);  in pca953x_gpio_get_value()
485 	u8 bit = BIT(off % BANK_SZ);  in pca953x_gpio_set_value()
496 	u8 bit = BIT(off % BANK_SZ);  in pca953x_gpio_get_direction()
554 	u8 bit = BIT(offset % BANK_SZ);  in pca953x_gpio_set_pull_up_down()
717 	shift = hwirq * 2 % BANK_SZ;  in pca953x_irq_set_type()
948 		bitmap_set_value8(val, 0x02, i * BANK_SZ);  in device_pca957x_init()