Lines Matching refs:mpc8xxx_gc
68 struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc); in mpc8572_gpio_get() local
71 out_mask = gc->read_reg(mpc8xxx_gc->regs + GPIO_DIR); in mpc8572_gpio_get()
72 val = gc->read_reg(mpc8xxx_gc->regs + GPIO_DAT) & ~out_mask; in mpc8572_gpio_get()
81 struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc); in mpc5121_gpio_dir_out() local
86 return mpc8xxx_gc->direction_output(gc, gpio, val); in mpc5121_gpio_dir_out()
92 struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc); in mpc5125_gpio_dir_out() local
97 return mpc8xxx_gc->direction_output(gc, gpio, val); in mpc5125_gpio_dir_out()
102 struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc); in mpc8xxx_gpio_to_irq() local
104 if (mpc8xxx_gc->irq && offset < MPC8XXX_GPIO_PINS) in mpc8xxx_gpio_to_irq()
105 return irq_create_mapping(mpc8xxx_gc->irq, offset); in mpc8xxx_gpio_to_irq()
112 struct mpc8xxx_gpio_chip *mpc8xxx_gc = data; in mpc8xxx_gpio_irq_cascade() local
113 struct gpio_chip *gc = &mpc8xxx_gc->gc; in mpc8xxx_gpio_irq_cascade()
117 mask = gc->read_reg(mpc8xxx_gc->regs + GPIO_IER) in mpc8xxx_gpio_irq_cascade()
118 & gc->read_reg(mpc8xxx_gc->regs + GPIO_IMR); in mpc8xxx_gpio_irq_cascade()
120 generic_handle_irq(irq_linear_revmap(mpc8xxx_gc->irq, 31 - i)); in mpc8xxx_gpio_irq_cascade()
127 struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d); in mpc8xxx_irq_unmask() local
128 struct gpio_chip *gc = &mpc8xxx_gc->gc; in mpc8xxx_irq_unmask()
131 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags); in mpc8xxx_irq_unmask()
133 gc->write_reg(mpc8xxx_gc->regs + GPIO_IMR, in mpc8xxx_irq_unmask()
134 gc->read_reg(mpc8xxx_gc->regs + GPIO_IMR) in mpc8xxx_irq_unmask()
137 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); in mpc8xxx_irq_unmask()
142 struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d); in mpc8xxx_irq_mask() local
143 struct gpio_chip *gc = &mpc8xxx_gc->gc; in mpc8xxx_irq_mask()
146 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags); in mpc8xxx_irq_mask()
148 gc->write_reg(mpc8xxx_gc->regs + GPIO_IMR, in mpc8xxx_irq_mask()
149 gc->read_reg(mpc8xxx_gc->regs + GPIO_IMR) in mpc8xxx_irq_mask()
152 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); in mpc8xxx_irq_mask()
157 struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d); in mpc8xxx_irq_ack() local
158 struct gpio_chip *gc = &mpc8xxx_gc->gc; in mpc8xxx_irq_ack()
160 gc->write_reg(mpc8xxx_gc->regs + GPIO_IER, in mpc8xxx_irq_ack()
166 struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d); in mpc8xxx_irq_set_type() local
167 struct gpio_chip *gc = &mpc8xxx_gc->gc; in mpc8xxx_irq_set_type()
173 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags); in mpc8xxx_irq_set_type()
174 gc->write_reg(mpc8xxx_gc->regs + GPIO_ICR, in mpc8xxx_irq_set_type()
175 gc->read_reg(mpc8xxx_gc->regs + GPIO_ICR) in mpc8xxx_irq_set_type()
177 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); in mpc8xxx_irq_set_type()
181 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags); in mpc8xxx_irq_set_type()
182 gc->write_reg(mpc8xxx_gc->regs + GPIO_ICR, in mpc8xxx_irq_set_type()
183 gc->read_reg(mpc8xxx_gc->regs + GPIO_ICR) in mpc8xxx_irq_set_type()
185 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); in mpc8xxx_irq_set_type()
197 struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d); in mpc512x_irq_set_type() local
198 struct gpio_chip *gc = &mpc8xxx_gc->gc; in mpc512x_irq_set_type()
205 reg = mpc8xxx_gc->regs + GPIO_ICR; in mpc512x_irq_set_type()
208 reg = mpc8xxx_gc->regs + GPIO_ICR2; in mpc512x_irq_set_type()
215 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags); in mpc512x_irq_set_type()
218 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); in mpc512x_irq_set_type()
223 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags); in mpc512x_irq_set_type()
226 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); in mpc512x_irq_set_type()
230 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags); in mpc512x_irq_set_type()
232 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); in mpc512x_irq_set_type()
305 struct mpc8xxx_gpio_chip *mpc8xxx_gc; in mpc8xxx_probe() local
311 mpc8xxx_gc = devm_kzalloc(&pdev->dev, sizeof(*mpc8xxx_gc), GFP_KERNEL); in mpc8xxx_probe()
312 if (!mpc8xxx_gc) in mpc8xxx_probe()
315 platform_set_drvdata(pdev, mpc8xxx_gc); in mpc8xxx_probe()
317 raw_spin_lock_init(&mpc8xxx_gc->lock); in mpc8xxx_probe()
319 mpc8xxx_gc->regs = of_iomap(np, 0); in mpc8xxx_probe()
320 if (!mpc8xxx_gc->regs) in mpc8xxx_probe()
323 gc = &mpc8xxx_gc->gc; in mpc8xxx_probe()
328 mpc8xxx_gc->regs + GPIO_DAT, in mpc8xxx_probe()
330 mpc8xxx_gc->regs + GPIO_DIR, NULL, in mpc8xxx_probe()
337 mpc8xxx_gc->regs + GPIO_DAT, in mpc8xxx_probe()
339 mpc8xxx_gc->regs + GPIO_DIR, NULL, in mpc8xxx_probe()
347 mpc8xxx_gc->direction_output = gc->direction_output; in mpc8xxx_probe()
376 gc->write_reg(mpc8xxx_gc->regs + GPIO_IBE, 0xffffffff); in mpc8xxx_probe()
378 ret = devm_gpiochip_add_data(&pdev->dev, gc, mpc8xxx_gc); in mpc8xxx_probe()
385 mpc8xxx_gc->irqn = irq_of_parse_and_map(np, 0); in mpc8xxx_probe()
386 if (!mpc8xxx_gc->irqn) in mpc8xxx_probe()
389 mpc8xxx_gc->irq = irq_domain_add_linear(np, MPC8XXX_GPIO_PINS, in mpc8xxx_probe()
390 &mpc8xxx_gpio_irq_ops, mpc8xxx_gc); in mpc8xxx_probe()
391 if (!mpc8xxx_gc->irq) in mpc8xxx_probe()
395 gc->write_reg(mpc8xxx_gc->regs + GPIO_IER, 0xffffffff); in mpc8xxx_probe()
396 gc->write_reg(mpc8xxx_gc->regs + GPIO_IMR, 0); in mpc8xxx_probe()
398 ret = devm_request_irq(&pdev->dev, mpc8xxx_gc->irqn, in mpc8xxx_probe()
401 mpc8xxx_gc); in mpc8xxx_probe()
404 np->full_name, mpc8xxx_gc->irqn, ret); in mpc8xxx_probe()
410 if (mpc8xxx_gc->irq) in mpc8xxx_probe()
411 irq_domain_remove(mpc8xxx_gc->irq); in mpc8xxx_probe()
412 iounmap(mpc8xxx_gc->regs); in mpc8xxx_probe()
418 struct mpc8xxx_gpio_chip *mpc8xxx_gc = platform_get_drvdata(pdev); in mpc8xxx_remove() local
420 if (mpc8xxx_gc->irq) { in mpc8xxx_remove()
421 irq_set_chained_handler_and_data(mpc8xxx_gc->irqn, NULL, NULL); in mpc8xxx_remove()
422 irq_domain_remove(mpc8xxx_gc->irq); in mpc8xxx_remove()
425 iounmap(mpc8xxx_gc->regs); in mpc8xxx_remove()