46 	struct mlxbf_gpio_context_save_regs csave_regs;  member
95 	gs->csave_regs.scratchpad = readq(gs->base + MLXBF_GPIO_SCRATCHPAD);  in mlxbf_gpio_suspend()
96 	gs->csave_regs.pad_control[0] =  in mlxbf_gpio_suspend()
98 	gs->csave_regs.pad_control[1] =  in mlxbf_gpio_suspend()
100 	gs->csave_regs.pad_control[2] =  in mlxbf_gpio_suspend()
102 	gs->csave_regs.pad_control[3] =  in mlxbf_gpio_suspend()
104 	gs->csave_regs.pin_dir_i = readq(gs->base + MLXBF_GPIO_PIN_DIR_I);  in mlxbf_gpio_suspend()
105 	gs->csave_regs.pin_dir_o = readq(gs->base + MLXBF_GPIO_PIN_DIR_O);  in mlxbf_gpio_suspend()
114 	writeq(gs->csave_regs.scratchpad, gs->base + MLXBF_GPIO_SCRATCHPAD);  in mlxbf_gpio_resume()
115 	writeq(gs->csave_regs.pad_control[0],  in mlxbf_gpio_resume()
117 	writeq(gs->csave_regs.pad_control[1],  in mlxbf_gpio_resume()
119 	writeq(gs->csave_regs.pad_control[2],  in mlxbf_gpio_resume()
121 	writeq(gs->csave_regs.pad_control[3],  in mlxbf_gpio_resume()
123 	writeq(gs->csave_regs.pin_dir_i, gs->base + MLXBF_GPIO_PIN_DIR_I);  in mlxbf_gpio_resume()
124 	writeq(gs->csave_regs.pin_dir_o, gs->base + MLXBF_GPIO_PIN_DIR_O);  in mlxbf_gpio_resume()