29 	GPIO_USE_SEL = 0,
36 	{0x00, 0x30, 0x40},	/* USE_SEL[1-3] offsets */
37 	{0x04, 0x34, 0x44},	/* IO_SEL[1-3] offsets */
38 	{0x0c, 0x38, 0x48},	/* LVL[1-3] offsets */
39 	{0x18, 0x18, 0x18},	/* BLINK offset */
43 	0x30, 0x10, 0x10,
47 	{0x00, 0x80, 0x00},
48 	{0x04, 0x84, 0x00},
49 	{0x08, 0x88, 0x00},
53 	0x10, 0x10, 0x00,
108 	int bit = nr & 0x1f;  in ichx_write_bit()
132 	return (verify && data != tmp) ? -EPERM : 0;  in ichx_write_bit()
140 	int bit = nr & 0x1f;  in ichx_read_bit()
180 	/* Disable blink hardware which is available for GPIOs from 0 to 31. */  in ichx_gpio_direction_output()
182 		ichx_write_bit(GPO_BLINK, nr, 0, 0);  in ichx_gpio_direction_output()
185 	ichx_write_bit(GPIO_LVL, nr, val, 0);  in ichx_gpio_direction_output()
191 	return ichx_write_bit(GPIO_IO_SEL, nr, 0, 1);  in ichx_gpio_direction_output()
205 	 * GPI 0 - 15 need to be read from the power management registers on  in ich6_gpio_get()
214 		/* GPI 0 - 15 are latched, write 1 to clear*/  in ich6_gpio_get()
215 		ICHX_WRITE(BIT(16 + nr), 0, ichx_priv.pm_base);  in ich6_gpio_get()
216 		data = ICHX_READ(0, ichx_priv.pm_base);  in ich6_gpio_get()
237 	if (ichx_priv.desc->use_sel_ignore[nr / 32] & BIT(nr & 0x1f))  in ichx_gpio_request()
238 		return 0;  in ichx_gpio_request()
240 	return ichx_read_bit(GPIO_USE_SEL, nr) ? 0 : -ENODEV;  in ichx_gpio_request()
247 	 * bridge as they are controlled by USE register bits 0 and 1.  See  in ich6_gpio_request()
259 	ichx_write_bit(GPIO_LVL, nr, val, 0);  in ichx_gpio_set()
286 	/* Bridges using the ICH6 controller need fixups for GPIO 0 - 17 */
290 	/* GPIO 0-15 are read in the GPE0_STS PM register */
302 	 * Bits 16,17, 20 of USE_SEL and bit 16 of USE_SEL2 always read 0 on
306 	.use_sel_ignore = {0x00130000, 0x00010000, 0x0},
308 	/* The 3100 needs fixups for GPIO 0 - 17 */
312 	/* GPIO 0-15 are read in the GPE0_STS PM register */
376 	for (i = 0; i < ARRAY_SIZE(ichx_priv.desc->regs[0]); i++) {  in ichx_gpio_request_regions()
380 				res_base->start + ichx_priv.desc->regs[0][i],  in ichx_gpio_request_regions()
384 	return 0;  in ichx_gpio_request_regions()
441 	 * 0 - 15 on some chipsets.  in ichx_gpio_probe()
448 		dev_warn(dev, "ACPI BAR is unavailable, GPI 0 - 15 unavailable\n");  in ichx_gpio_probe()
454 		dev_warn(dev, "ACPI BAR is busy, GPI 0 - 15 unavailable\n");  in ichx_gpio_probe()
471 	return 0;  in ichx_gpio_probe()
478 	return 0;  in ichx_gpio_remove()