89 static int dln2_gpio_pin_cmd(struct dln2_gpio *dln2, int cmd, unsigned pin)  in dln2_gpio_pin_cmd()  argument
95 	return dln2_transfer_tx(dln2->pdev, cmd, &req, sizeof(req));  in dln2_gpio_pin_cmd()
98 static int dln2_gpio_pin_val(struct dln2_gpio *dln2, int cmd, unsigned int pin)  in dln2_gpio_pin_val()  argument
107 	ret = dln2_transfer(dln2->pdev, cmd, &req, sizeof(req), &rsp, &len);  in dln2_gpio_pin_val()
116 static int dln2_gpio_pin_get_in_val(struct dln2_gpio *dln2, unsigned int pin)  in dln2_gpio_pin_get_in_val()  argument
120 	ret = dln2_gpio_pin_val(dln2, DLN2_GPIO_PIN_GET_VAL, pin);  in dln2_gpio_pin_get_in_val()
126 static int dln2_gpio_pin_get_out_val(struct dln2_gpio *dln2, unsigned int pin)  in dln2_gpio_pin_get_out_val()  argument
130 	ret = dln2_gpio_pin_val(dln2, DLN2_GPIO_PIN_GET_OUT_VAL, pin);  in dln2_gpio_pin_get_out_val()
136 static int dln2_gpio_pin_set_out_val(struct dln2_gpio *dln2,  in dln2_gpio_pin_set_out_val()  argument
144 	return dln2_transfer_tx(dln2->pdev, DLN2_GPIO_PIN_SET_OUT_VAL, &req,  in dln2_gpio_pin_set_out_val()
153 	struct dln2_gpio *dln2 = gpiochip_get_data(chip);  in dln2_gpio_request()  local
161 	ret = dln2_gpio_pin_cmd(dln2, DLN2_GPIO_PIN_ENABLE, offset);  in dln2_gpio_request()
166 	ret = dln2_transfer(dln2->pdev, DLN2_GPIO_PIN_GET_DIRECTION,  in dln2_gpio_request()
177 		clear_bit(offset, dln2->output_enabled);  in dln2_gpio_request()
180 		set_bit(offset, dln2->output_enabled);  in dln2_gpio_request()
188 	dln2_gpio_pin_cmd(dln2, DLN2_GPIO_PIN_DISABLE, offset);  in dln2_gpio_request()
194 	struct dln2_gpio *dln2 = gpiochip_get_data(chip);  in dln2_gpio_free()  local
196 	dln2_gpio_pin_cmd(dln2, DLN2_GPIO_PIN_DISABLE, offset);  in dln2_gpio_free()
201 	struct dln2_gpio *dln2 = gpiochip_get_data(chip);  in dln2_gpio_get_direction()  local
203 	if (test_bit(offset, dln2->output_enabled))  in dln2_gpio_get_direction()
211 	struct dln2_gpio *dln2 = gpiochip_get_data(chip);  in dln2_gpio_get()  local
219 		return dln2_gpio_pin_get_in_val(dln2, offset);  in dln2_gpio_get()
221 	return dln2_gpio_pin_get_out_val(dln2, offset);  in dln2_gpio_get()
226 	struct dln2_gpio *dln2 = gpiochip_get_data(chip);  in dln2_gpio_set()  local
228 	dln2_gpio_pin_set_out_val(dln2, offset, value);  in dln2_gpio_set()
234 	struct dln2_gpio *dln2 = gpiochip_get_data(chip);  in dln2_gpio_set_direction()  local
241 	ret = dln2_transfer_tx(dln2->pdev, DLN2_GPIO_PIN_SET_DIRECTION,  in dln2_gpio_set_direction()
247 		set_bit(offset, dln2->output_enabled);  in dln2_gpio_set_direction()
249 		clear_bit(offset, dln2->output_enabled);  in dln2_gpio_set_direction()
262 	struct dln2_gpio *dln2 = gpiochip_get_data(chip);  in dln2_gpio_direction_output()  local
265 	ret = dln2_gpio_pin_set_out_val(dln2, offset, value);  in dln2_gpio_direction_output()
275 	struct dln2_gpio *dln2 = gpiochip_get_data(chip);  in dln2_gpio_set_config()  local
282 	return dln2_transfer_tx(dln2->pdev, DLN2_GPIO_SET_DEBOUNCE,  in dln2_gpio_set_config()
286 static int dln2_gpio_set_event_cfg(struct dln2_gpio *dln2, unsigned pin,  in dln2_gpio_set_event_cfg()  argument
299 	return dln2_transfer_tx(dln2->pdev, DLN2_GPIO_PIN_SET_EVENT_CFG,  in dln2_gpio_set_event_cfg()
306 	struct dln2_gpio *dln2 = gpiochip_get_data(gc);  in dln2_irq_unmask()  local
309 	set_bit(pin, dln2->unmasked_irqs);  in dln2_irq_unmask()
315 	struct dln2_gpio *dln2 = gpiochip_get_data(gc);  in dln2_irq_mask()  local
318 	clear_bit(pin, dln2->unmasked_irqs);  in dln2_irq_mask()
324 	struct dln2_gpio *dln2 = gpiochip_get_data(gc);  in dln2_irq_set_type()  local
329 		dln2->irq_type[pin] = DLN2_GPIO_EVENT_LVL_HIGH;  in dln2_irq_set_type()
332 		dln2->irq_type[pin] = DLN2_GPIO_EVENT_LVL_LOW;  in dln2_irq_set_type()
335 		dln2->irq_type[pin] = DLN2_GPIO_EVENT_CHANGE;  in dln2_irq_set_type()
338 		dln2->irq_type[pin] = DLN2_GPIO_EVENT_CHANGE_RISING;  in dln2_irq_set_type()
341 		dln2->irq_type[pin] = DLN2_GPIO_EVENT_CHANGE_FALLING;  in dln2_irq_set_type()
353 	struct dln2_gpio *dln2 = gpiochip_get_data(gc);  in dln2_irq_bus_lock()  local
355 	mutex_lock(&dln2->irq_lock);  in dln2_irq_bus_lock()
361 	struct dln2_gpio *dln2 = gpiochip_get_data(gc);  in dln2_irq_bus_unlock()  local
367 	enabled = test_bit(pin, dln2->enabled_irqs);  in dln2_irq_bus_unlock()
368 	unmasked = test_bit(pin, dln2->unmasked_irqs);  in dln2_irq_bus_unlock()
372 			type = dln2->irq_type[pin] & DLN2_GPIO_EVENT_MASK;  in dln2_irq_bus_unlock()
373 			set_bit(pin, dln2->enabled_irqs);  in dln2_irq_bus_unlock()
376 			clear_bit(pin, dln2->enabled_irqs);  in dln2_irq_bus_unlock()
379 		ret = dln2_gpio_set_event_cfg(dln2, pin, type, 0);  in dln2_irq_bus_unlock()
381 			dev_err(dln2->gpio.parent, "failed to set event\n");  in dln2_irq_bus_unlock()
384 	mutex_unlock(&dln2->irq_lock);  in dln2_irq_bus_unlock()
398 	struct dln2_gpio *dln2 = platform_get_drvdata(pdev);  in dln2_gpio_event()  local
401 		dev_err(dln2->gpio.parent, "short event message\n");  in dln2_gpio_event()
406 	if (pin >= dln2->gpio.ngpio) {  in dln2_gpio_event()
407 		dev_err(dln2->gpio.parent, "out of bounds pin %d\n", pin);  in dln2_gpio_event()
411 	irq = irq_find_mapping(dln2->gpio.irq.domain, pin);  in dln2_gpio_event()
413 		dev_err(dln2->gpio.parent, "pin %d not mapped to IRQ\n", pin);  in dln2_gpio_event()
417 	switch (dln2->irq_type[pin]) {  in dln2_gpio_event()
433 	struct dln2_gpio *dln2;  in dln2_gpio_probe()  local
449 	dln2 = devm_kzalloc(&pdev->dev, sizeof(*dln2), GFP_KERNEL);  in dln2_gpio_probe()
450 	if (!dln2)  in dln2_gpio_probe()
453 	mutex_init(&dln2->irq_lock);  in dln2_gpio_probe()
455 	dln2->pdev = pdev;  in dln2_gpio_probe()
457 	dln2->gpio.label = "dln2";  in dln2_gpio_probe()
458 	dln2->gpio.parent = dev;  in dln2_gpio_probe()
459 	dln2->gpio.owner = THIS_MODULE;  in dln2_gpio_probe()
460 	dln2->gpio.base = -1;  in dln2_gpio_probe()
461 	dln2->gpio.ngpio = pins;  in dln2_gpio_probe()
462 	dln2->gpio.can_sleep = true;  in dln2_gpio_probe()
463 	dln2->gpio.set = dln2_gpio_set;  in dln2_gpio_probe()
464 	dln2->gpio.get = dln2_gpio_get;  in dln2_gpio_probe()
465 	dln2->gpio.request = dln2_gpio_request;  in dln2_gpio_probe()
466 	dln2->gpio.free = dln2_gpio_free;  in dln2_gpio_probe()
467 	dln2->gpio.get_direction = dln2_gpio_get_direction;  in dln2_gpio_probe()
468 	dln2->gpio.direction_input = dln2_gpio_direction_input;  in dln2_gpio_probe()
469 	dln2->gpio.direction_output = dln2_gpio_direction_output;  in dln2_gpio_probe()
470 	dln2->gpio.set_config = dln2_gpio_set_config;  in dln2_gpio_probe()
472 	dln2->irqchip.name = "dln2-irq",  in dln2_gpio_probe()
473 	dln2->irqchip.irq_mask = dln2_irq_mask,  in dln2_gpio_probe()
474 	dln2->irqchip.irq_unmask = dln2_irq_unmask,  in dln2_gpio_probe()
475 	dln2->irqchip.irq_set_type = dln2_irq_set_type,  in dln2_gpio_probe()
476 	dln2->irqchip.irq_bus_lock = dln2_irq_bus_lock,  in dln2_gpio_probe()
477 	dln2->irqchip.irq_bus_sync_unlock = dln2_irq_bus_unlock,  in dln2_gpio_probe()
479 	girq = &dln2->gpio.irq;  in dln2_gpio_probe()
480 	girq->chip = &dln2->irqchip;  in dln2_gpio_probe()
488 	platform_set_drvdata(pdev, dln2);  in dln2_gpio_probe()
490 	ret = devm_gpiochip_add_data(dev, &dln2->gpio, dln2);  in dln2_gpio_probe()