Lines Matching refs:dram_rule
324 const u32 *dram_rule; member
1350 u32 dram_rule, interleave_reg; in knl_get_dimm_capacity() local
1421 pvt->info.dram_rule[sad_rule], &dram_rule); in knl_get_dimm_capacity()
1423 if (!DRAM_RULE_ENABLE(dram_rule)) in knl_get_dimm_capacity()
1426 edram_only = KNL_EDRAM_ONLY(dram_rule); in knl_get_dimm_capacity()
1428 sad_limit = pvt->info.sad_limit(dram_rule)+1; in knl_get_dimm_capacity()
1456 if (KNL_MOD3(dram_rule)) in knl_get_dimm_capacity()
1790 pci_read_config_dword(pvt->pci_sad0, pvt->info.dram_rule[n_sads], in get_memory_layout()
1939 u32 reg, dram_rule; in get_memory_error_data() local
1967 pci_read_config_dword(pvt->pci_sad0, pvt->info.dram_rule[n_sads], in get_memory_error_data()
1986 dram_rule = reg; in get_memory_error_data()
1987 *area_type = show_dram_attr(pvt->info.dram_attr(dram_rule)); in get_memory_error_data()
1988 interleave_mode = pvt->info.interleave_mode(dram_rule); in get_memory_error_data()
2034 int bits, a7mode = A7MODE(dram_rule); in get_memory_error_data()
3265 pvt->info.dram_rule = ibridge_dram_rule; in sbridge_register_mci()
3290 pvt->info.dram_rule = sbridge_dram_rule; in sbridge_register_mci()
3315 pvt->info.dram_rule = ibridge_dram_rule; in sbridge_register_mci()
3340 pvt->info.dram_rule = ibridge_dram_rule; in sbridge_register_mci()
3365 pvt->info.dram_rule = knl_dram_rule; in sbridge_register_mci()