Lines Matching +full:0 +full:x07ffffff
15 #define MV64x60_REVISION " Ver: 2.0.0"
25 #define MV64x60_CPU_ERR_ADDR_LO 0x00 /* 0x0070 */
26 #define MV64x60_CPU_ERR_ADDR_HI 0x08 /* 0x0078 */
27 #define MV64x60_CPU_ERR_DATA_LO 0x00 /* 0x0128 */
28 #define MV64x60_CPU_ERR_DATA_HI 0x08 /* 0x0130 */
29 #define MV64x60_CPU_ERR_PARITY 0x10 /* 0x0138 */
30 #define MV64x60_CPU_ERR_CAUSE 0x18 /* 0x0140 */
31 #define MV64x60_CPU_ERR_MASK 0x20 /* 0x0148 */
33 #define MV64x60_CPU_CAUSE_MASK 0x07ffffff
36 #define MV64X60_SRAM_ERR_CAUSE 0x08 /* 0x0388 */
37 #define MV64X60_SRAM_ERR_ADDR_LO 0x10 /* 0x0390 */
38 #define MV64X60_SRAM_ERR_ADDR_HI 0x78 /* 0x03f8 */
39 #define MV64X60_SRAM_ERR_DATA_LO 0x18 /* 0x0398 */
40 #define MV64X60_SRAM_ERR_DATA_HI 0x20 /* 0x03a0 */
41 #define MV64X60_SRAM_ERR_PARITY 0x28 /* 0x03a8 */
44 #define MV64X60_SDRAM_CONFIG 0x00 /* 0x1400 */
45 #define MV64X60_SDRAM_ERR_DATA_HI 0x40 /* 0x1440 */
46 #define MV64X60_SDRAM_ERR_DATA_LO 0x44 /* 0x1444 */
47 #define MV64X60_SDRAM_ERR_ECC_RCVD 0x48 /* 0x1448 */
48 #define MV64X60_SDRAM_ERR_ECC_CALC 0x4c /* 0x144c */
49 #define MV64X60_SDRAM_ERR_ADDR 0x50 /* 0x1450 */
50 #define MV64X60_SDRAM_ERR_ECC_CNTL 0x54 /* 0x1454 */
51 #define MV64X60_SDRAM_ERR_ECC_ERR_CNT 0x58 /* 0x1458 */
53 #define MV64X60_SDRAM_REGISTERED 0x20000
54 #define MV64X60_SDRAM_ECC 0x40000
58 * Bit 0 of MV64x60_PCIx_ERR_MASK does not exist on the 64360 and because of
59 * errata FEr-#11 and FEr-##16 for the 64460, it should be 0 on that chip as
60 * well. IOW, don't set bit 0.
62 #define MV64X60_PCIx_ERR_MASK_VAL 0x00a50c24
65 #define MV64X60_PCI_ERROR_ADDR_LO 0x00
66 #define MV64X60_PCI_ERROR_ADDR_HI 0x04
67 #define MV64X60_PCI_ERROR_ATTR 0x08
68 #define MV64X60_PCI_ERROR_CMD 0x10
69 #define MV64X60_PCI_ERROR_CAUSE 0x18
70 #define MV64X60_PCI_ERROR_MASK 0x1c
72 #define MV64X60_PCI_ERR_SWrPerr 0x0002
73 #define MV64X60_PCI_ERR_SRdPerr 0x0004
74 #define MV64X60_PCI_ERR_MWrPerr 0x0020
75 #define MV64X60_PCI_ERR_MRdPerr 0x0040