Lines Matching refs:req_tx
1534 struct ti_sci_msg_rm_udmap_tx_ch_cfg req_tx = { 0 }; in udma_tisci_m2m_channel_config() local
1537 req_tx.valid_params = TISCI_TCHAN_VALID_PARAMS; in udma_tisci_m2m_channel_config()
1538 req_tx.nav_id = tisci_rm->tisci_dev_id; in udma_tisci_m2m_channel_config()
1539 req_tx.index = tchan->id; in udma_tisci_m2m_channel_config()
1540 req_tx.tx_chan_type = TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_BCOPY_PBRR; in udma_tisci_m2m_channel_config()
1541 req_tx.tx_fetch_size = sizeof(struct cppi5_desc_hdr_t) >> 2; in udma_tisci_m2m_channel_config()
1542 req_tx.txcq_qnum = tc_ring; in udma_tisci_m2m_channel_config()
1543 req_tx.tx_atype = ud->atype; in udma_tisci_m2m_channel_config()
1545 ret = tisci_ops->tx_ch_cfg(tisci_rm->tisci, &req_tx); in udma_tisci_m2m_channel_config()
1573 struct ti_sci_msg_rm_udmap_tx_ch_cfg req_tx = { 0 }; in udma_tisci_tx_channel_config() local
1586 req_tx.valid_params = TISCI_TCHAN_VALID_PARAMS; in udma_tisci_tx_channel_config()
1587 req_tx.nav_id = tisci_rm->tisci_dev_id; in udma_tisci_tx_channel_config()
1588 req_tx.index = tchan->id; in udma_tisci_tx_channel_config()
1589 req_tx.tx_chan_type = mode; in udma_tisci_tx_channel_config()
1590 req_tx.tx_supr_tdpkt = uc->config.notdpkt; in udma_tisci_tx_channel_config()
1591 req_tx.tx_fetch_size = fetch_size >> 2; in udma_tisci_tx_channel_config()
1592 req_tx.txcq_qnum = tc_ring; in udma_tisci_tx_channel_config()
1593 req_tx.tx_atype = uc->config.atype; in udma_tisci_tx_channel_config()
1595 ret = tisci_ops->tx_ch_cfg(tisci_rm->tisci, &req_tx); in udma_tisci_tx_channel_config()