Lines Matching refs:echan
186 struct edma_chan *echan; member
442 static void edma_set_chmap(struct edma_chan *echan, int slot) in edma_set_chmap() argument
444 struct edma_cc *ecc = echan->ecc; in edma_set_chmap()
445 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_set_chmap()
453 static void edma_setup_interrupt(struct edma_chan *echan, bool enable) in edma_setup_interrupt() argument
455 struct edma_cc *ecc = echan->ecc; in edma_setup_interrupt()
456 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_setup_interrupt()
598 static void edma_start(struct edma_chan *echan) in edma_start() argument
600 struct edma_cc *ecc = echan->ecc; in edma_start()
601 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_start()
605 if (!echan->hw_triggered) { in edma_start()
625 static void edma_stop(struct edma_chan *echan) in edma_stop() argument
627 struct edma_cc *ecc = echan->ecc; in edma_stop()
628 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_stop()
652 static void edma_pause(struct edma_chan *echan) in edma_pause() argument
654 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_pause()
656 edma_shadow0_write_array(echan->ecc, SH_EECR, in edma_pause()
662 static void edma_resume(struct edma_chan *echan) in edma_resume() argument
664 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_resume()
666 edma_shadow0_write_array(echan->ecc, SH_EESR, in edma_resume()
671 static void edma_trigger_channel(struct edma_chan *echan) in edma_trigger_channel() argument
673 struct edma_cc *ecc = echan->ecc; in edma_trigger_channel()
674 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_trigger_channel()
684 static void edma_clean_channel(struct edma_chan *echan) in edma_clean_channel() argument
686 struct edma_cc *ecc = echan->ecc; in edma_clean_channel()
687 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_clean_channel()
702 static void edma_assign_channel_eventq(struct edma_chan *echan, in edma_assign_channel_eventq() argument
705 struct edma_cc *ecc = echan->ecc; in edma_assign_channel_eventq()
706 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_assign_channel_eventq()
720 static int edma_alloc_channel(struct edma_chan *echan, in edma_alloc_channel() argument
723 struct edma_cc *ecc = echan->ecc; in edma_alloc_channel()
724 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_alloc_channel()
726 if (!test_bit(echan->ch_num, ecc->channels_mask)) { in edma_alloc_channel()
728 echan->ch_num); in edma_alloc_channel()
737 edma_stop(echan); in edma_alloc_channel()
739 edma_setup_interrupt(echan, true); in edma_alloc_channel()
741 edma_assign_channel_eventq(echan, eventq_no); in edma_alloc_channel()
746 static void edma_free_channel(struct edma_chan *echan) in edma_free_channel() argument
749 edma_stop(echan); in edma_free_channel()
751 edma_setup_interrupt(echan, false); in edma_free_channel()
775 static void edma_execute(struct edma_chan *echan) in edma_execute() argument
777 struct edma_cc *ecc = echan->ecc; in edma_execute()
780 struct device *dev = echan->vchan.chan.device->dev; in edma_execute()
783 if (!echan->edesc) { in edma_execute()
785 vdesc = vchan_next_desc(&echan->vchan); in edma_execute()
789 echan->edesc = to_edma_desc(&vdesc->tx); in edma_execute()
792 edesc = echan->edesc; in edma_execute()
802 edma_write_slot(ecc, echan->slot[i], &edesc->pset[j].param); in edma_execute()
816 j, echan->ch_num, echan->slot[i], in edma_execute()
827 edma_link(ecc, echan->slot[i], echan->slot[i + 1]); in edma_execute()
839 edma_link(ecc, echan->slot[nslots - 1], echan->slot[1]); in edma_execute()
841 edma_link(ecc, echan->slot[nslots - 1], in edma_execute()
842 echan->ecc->dummy_slot); in edma_execute()
845 if (echan->missed) { in edma_execute()
851 dev_dbg(dev, "missed event on channel %d\n", echan->ch_num); in edma_execute()
852 edma_clean_channel(echan); in edma_execute()
853 edma_stop(echan); in edma_execute()
854 edma_start(echan); in edma_execute()
855 edma_trigger_channel(echan); in edma_execute()
856 echan->missed = 0; in edma_execute()
859 echan->ch_num); in edma_execute()
860 edma_start(echan); in edma_execute()
863 echan->ch_num, edesc->processed); in edma_execute()
864 edma_resume(echan); in edma_execute()
870 struct edma_chan *echan = to_edma_chan(chan); in edma_terminate_all() local
874 spin_lock_irqsave(&echan->vchan.lock, flags); in edma_terminate_all()
881 if (echan->edesc) { in edma_terminate_all()
882 edma_stop(echan); in edma_terminate_all()
884 if (!echan->tc && echan->edesc->cyclic) in edma_terminate_all()
885 edma_assign_channel_eventq(echan, EVENTQ_DEFAULT); in edma_terminate_all()
887 vchan_terminate_vdesc(&echan->edesc->vdesc); in edma_terminate_all()
888 echan->edesc = NULL; in edma_terminate_all()
891 vchan_get_all_descriptors(&echan->vchan, &head); in edma_terminate_all()
892 spin_unlock_irqrestore(&echan->vchan.lock, flags); in edma_terminate_all()
893 vchan_dma_desc_free_list(&echan->vchan, &head); in edma_terminate_all()
900 struct edma_chan *echan = to_edma_chan(chan); in edma_synchronize() local
902 vchan_synchronize(&echan->vchan); in edma_synchronize()
908 struct edma_chan *echan = to_edma_chan(chan); in edma_slave_config() local
918 memcpy(&echan->cfg, cfg, sizeof(echan->cfg)); in edma_slave_config()
925 struct edma_chan *echan = to_edma_chan(chan); in edma_dma_pause() local
927 if (!echan->edesc) in edma_dma_pause()
930 edma_pause(echan); in edma_dma_pause()
936 struct edma_chan *echan = to_edma_chan(chan); in edma_dma_resume() local
938 edma_resume(echan); in edma_dma_resume()
958 struct edma_chan *echan = to_edma_chan(chan); in edma_config_pset() local
1043 param->opt = EDMA_TCC(EDMA_CHAN_SLOT(echan->ch_num)); in edma_config_pset()
1071 struct edma_chan *echan = to_edma_chan(chan); in edma_prep_slave_sg() local
1080 if (unlikely(!echan || !sgl || !sg_len)) in edma_prep_slave_sg()
1084 src_addr = echan->cfg.src_addr; in edma_prep_slave_sg()
1085 dev_width = echan->cfg.src_addr_width; in edma_prep_slave_sg()
1086 burst = echan->cfg.src_maxburst; in edma_prep_slave_sg()
1088 dst_addr = echan->cfg.dst_addr; in edma_prep_slave_sg()
1089 dev_width = echan->cfg.dst_addr_width; in edma_prep_slave_sg()
1090 burst = echan->cfg.dst_maxburst; in edma_prep_slave_sg()
1108 edesc->echan = echan; in edma_prep_slave_sg()
1114 if (echan->slot[i] < 0) { in edma_prep_slave_sg()
1115 echan->slot[i] = in edma_prep_slave_sg()
1116 edma_alloc_slot(echan->ecc, EDMA_SLOT_ANY); in edma_prep_slave_sg()
1117 if (echan->slot[i] < 0) { in edma_prep_slave_sg()
1159 return vchan_tx_prep(&echan->vchan, &edesc->vdesc, tx_flags); in edma_prep_slave_sg()
1169 struct edma_chan *echan = to_edma_chan(chan); in edma_prep_dma_memcpy() local
1172 if (unlikely(!echan || !len)) in edma_prep_dma_memcpy()
1225 edesc->echan = echan; in edma_prep_dma_memcpy()
1245 if (echan->slot[1] < 0) { in edma_prep_dma_memcpy()
1246 echan->slot[1] = edma_alloc_slot(echan->ecc, in edma_prep_dma_memcpy()
1248 if (echan->slot[1] < 0) { in edma_prep_dma_memcpy()
1275 return vchan_tx_prep(&echan->vchan, &edesc->vdesc, tx_flags); in edma_prep_dma_memcpy()
1284 struct edma_chan *echan = to_edma_chan(chan); in edma_prep_dma_interleaved() local
1330 edesc->echan = echan; in edma_prep_dma_interleaved()
1342 param->opt = EDMA_TCC(EDMA_CHAN_SLOT(echan->ch_num)); in edma_prep_dma_interleaved()
1350 return vchan_tx_prep(&echan->vchan, &edesc->vdesc, tx_flags); in edma_prep_dma_interleaved()
1358 struct edma_chan *echan = to_edma_chan(chan); in edma_prep_dma_cyclic() local
1367 if (unlikely(!echan || !buf_len || !period_len)) in edma_prep_dma_cyclic()
1371 src_addr = echan->cfg.src_addr; in edma_prep_dma_cyclic()
1373 dev_width = echan->cfg.src_addr_width; in edma_prep_dma_cyclic()
1374 burst = echan->cfg.src_maxburst; in edma_prep_dma_cyclic()
1377 dst_addr = echan->cfg.dst_addr; in edma_prep_dma_cyclic()
1378 dev_width = echan->cfg.dst_addr_width; in edma_prep_dma_cyclic()
1379 burst = echan->cfg.dst_maxburst; in edma_prep_dma_cyclic()
1429 edesc->echan = echan; in edma_prep_dma_cyclic()
1432 __func__, echan->ch_num, nslots, period_len, buf_len); in edma_prep_dma_cyclic()
1436 if (echan->slot[i] < 0) { in edma_prep_dma_cyclic()
1437 echan->slot[i] = in edma_prep_dma_cyclic()
1438 edma_alloc_slot(echan->ecc, EDMA_SLOT_ANY); in edma_prep_dma_cyclic()
1439 if (echan->slot[i] < 0) { in edma_prep_dma_cyclic()
1479 i, echan->ch_num, echan->slot[i], in edma_prep_dma_cyclic()
1504 if (!echan->tc) in edma_prep_dma_cyclic()
1505 edma_assign_channel_eventq(echan, EVENTQ_0); in edma_prep_dma_cyclic()
1507 return vchan_tx_prep(&echan->vchan, &edesc->vdesc, tx_flags); in edma_prep_dma_cyclic()
1510 static void edma_completion_handler(struct edma_chan *echan) in edma_completion_handler() argument
1512 struct device *dev = echan->vchan.chan.device->dev; in edma_completion_handler()
1515 spin_lock(&echan->vchan.lock); in edma_completion_handler()
1516 edesc = echan->edesc; in edma_completion_handler()
1520 spin_unlock(&echan->vchan.lock); in edma_completion_handler()
1524 edma_stop(echan); in edma_completion_handler()
1526 echan->edesc = NULL; in edma_completion_handler()
1529 echan->ch_num); in edma_completion_handler()
1532 echan->ch_num); in edma_completion_handler()
1534 edma_pause(echan); in edma_completion_handler()
1541 edma_execute(echan); in edma_completion_handler()
1544 spin_unlock(&echan->vchan.lock); in edma_completion_handler()
1593 static void edma_error_handler(struct edma_chan *echan) in edma_error_handler() argument
1595 struct edma_cc *ecc = echan->ecc; in edma_error_handler()
1596 struct device *dev = echan->vchan.chan.device->dev; in edma_error_handler()
1600 if (!echan->edesc) in edma_error_handler()
1603 spin_lock(&echan->vchan.lock); in edma_error_handler()
1605 err = edma_read_slot(ecc, echan->slot[0], &p); in edma_error_handler()
1621 echan->missed = 1; in edma_error_handler()
1628 edma_clean_channel(echan); in edma_error_handler()
1629 edma_stop(echan); in edma_error_handler()
1630 edma_start(echan); in edma_error_handler()
1631 edma_trigger_channel(echan); in edma_error_handler()
1633 spin_unlock(&echan->vchan.lock); in edma_error_handler()
1725 struct edma_chan *echan = to_edma_chan(chan); in edma_alloc_chan_resources() local
1726 struct edma_cc *ecc = echan->ecc; in edma_alloc_chan_resources()
1731 if (echan->tc) { in edma_alloc_chan_resources()
1732 eventq_no = echan->tc->id; in edma_alloc_chan_resources()
1735 echan->tc = &ecc->tc_list[ecc->info->default_queue]; in edma_alloc_chan_resources()
1736 eventq_no = echan->tc->id; in edma_alloc_chan_resources()
1739 ret = edma_alloc_channel(echan, eventq_no); in edma_alloc_chan_resources()
1743 echan->slot[0] = edma_alloc_slot(ecc, echan->ch_num); in edma_alloc_chan_resources()
1744 if (echan->slot[0] < 0) { in edma_alloc_chan_resources()
1746 EDMA_CHAN_SLOT(echan->ch_num)); in edma_alloc_chan_resources()
1747 ret = echan->slot[0]; in edma_alloc_chan_resources()
1752 edma_set_chmap(echan, echan->slot[0]); in edma_alloc_chan_resources()
1753 echan->alloced = true; in edma_alloc_chan_resources()
1756 EDMA_CHAN_SLOT(echan->ch_num), chan->chan_id, in edma_alloc_chan_resources()
1757 echan->hw_triggered ? "HW" : "SW"); in edma_alloc_chan_resources()
1762 edma_free_channel(echan); in edma_alloc_chan_resources()
1769 struct edma_chan *echan = to_edma_chan(chan); in edma_free_chan_resources() local
1770 struct device *dev = echan->ecc->dev; in edma_free_chan_resources()
1774 edma_stop(echan); in edma_free_chan_resources()
1776 vchan_free_chan_resources(&echan->vchan); in edma_free_chan_resources()
1780 if (echan->slot[i] >= 0) { in edma_free_chan_resources()
1781 edma_free_slot(echan->ecc, echan->slot[i]); in edma_free_chan_resources()
1782 echan->slot[i] = -1; in edma_free_chan_resources()
1787 edma_set_chmap(echan, echan->ecc->dummy_slot); in edma_free_chan_resources()
1790 if (echan->alloced) { in edma_free_chan_resources()
1791 edma_free_channel(echan); in edma_free_chan_resources()
1792 echan->alloced = false; in edma_free_chan_resources()
1795 echan->tc = NULL; in edma_free_chan_resources()
1796 echan->hw_triggered = false; in edma_free_chan_resources()
1799 EDMA_CHAN_SLOT(echan->ch_num), chan->chan_id); in edma_free_chan_resources()
1805 struct edma_chan *echan = to_edma_chan(chan); in edma_issue_pending() local
1808 spin_lock_irqsave(&echan->vchan.lock, flags); in edma_issue_pending()
1809 if (vchan_issue_pending(&echan->vchan) && !echan->edesc) in edma_issue_pending()
1810 edma_execute(echan); in edma_issue_pending()
1811 spin_unlock_irqrestore(&echan->vchan.lock, flags); in edma_issue_pending()
1827 struct edma_chan *echan = edesc->echan; in edma_residue() local
1830 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_residue()
1840 pos = edma_get_position(echan->ecc, echan->slot[0], dst); in edma_residue()
1856 while (edma_shadow0_read_array(echan->ecc, event_reg, idx) & ch_bit) { in edma_residue()
1857 pos = edma_get_position(echan->ecc, echan->slot[0], dst); in edma_residue()
1862 dev_dbg_ratelimited(echan->vchan.chan.device->dev, in edma_residue()
1917 struct edma_chan *echan = to_edma_chan(chan); in edma_tx_status() local
1931 spin_lock_irqsave(&echan->vchan.lock, flags); in edma_tx_status()
1932 if (echan->edesc && echan->edesc->vdesc.tx.cookie == cookie) { in edma_tx_status()
1933 txstate->residue = edma_residue(echan->edesc); in edma_tx_status()
1935 struct virt_dma_desc *vdesc = vchan_find_desc(&echan->vchan, in edma_tx_status()
1949 echan->edesc && echan->edesc->polled && in edma_tx_status()
1950 echan->edesc->vdesc.tx.cookie == cookie) { in edma_tx_status()
1951 edma_stop(echan); in edma_tx_status()
1952 vchan_cookie_complete(&echan->edesc->vdesc); in edma_tx_status()
1953 echan->edesc = NULL; in edma_tx_status()
1954 edma_execute(echan); in edma_tx_status()
1958 spin_unlock_irqrestore(&echan->vchan.lock, flags); in edma_tx_status()
2060 struct edma_chan *echan = &ecc->slave_chans[i]; in edma_dma_init() local
2061 echan->ch_num = EDMA_CTLR_CHAN(ecc->id, i); in edma_dma_init()
2062 echan->ecc = ecc; in edma_dma_init()
2063 echan->vchan.desc_free = edma_desc_free; in edma_dma_init()
2066 vchan_init(&echan->vchan, m_ddev); in edma_dma_init()
2068 vchan_init(&echan->vchan, s_ddev); in edma_dma_init()
2070 INIT_LIST_HEAD(&echan->node); in edma_dma_init()
2072 echan->slot[j] = -1; in edma_dma_init()
2292 struct edma_chan *echan; in of_edma_xlate() local
2299 echan = &ecc->slave_chans[i]; in of_edma_xlate()
2300 if (echan->ch_num == dma_spec->args[0]) { in of_edma_xlate()
2301 chan = &echan->vchan.chan; in of_edma_xlate()
2309 if (echan->ecc->legacy_mode && dma_spec->args_count == 1) in of_edma_xlate()
2312 if (!echan->ecc->legacy_mode && dma_spec->args_count == 2 && in of_edma_xlate()
2313 dma_spec->args[1] < echan->ecc->num_tc) { in of_edma_xlate()
2314 echan->tc = &echan->ecc->tc_list[dma_spec->args[1]]; in of_edma_xlate()
2321 echan->hw_triggered = true; in of_edma_xlate()
2602 struct edma_chan *echan, *_echan; in edma_cleanupp_vchan() local
2604 list_for_each_entry_safe(echan, _echan, in edma_cleanupp_vchan()
2606 list_del(&echan->vchan.chan.device_node); in edma_cleanupp_vchan()
2607 tasklet_kill(&echan->vchan.task); in edma_cleanupp_vchan()
2637 struct edma_chan *echan = ecc->slave_chans; in edma_pm_suspend() local
2641 if (echan[i].alloced) in edma_pm_suspend()
2642 edma_setup_interrupt(&echan[i], false); in edma_pm_suspend()
2651 struct edma_chan *echan = ecc->slave_chans; in edma_pm_resume() local
2666 if (echan[i].alloced) { in edma_pm_resume()
2672 edma_setup_interrupt(&echan[i], true); in edma_pm_resume()
2675 edma_set_chmap(&echan[i], echan[i].slot[0]); in edma_pm_resume()
2716 struct edma_chan *echan = to_edma_chan(chan); in edma_filter_fn() local
2718 if (ch_req == echan->ch_num) { in edma_filter_fn()
2720 echan->hw_triggered = true; in edma_filter_fn()