180 static inline void tdma_ch_write(struct tegra_adma_chan *tdc, u32 reg, u32 val)  in tdma_ch_write()  function
325 		tdma_ch_write(tdc, ADMA_CH_INT_CLEAR, status);  in tegra_adma_irq_clear()
335 	tdma_ch_write(tdc, ADMA_CH_CMD, 0);  in tegra_adma_stop()
373 	tdma_ch_write(tdc, ADMA_CH_TC, ch_regs->tc);  in tegra_adma_start()
374 	tdma_ch_write(tdc, ADMA_CH_CTRL, ch_regs->ctrl);  in tegra_adma_start()
375 	tdma_ch_write(tdc, ADMA_CH_LOWER_SRC_ADDR, ch_regs->src_addr);  in tegra_adma_start()
376 	tdma_ch_write(tdc, ADMA_CH_LOWER_TRG_ADDR, ch_regs->trg_addr);  in tegra_adma_start()
377 	tdma_ch_write(tdc, ADMA_CH_FIFO_CTRL, ch_regs->fifo_ctrl);  in tegra_adma_start()
378 	tdma_ch_write(tdc, ADMA_CH_CONFIG, ch_regs->config);  in tegra_adma_start()
381 	tdma_ch_write(tdc, ADMA_CH_CMD, 1);  in tegra_adma_start()
462 	tdma_ch_write(tdc, ADMA_CH_CTRL, ch_regs->ctrl);  in tegra_adma_pause()
483 	tdma_ch_write(tdc, ADMA_CH_CTRL, ch_regs->ctrl);  in tegra_adma_resume()
768 		tdma_ch_write(tdc, ADMA_CH_TC, ch_reg->tc);  in tegra_adma_runtime_resume()
769 		tdma_ch_write(tdc, ADMA_CH_LOWER_SRC_ADDR, ch_reg->src_addr);  in tegra_adma_runtime_resume()
770 		tdma_ch_write(tdc, ADMA_CH_LOWER_TRG_ADDR, ch_reg->trg_addr);  in tegra_adma_runtime_resume()
771 		tdma_ch_write(tdc, ADMA_CH_CTRL, ch_reg->ctrl);  in tegra_adma_runtime_resume()
772 		tdma_ch_write(tdc, ADMA_CH_FIFO_CTRL, ch_reg->fifo_ctrl);  in tegra_adma_runtime_resume()
773 		tdma_ch_write(tdc, ADMA_CH_CONFIG, ch_reg->config);  in tegra_adma_runtime_resume()
774 		tdma_ch_write(tdc, ADMA_CH_CMD, ch_reg->cmd);  in tegra_adma_runtime_resume()