185 static inline u32 tdma_ch_read(struct tegra_adma_chan *tdc, u32 reg)  in tdma_ch_read()  function
315 	u32 status = tdma_ch_read(tdc, ADMA_CH_INT_STATUS);  in tegra_adma_irq_status()
390 	unsigned int pos = tdma_ch_read(tdc, ADMA_CH_XFER_STATUS);  in tegra_adma_get_residue()
447 	csts = tdma_ch_read(tdc, ADMA_CH_STATUS);  in tegra_adma_is_paused()
460 	ch_regs->ctrl = tdma_ch_read(tdc, ADMA_CH_CTRL);  in tegra_adma_pause()
481 	ch_regs->ctrl = tdma_ch_read(tdc, ADMA_CH_CTRL);  in tegra_adma_resume()
727 		ch_reg->cmd = tdma_ch_read(tdc, ADMA_CH_CMD);  in tegra_adma_runtime_suspend()
731 		ch_reg->tc = tdma_ch_read(tdc, ADMA_CH_TC);  in tegra_adma_runtime_suspend()
732 		ch_reg->src_addr = tdma_ch_read(tdc, ADMA_CH_LOWER_SRC_ADDR);  in tegra_adma_runtime_suspend()
733 		ch_reg->trg_addr = tdma_ch_read(tdc, ADMA_CH_LOWER_TRG_ADDR);  in tegra_adma_runtime_suspend()
734 		ch_reg->ctrl = tdma_ch_read(tdc, ADMA_CH_CTRL);  in tegra_adma_runtime_suspend()
735 		ch_reg->fifo_ctrl = tdma_ch_read(tdc, ADMA_CH_FIFO_CTRL);  in tegra_adma_runtime_suspend()
736 		ch_reg->config = tdma_ch_read(tdc, ADMA_CH_CONFIG);  in tegra_adma_runtime_suspend()