Lines Matching refs:tdc2dev

263 static inline struct device *tdc2dev(struct tegra_dma_channel *tdc)  in tdc2dev()  function
341 dev_err(tdc2dev(tdc), "Configuration not allowed\n"); in tegra_dma_slave_config()
433 dev_dbg(tdc2dev(tdc), "%s():clearing interrupt\n", __func__); in tegra_dma_stop()
481 dev_err(tdc2dev(tdc), in tegra_dma_configure_for_next()
570 dev_err(tdc2dev(tdc), "DMA transfer underflow, aborting DMA\n"); in handle_continuous_head_request()
692 dev_info(tdc2dev(tdc), "Interrupt already served status 0x%08x\n", in tegra_dma_isr()
722 dev_err(tdc2dev(tdc), "No DMA request\n"); in tegra_dma_issue_pending()
728 dev_err(tdc2dev(tdc), "Failed to enable DMA\n"); in tegra_dma_issue_pending()
767 dev_dbg(tdc2dev(tdc), "%s():handling isr\n", __func__); in tegra_dma_terminate_all()
823 dev_err(tdc2dev(tdc), "Failed to synchronize DMA: %d\n", err); in tegra_dma_synchronize()
934 dev_dbg(tdc2dev(tdc), "cookie %d not found\n", cookie); in tegra_dma_tx_status()
964 dev_warn(tdc2dev(tdc), in get_bus_width()
1027 dev_err(tdc2dev(tdc), "DMA direction is not supported\n"); in get_transfer_param()
1065 dev_err(tdc2dev(tdc), "DMA channel is not configured\n"); in tegra_dma_prep_slave_sg()
1069 dev_err(tdc2dev(tdc), "Invalid segment length %d\n", sg_len); in tegra_dma_prep_slave_sg()
1102 dev_err(tdc2dev(tdc), "DMA descriptors not available\n"); in tegra_dma_prep_slave_sg()
1121 dev_err(tdc2dev(tdc), in tegra_dma_prep_slave_sg()
1129 dev_err(tdc2dev(tdc), "DMA sg-req not available\n"); in tegra_dma_prep_slave_sg()
1163 dev_err(tdc2dev(tdc), "DMA configured in cyclic mode\n"); in tegra_dma_prep_slave_sg()
1189 dev_err(tdc2dev(tdc), "Invalid buffer/period len\n"); in tegra_dma_prep_dma_cyclic()
1194 dev_err(tdc2dev(tdc), "DMA slave is not configured\n"); in tegra_dma_prep_dma_cyclic()
1205 dev_err(tdc2dev(tdc), "Request not allowed when DMA running\n"); in tegra_dma_prep_dma_cyclic()
1214 dev_err(tdc2dev(tdc), "buf_len is not multiple of period_len\n"); in tegra_dma_prep_dma_cyclic()
1221 dev_err(tdc2dev(tdc), "Req len/mem address is not correct\n"); in tegra_dma_prep_dma_cyclic()
1250 dev_err(tdc2dev(tdc), "not enough descriptors available\n"); in tegra_dma_prep_dma_cyclic()
1266 dev_err(tdc2dev(tdc), "DMA sg-req not available\n"); in tegra_dma_prep_dma_cyclic()
1300 dev_err(tdc2dev(tdc), "DMA configuration conflict\n"); in tegra_dma_prep_dma_cyclic()
1329 dev_dbg(tdc2dev(tdc), "Freeing channel %d\n", tdc->id); in tegra_dma_free_chan_resources()